1 /* $NetBSD: gpio.c,v 1.8 2006/04/08 22:33:36 uwe Exp $ */ 2 /* $OpenBSD: gpio.c,v 1.6 2006/01/14 12:33:49 grange Exp $ */ 3 4 /* 5 * Copyright (c) 2004, 2006 Alexander Yurchenko <grange@openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #include <sys/cdefs.h> 21 __KERNEL_RCSID(0, "$NetBSD: gpio.c,v 1.8 2006/04/08 22:33:36 uwe Exp $"); 22 23 /* 24 * General Purpose Input/Output framework. 25 */ 26 27 #include <sys/param.h> 28 #include <sys/systm.h> 29 #include <sys/conf.h> 30 #include <sys/device.h> 31 #include <sys/ioctl.h> 32 #include <sys/gpio.h> 33 #include <sys/vnode.h> 34 35 #include <dev/gpio/gpiovar.h> 36 37 #include "locators.h" 38 39 struct gpio_softc { 40 struct device sc_dev; 41 42 gpio_chipset_tag_t sc_gc; /* our GPIO controller */ 43 gpio_pin_t *sc_pins; /* pins array */ 44 int sc_npins; /* total number of pins */ 45 46 int sc_opened; 47 int sc_dying; 48 }; 49 50 int gpio_match(struct device *, struct cfdata *, void *); 51 void gpio_attach(struct device *, struct device *, void *); 52 int gpio_detach(struct device *, int); 53 int gpio_activate(struct device *, enum devact); 54 int gpio_search(struct device *, struct cfdata *, const int *, void *); 55 int gpio_print(void *, const char *); 56 57 CFATTACH_DECL(gpio, sizeof(struct gpio_softc), 58 gpio_match, gpio_attach, gpio_detach, gpio_activate); 59 60 dev_type_open(gpioopen); 61 dev_type_close(gpioclose); 62 dev_type_ioctl(gpioioctl); 63 64 const struct cdevsw gpio_cdevsw = { 65 gpioopen, gpioclose, noread, nowrite, gpioioctl, 66 nostop, notty, nopoll, nommap, nokqfilter, 67 }; 68 69 extern struct cfdriver gpio_cd; 70 71 int 72 gpio_match(struct device *parent, struct cfdata *cf, void *aux) 73 { 74 75 return (1); 76 } 77 78 void 79 gpio_attach(struct device *parent, struct device *self, void *aux) 80 { 81 struct gpio_softc *sc = device_private(self); 82 struct gpiobus_attach_args *gba = aux; 83 84 sc->sc_gc = gba->gba_gc; 85 sc->sc_pins = gba->gba_pins; 86 sc->sc_npins = gba->gba_npins; 87 88 printf(": %d pins\n", sc->sc_npins); 89 90 /* 91 * Attach all devices that can be connected to the GPIO pins 92 * described in the kernel configuration file. 93 */ 94 config_search_ia(gpio_search, self, "gpio", sc); 95 } 96 97 int 98 gpio_detach(struct device *self, int flags) 99 { 100 #if 0 101 int maj, mn; 102 103 /* Locate the major number */ 104 for (maj = 0; maj < nchrdev; maj++) 105 if (cdevsw[maj].d_open == gpioopen) 106 break; 107 108 /* Nuke the vnodes for any open instances (calls close) */ 109 mn = device_unit(self); 110 vdevgone(maj, mn, mn, VCHR); 111 #endif 112 113 return (0); 114 } 115 116 int 117 gpio_activate(struct device *self, enum devact act) 118 { 119 struct gpio_softc *sc = device_private(self); 120 121 switch (act) { 122 case DVACT_ACTIVATE: 123 return (EOPNOTSUPP); 124 case DVACT_DEACTIVATE: 125 sc->sc_dying = 1; 126 break; 127 } 128 129 return (0); 130 } 131 132 int 133 gpio_search(struct device *parent, struct cfdata *cf, 134 const int *ldesc, void *aux) 135 { 136 struct gpio_attach_args ga; 137 138 ga.ga_gpio = aux; 139 ga.ga_offset = cf->cf_loc[GPIOCF_OFFSET]; 140 ga.ga_mask = cf->cf_loc[GPIOCF_MASK]; 141 142 if (config_match(parent, cf, &ga) > 0) 143 config_attach(parent, cf, &ga, gpio_print); 144 145 return (0); 146 } 147 148 int 149 gpio_print(void *aux, const char *pnp) 150 { 151 struct gpio_attach_args *ga = aux; 152 int i; 153 154 printf(" pins"); 155 for (i = 0; i < 32; i++) 156 if (ga->ga_mask & (1 << i)) 157 printf(" %d", ga->ga_offset + i); 158 159 return (UNCONF); 160 } 161 162 int 163 gpiobus_print(void *aux, const char *pnp) 164 { 165 #if 0 166 struct gpiobus_attach_args *gba = aux; 167 #endif 168 if (pnp != NULL) 169 printf("%s at %s", "gpiobus", pnp); 170 171 return (UNCONF); 172 } 173 174 int 175 gpio_pin_map(void *gpio, int offset, u_int32_t mask, struct gpio_pinmap *map) 176 { 177 struct gpio_softc *sc = gpio; 178 int npins, pin, i; 179 180 npins = gpio_npins(mask); 181 if (npins > sc->sc_npins) 182 return (1); 183 184 for (npins = 0, i = 0; i < 32; i++) 185 if (mask & (1 << i)) { 186 pin = offset + i; 187 if (pin < 0 || pin >= sc->sc_npins) 188 return (1); 189 if (sc->sc_pins[pin].pin_mapped) 190 return (1); 191 sc->sc_pins[pin].pin_mapped = 1; 192 map->pm_map[npins++] = pin; 193 } 194 map->pm_size = npins; 195 196 return (0); 197 } 198 199 void 200 gpio_pin_unmap(void *gpio, struct gpio_pinmap *map) 201 { 202 struct gpio_softc *sc = gpio; 203 int pin, i; 204 205 for (i = 0; i < map->pm_size; i++) { 206 pin = map->pm_map[i]; 207 sc->sc_pins[pin].pin_mapped = 0; 208 } 209 } 210 211 int 212 gpio_pin_read(void *gpio, struct gpio_pinmap *map, int pin) 213 { 214 struct gpio_softc *sc = gpio; 215 216 return (gpiobus_pin_read(sc->sc_gc, map->pm_map[pin])); 217 } 218 219 void 220 gpio_pin_write(void *gpio, struct gpio_pinmap *map, int pin, int value) 221 { 222 struct gpio_softc *sc = gpio; 223 224 return (gpiobus_pin_write(sc->sc_gc, map->pm_map[pin], value)); 225 } 226 227 void 228 gpio_pin_ctl(void *gpio, struct gpio_pinmap *map, int pin, int flags) 229 { 230 struct gpio_softc *sc = gpio; 231 232 return (gpiobus_pin_ctl(sc->sc_gc, map->pm_map[pin], flags)); 233 } 234 235 int 236 gpio_pin_caps(void *gpio, struct gpio_pinmap *map, int pin) 237 { 238 struct gpio_softc *sc = gpio; 239 240 return (sc->sc_pins[map->pm_map[pin]].pin_caps); 241 } 242 243 int 244 gpio_npins(u_int32_t mask) 245 { 246 int npins, i; 247 248 for (npins = 0, i = 0; i < 32; i++) 249 if (mask & (1 << i)) 250 npins++; 251 252 return (npins); 253 } 254 255 int 256 gpioopen(dev_t dev, int flag, int mode, struct lwp *l) 257 { 258 struct gpio_softc *sc; 259 260 sc = (struct gpio_softc *)device_lookup(&gpio_cd, minor(dev)); 261 if (sc == NULL) 262 return (ENXIO); 263 264 if (sc->sc_opened) 265 return (EBUSY); 266 sc->sc_opened = 1; 267 268 return (0); 269 } 270 271 int 272 gpioclose(dev_t dev, int flag, int mode, struct lwp *l) 273 { 274 struct gpio_softc *sc; 275 276 sc = (struct gpio_softc *)device_lookup(&gpio_cd, minor(dev)); 277 sc->sc_opened = 0; 278 279 return (0); 280 } 281 282 int 283 gpioioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct lwp *l) 284 { 285 struct gpio_softc *sc; 286 gpio_chipset_tag_t gc; 287 struct gpio_info *info; 288 struct gpio_pin_op *op; 289 struct gpio_pin_ctl *ctl; 290 int pin, value, flags; 291 292 sc = (struct gpio_softc *)device_lookup(&gpio_cd, minor(dev)); 293 gc = sc->sc_gc; 294 295 switch (cmd) { 296 case GPIOINFO: 297 info = (struct gpio_info *)data; 298 299 info->gpio_npins = sc->sc_npins; 300 break; 301 case GPIOPINREAD: 302 op = (struct gpio_pin_op *)data; 303 304 pin = op->gp_pin; 305 if (pin < 0 || pin >= sc->sc_npins) 306 return (EINVAL); 307 308 /* return read value */ 309 op->gp_value = gpiobus_pin_read(gc, pin); 310 break; 311 case GPIOPINWRITE: 312 op = (struct gpio_pin_op *)data; 313 314 pin = op->gp_pin; 315 if (pin < 0 || pin >= sc->sc_npins) 316 return (EINVAL); 317 if (sc->sc_pins[pin].pin_mapped) 318 return (EBUSY); 319 320 value = op->gp_value; 321 if (value != GPIO_PIN_LOW && value != GPIO_PIN_HIGH) 322 return (EINVAL); 323 324 gpiobus_pin_write(gc, pin, value); 325 /* return old value */ 326 op->gp_value = sc->sc_pins[pin].pin_state; 327 /* update current value */ 328 sc->sc_pins[pin].pin_state = value; 329 break; 330 case GPIOPINTOGGLE: 331 op = (struct gpio_pin_op *)data; 332 333 pin = op->gp_pin; 334 if (pin < 0 || pin >= sc->sc_npins) 335 return (EINVAL); 336 if (sc->sc_pins[pin].pin_mapped) 337 return (EBUSY); 338 339 value = (sc->sc_pins[pin].pin_state == GPIO_PIN_LOW ? 340 GPIO_PIN_HIGH : GPIO_PIN_LOW); 341 gpiobus_pin_write(gc, pin, value); 342 /* return old value */ 343 op->gp_value = sc->sc_pins[pin].pin_state; 344 /* update current value */ 345 sc->sc_pins[pin].pin_state = value; 346 break; 347 case GPIOPINCTL: 348 ctl = (struct gpio_pin_ctl *)data; 349 350 pin = ctl->gp_pin; 351 if (pin < 0 || pin >= sc->sc_npins) 352 return (EINVAL); 353 if (sc->sc_pins[pin].pin_mapped) 354 return (EBUSY); 355 356 flags = ctl->gp_flags; 357 /* check that the controller supports all requested flags */ 358 if ((flags & sc->sc_pins[pin].pin_caps) != flags) 359 return (ENODEV); 360 361 ctl->gp_caps = sc->sc_pins[pin].pin_caps; 362 /* return old value */ 363 ctl->gp_flags = sc->sc_pins[pin].pin_flags; 364 if (flags > 0) { 365 gpiobus_pin_ctl(gc, pin, flags); 366 /* update current value */ 367 sc->sc_pins[pin].pin_flags = flags; 368 } 369 break; 370 default: 371 return (ENOTTY); 372 } 373 374 return (0); 375 } 376