1 /* $NetBSD: gpio.c,v 1.18 2009/04/02 00:09:33 dyoung Exp $ */ 2 /* $OpenBSD: gpio.c,v 1.6 2006/01/14 12:33:49 grange Exp $ */ 3 4 /* 5 * Copyright (c) 2004, 2006 Alexander Yurchenko <grange@openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #include <sys/cdefs.h> 21 __KERNEL_RCSID(0, "$NetBSD: gpio.c,v 1.18 2009/04/02 00:09:33 dyoung Exp $"); 22 23 /* 24 * General Purpose Input/Output framework. 25 */ 26 27 #include <sys/param.h> 28 #include <sys/systm.h> 29 #include <sys/conf.h> 30 #include <sys/device.h> 31 #include <sys/ioctl.h> 32 #include <sys/gpio.h> 33 #include <sys/vnode.h> 34 35 #include <dev/gpio/gpiovar.h> 36 37 #include "locators.h" 38 39 struct gpio_softc { 40 device_t sc_dev; 41 42 gpio_chipset_tag_t sc_gc; /* our GPIO controller */ 43 gpio_pin_t *sc_pins; /* pins array */ 44 int sc_npins; /* total number of pins */ 45 46 int sc_opened; 47 int sc_dying; 48 }; 49 50 int gpio_match(device_t, cfdata_t, void *); 51 void gpio_attach(device_t, device_t, void *); 52 bool gpio_resume(device_t PMF_FN_PROTO); 53 int gpio_detach(device_t, int); 54 int gpio_activate(device_t, enum devact); 55 int gpio_search(device_t, cfdata_t, const int *, void *); 56 int gpio_print(void *, const char *); 57 58 CFATTACH_DECL3_NEW(gpio, sizeof(struct gpio_softc), 59 gpio_match, gpio_attach, gpio_detach, gpio_activate, NULL, NULL, 60 DVF_DETACH_SHUTDOWN); 61 62 dev_type_open(gpioopen); 63 dev_type_close(gpioclose); 64 dev_type_ioctl(gpioioctl); 65 66 const struct cdevsw gpio_cdevsw = { 67 gpioopen, gpioclose, noread, nowrite, gpioioctl, 68 nostop, notty, nopoll, nommap, nokqfilter, D_OTHER, 69 }; 70 71 extern struct cfdriver gpio_cd; 72 73 int 74 gpio_match(device_t parent, cfdata_t cf, void *aux) 75 { 76 77 return (1); 78 } 79 80 bool 81 gpio_resume(device_t self PMF_FN_ARGS) 82 { 83 struct gpio_softc *sc = device_private(self); 84 int pin; 85 86 for (pin = 0; pin < sc->sc_npins; pin++) { 87 gpiobus_pin_ctl(sc->sc_gc, pin, sc->sc_pins[pin].pin_flags); 88 gpiobus_pin_write(sc->sc_gc, pin, sc->sc_pins[pin].pin_state); 89 } 90 return true; 91 } 92 93 void 94 gpio_attach(device_t parent, device_t self, void *aux) 95 { 96 struct gpio_softc *sc = device_private(self); 97 struct gpiobus_attach_args *gba = aux; 98 99 sc->sc_dev = self; 100 sc->sc_gc = gba->gba_gc; 101 sc->sc_pins = gba->gba_pins; 102 sc->sc_npins = gba->gba_npins; 103 104 printf(": %d pins\n", sc->sc_npins); 105 106 if (!pmf_device_register(self, NULL, gpio_resume)) 107 aprint_error_dev(self, "couldn't establish power handler\n"); 108 109 /* 110 * Attach all devices that can be connected to the GPIO pins 111 * described in the kernel configuration file. 112 */ 113 config_search_ia(gpio_search, self, "gpio", sc); 114 } 115 116 int 117 gpio_detach(device_t self, int flags) 118 { 119 #if 0 120 int maj, mn; 121 122 /* Locate the major number */ 123 for (maj = 0; maj < nchrdev; maj++) 124 if (cdevsw[maj].d_open == gpioopen) 125 break; 126 127 /* Nuke the vnodes for any open instances (calls close) */ 128 mn = device_unit(self); 129 vdevgone(maj, mn, mn, VCHR); 130 #endif 131 132 return (0); 133 } 134 135 int 136 gpio_activate(device_t self, enum devact act) 137 { 138 struct gpio_softc *sc = device_private(self); 139 140 switch (act) { 141 case DVACT_ACTIVATE: 142 return (EOPNOTSUPP); 143 case DVACT_DEACTIVATE: 144 sc->sc_dying = 1; 145 break; 146 } 147 148 return (0); 149 } 150 151 int 152 gpio_search(device_t parent, cfdata_t cf, 153 const int *ldesc, void *aux) 154 { 155 struct gpio_attach_args ga; 156 157 ga.ga_gpio = aux; 158 ga.ga_offset = cf->cf_loc[GPIOCF_OFFSET]; 159 ga.ga_mask = cf->cf_loc[GPIOCF_MASK]; 160 161 if (config_match(parent, cf, &ga) > 0) 162 config_attach(parent, cf, &ga, gpio_print); 163 164 return (0); 165 } 166 167 int 168 gpio_print(void *aux, const char *pnp) 169 { 170 struct gpio_attach_args *ga = aux; 171 int i; 172 173 printf(" pins"); 174 for (i = 0; i < 32; i++) 175 if (ga->ga_mask & (1 << i)) 176 printf(" %d", ga->ga_offset + i); 177 178 return (UNCONF); 179 } 180 181 int 182 gpiobus_print(void *aux, const char *pnp) 183 { 184 #if 0 185 struct gpiobus_attach_args *gba = aux; 186 #endif 187 if (pnp != NULL) 188 printf("%s at %s", "gpiobus", pnp); 189 190 return (UNCONF); 191 } 192 193 int 194 gpio_pin_map(void *gpio, int offset, u_int32_t mask, struct gpio_pinmap *map) 195 { 196 struct gpio_softc *sc = gpio; 197 int npins, pin, i; 198 199 npins = gpio_npins(mask); 200 if (npins > sc->sc_npins) 201 return (1); 202 203 for (npins = 0, i = 0; i < 32; i++) 204 if (mask & (1 << i)) { 205 pin = offset + i; 206 if (pin < 0 || pin >= sc->sc_npins) 207 return (1); 208 if (sc->sc_pins[pin].pin_mapped) 209 return (1); 210 sc->sc_pins[pin].pin_mapped = 1; 211 map->pm_map[npins++] = pin; 212 } 213 map->pm_size = npins; 214 215 return (0); 216 } 217 218 void 219 gpio_pin_unmap(void *gpio, struct gpio_pinmap *map) 220 { 221 struct gpio_softc *sc = gpio; 222 int pin, i; 223 224 for (i = 0; i < map->pm_size; i++) { 225 pin = map->pm_map[i]; 226 sc->sc_pins[pin].pin_mapped = 0; 227 } 228 } 229 230 int 231 gpio_pin_read(void *gpio, struct gpio_pinmap *map, int pin) 232 { 233 struct gpio_softc *sc = gpio; 234 235 return (gpiobus_pin_read(sc->sc_gc, map->pm_map[pin])); 236 } 237 238 void 239 gpio_pin_write(void *gpio, struct gpio_pinmap *map, int pin, int value) 240 { 241 struct gpio_softc *sc = gpio; 242 243 gpiobus_pin_write(sc->sc_gc, map->pm_map[pin], value); 244 sc->sc_pins[map->pm_map[pin]].pin_state = value; 245 } 246 247 void 248 gpio_pin_ctl(void *gpio, struct gpio_pinmap *map, int pin, int flags) 249 { 250 struct gpio_softc *sc = gpio; 251 252 return (gpiobus_pin_ctl(sc->sc_gc, map->pm_map[pin], flags)); 253 } 254 255 int 256 gpio_pin_caps(void *gpio, struct gpio_pinmap *map, int pin) 257 { 258 struct gpio_softc *sc = gpio; 259 260 return (sc->sc_pins[map->pm_map[pin]].pin_caps); 261 } 262 263 int 264 gpio_npins(u_int32_t mask) 265 { 266 int npins, i; 267 268 for (npins = 0, i = 0; i < 32; i++) 269 if (mask & (1 << i)) 270 npins++; 271 272 return (npins); 273 } 274 275 int 276 gpioopen(dev_t dev, int flag, int mode, 277 struct lwp *l) 278 { 279 struct gpio_softc *sc; 280 int ret; 281 282 sc = device_lookup_private(&gpio_cd, minor(dev)); 283 if (sc == NULL) 284 return (ENXIO); 285 286 if (sc->sc_opened) 287 return (EBUSY); 288 289 if ((ret = gpiobus_open(sc->sc_gc, sc->sc_dev))) 290 return ret; 291 292 sc->sc_opened = 1; 293 294 return (0); 295 } 296 297 int 298 gpioclose(dev_t dev, int flag, int mode, 299 struct lwp *l) 300 { 301 struct gpio_softc *sc; 302 303 sc = device_lookup_private(&gpio_cd, minor(dev)); 304 gpiobus_close(sc->sc_gc, sc->sc_dev); 305 sc->sc_opened = 0; 306 307 return (0); 308 } 309 310 int 311 gpioioctl(dev_t dev, u_long cmd, void *data, int flag, 312 struct lwp *l) 313 { 314 struct gpio_softc *sc; 315 gpio_chipset_tag_t gc; 316 struct gpio_info *info; 317 struct gpio_pin_op *op; 318 struct gpio_pin_ctl *ctl; 319 int pin, value, flags; 320 321 sc = device_lookup_private(&gpio_cd, minor(dev)); 322 gc = sc->sc_gc; 323 324 if (cmd != GPIOINFO && !device_is_active(sc->sc_dev)) 325 return EBUSY; 326 327 switch (cmd) { 328 case GPIOINFO: 329 info = (struct gpio_info *)data; 330 331 info->gpio_npins = sc->sc_npins; 332 break; 333 case GPIOPINREAD: 334 op = (struct gpio_pin_op *)data; 335 336 pin = op->gp_pin; 337 if (pin < 0 || pin >= sc->sc_npins) 338 return (EINVAL); 339 340 /* return read value */ 341 op->gp_value = gpiobus_pin_read(gc, pin); 342 break; 343 case GPIOPINWRITE: 344 op = (struct gpio_pin_op *)data; 345 346 pin = op->gp_pin; 347 if (pin < 0 || pin >= sc->sc_npins) 348 return (EINVAL); 349 if (sc->sc_pins[pin].pin_mapped) 350 return (EBUSY); 351 352 value = op->gp_value; 353 if (value != GPIO_PIN_LOW && value != GPIO_PIN_HIGH) 354 return (EINVAL); 355 356 gpiobus_pin_write(gc, pin, value); 357 /* return old value */ 358 op->gp_value = sc->sc_pins[pin].pin_state; 359 /* update current value */ 360 sc->sc_pins[pin].pin_state = value; 361 break; 362 case GPIOPINTOGGLE: 363 op = (struct gpio_pin_op *)data; 364 365 pin = op->gp_pin; 366 if (pin < 0 || pin >= sc->sc_npins) 367 return (EINVAL); 368 if (sc->sc_pins[pin].pin_mapped) 369 return (EBUSY); 370 371 value = (sc->sc_pins[pin].pin_state == GPIO_PIN_LOW ? 372 GPIO_PIN_HIGH : GPIO_PIN_LOW); 373 gpiobus_pin_write(gc, pin, value); 374 /* return old value */ 375 op->gp_value = sc->sc_pins[pin].pin_state; 376 /* update current value */ 377 sc->sc_pins[pin].pin_state = value; 378 break; 379 case GPIOPINCTL: 380 ctl = (struct gpio_pin_ctl *)data; 381 382 pin = ctl->gp_pin; 383 if (pin < 0 || pin >= sc->sc_npins) 384 return (EINVAL); 385 if (sc->sc_pins[pin].pin_mapped) 386 return (EBUSY); 387 388 flags = ctl->gp_flags; 389 /* check that the controller supports all requested flags */ 390 if ((flags & sc->sc_pins[pin].pin_caps) != flags) 391 return (ENODEV); 392 393 ctl->gp_caps = sc->sc_pins[pin].pin_caps; 394 /* return old value */ 395 ctl->gp_flags = sc->sc_pins[pin].pin_flags; 396 if (flags > 0) { 397 gpiobus_pin_ctl(gc, pin, flags); 398 /* update current value */ 399 sc->sc_pins[pin].pin_flags = flags; 400 } 401 break; 402 default: 403 return (ENOTTY); 404 } 405 406 return (0); 407 } 408