1 /* $NetBSD: gpio.c,v 1.72 2022/12/13 21:50:43 jakllsch Exp $ */ 2 /* $OpenBSD: gpio.c,v 1.6 2006/01/14 12:33:49 grange Exp $ */ 3 4 /* 5 * Copyright (c) 2008, 2009, 2010, 2011 Marc Balmer <marc@msys.ch> 6 * Copyright (c) 2004, 2006 Alexander Yurchenko <grange@openbsd.org> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21 #ifdef _KERNEL_OPT 22 #include "opt_fdt.h" 23 #endif 24 25 #include <sys/cdefs.h> 26 __KERNEL_RCSID(0, "$NetBSD: gpio.c,v 1.72 2022/12/13 21:50:43 jakllsch Exp $"); 27 28 /* 29 * General Purpose Input/Output framework. 30 */ 31 32 #include <sys/param.h> 33 #include <sys/callout.h> 34 #include <sys/systm.h> 35 #include <sys/conf.h> 36 #include <sys/device.h> 37 #include <sys/fcntl.h> 38 #include <sys/ioctl.h> 39 #include <sys/gpio.h> 40 #include <sys/kernel.h> 41 #include <sys/vnode.h> 42 #include <sys/kmem.h> 43 #include <sys/mutex.h> 44 #include <sys/condvar.h> 45 #include <sys/queue.h> 46 #include <sys/kauth.h> 47 #include <sys/module.h> 48 49 #include <dev/gpio/gpiovar.h> 50 51 #ifdef FDT 52 #include <dev/fdt/fdtvar.h> 53 #endif 54 55 #include "ioconf.h" 56 #include "locators.h" 57 58 #ifdef GPIO_DEBUG 59 #define DPRINTFN(n, x) do { if (gpiodebug > (n)) printf x; } while (0) 60 int gpiodebug = 0; 61 #else 62 #define DPRINTFN(n, x) 63 #endif 64 #define DPRINTF(x) DPRINTFN(0, x) 65 66 struct gpio_softc { 67 device_t sc_dev; 68 69 gpio_chipset_tag_t sc_gc; /* GPIO controller */ 70 gpio_pin_t *sc_pins; /* pins array */ 71 int sc_npins; /* number of pins */ 72 73 kmutex_t sc_mtx; 74 kcondvar_t sc_ioctl; /* ioctl in progress */ 75 int sc_ioctl_busy; /* ioctl is busy */ 76 kcondvar_t sc_attach; /* attach/detach in progress */ 77 int sc_attach_busy;/* busy in attach/detach */ 78 #ifdef COMPAT_50 79 LIST_HEAD(, gpio_dev) sc_devs; /* devices */ 80 #endif 81 LIST_HEAD(, gpio_name) sc_names; /* named pins */ 82 }; 83 84 static int gpio_match(device_t, cfdata_t, void *); 85 int gpio_submatch(device_t, cfdata_t, const int *, void *); 86 static void gpio_attach(device_t, device_t, void *); 87 static int gpio_rescan(device_t, const char *, const int *); 88 static void gpio_childdetached(device_t, device_t); 89 static bool gpio_resume(device_t, const pmf_qual_t *); 90 static int gpio_detach(device_t, int); 91 static int gpio_search(device_t, cfdata_t, const int *, void *); 92 static int gpio_print(void *, const char *); 93 static int gpio_pinbyname(struct gpio_softc *, char *); 94 static int gpio_ioctl(struct gpio_softc *, u_long, void *, int, 95 struct lwp *); 96 97 #ifdef COMPAT_50 98 /* Old API */ 99 static int gpio_ioctl_oapi(struct gpio_softc *, u_long, void *, int, 100 struct lwp *); 101 #endif 102 103 CFATTACH_DECL3_NEW(gpio, sizeof(struct gpio_softc), 104 gpio_match, gpio_attach, gpio_detach, NULL, gpio_rescan, 105 gpio_childdetached, DVF_DETACH_SHUTDOWN); 106 107 dev_type_open(gpioopen); 108 dev_type_close(gpioclose); 109 dev_type_ioctl(gpioioctl); 110 dev_type_ioctl(gpioioctl_locked); 111 112 const struct cdevsw gpio_cdevsw = { 113 .d_open = gpioopen, 114 .d_close = gpioclose, 115 .d_read = noread, 116 .d_write = nowrite, 117 .d_ioctl = gpioioctl, 118 .d_stop = nostop, 119 .d_tty = notty, 120 .d_poll = nopoll, 121 .d_mmap = nommap, 122 .d_kqfilter = nokqfilter, 123 .d_discard = nodiscard, 124 .d_flag = D_OTHER | D_MPSAFE 125 }; 126 127 static int 128 gpio_match(device_t parent, cfdata_t cf, void *aux) 129 { 130 return 1; 131 } 132 133 int 134 gpio_submatch(device_t parent, cfdata_t cf, const int *ip, void *aux) 135 { 136 struct gpio_attach_args *ga = aux; 137 138 if (ga->ga_offset == -1) 139 return 0; 140 141 return strcmp(ga->ga_dvname, cf->cf_name) == 0; 142 } 143 144 static bool 145 gpio_resume(device_t self, const pmf_qual_t *qual) 146 { 147 struct gpio_softc *sc = device_private(self); 148 int pin; 149 150 for (pin = 0; pin < sc->sc_npins; pin++) { 151 gpiobus_pin_ctl(sc->sc_gc, pin, sc->sc_pins[pin].pin_flags); 152 gpiobus_pin_write(sc->sc_gc, pin, sc->sc_pins[pin].pin_state); 153 } 154 return true; 155 } 156 157 static void 158 gpio_childdetached(device_t self, device_t child) 159 { 160 #ifdef COMPAT_50 161 struct gpio_dev *gdev; 162 struct gpio_softc *sc; 163 int error; 164 165 /* 166 * gpio_childetached is serialized because it can be entered in 167 * different ways concurrently, e.g. via the GPIODETACH ioctl and 168 * drvctl(8) or modunload(8). 169 */ 170 sc = device_private(self); 171 error = 0; 172 mutex_enter(&sc->sc_mtx); 173 while (sc->sc_attach_busy) { 174 error = cv_wait_sig(&sc->sc_attach, &sc->sc_mtx); 175 if (error) 176 break; 177 } 178 if (!error) 179 sc->sc_attach_busy = 1; 180 mutex_exit(&sc->sc_mtx); 181 if (error) 182 return; 183 184 KERNEL_LOCK(1, NULL); 185 LIST_FOREACH(gdev, &sc->sc_devs, sc_next) 186 if (gdev->sc_dev == child) { 187 LIST_REMOVE(gdev, sc_next); 188 kmem_free(gdev, sizeof(struct gpio_dev)); 189 break; 190 } 191 KERNEL_UNLOCK_ONE(NULL); 192 193 mutex_enter(&sc->sc_mtx); 194 sc->sc_attach_busy = 0; 195 cv_signal(&sc->sc_attach); 196 mutex_exit(&sc->sc_mtx); 197 #endif 198 } 199 200 static int 201 gpio_rescan(device_t self, const char *ifattr, const int *locators) 202 { 203 204 KERNEL_LOCK(1, NULL); 205 config_search(self, NULL, 206 CFARGS(.search = gpio_search)); 207 KERNEL_UNLOCK_ONE(NULL); 208 209 return 0; 210 } 211 212 static const char * 213 gpio_pin_defname(struct gpio_softc *sc, int pin) 214 { 215 KASSERT(pin >= 0); 216 217 #ifdef FDT 218 devhandle_t devhandle = device_handle(sc->sc_dev); 219 220 if (devhandle_type(devhandle) == DEVHANDLE_TYPE_OF) { 221 return fdtbus_get_string_index(devhandle_to_of(devhandle), 222 "gpio-line-names", pin); 223 } 224 #endif /* FDT */ 225 226 return NULL; 227 } 228 229 static void 230 gpio_attach(device_t parent, device_t self, void *aux) 231 { 232 struct gpio_softc *sc = device_private(self); 233 struct gpiobus_attach_args *gba = aux; 234 struct gpio_name *nm; 235 int pin; 236 237 sc->sc_dev = self; 238 sc->sc_gc = gba->gba_gc; 239 sc->sc_pins = gba->gba_pins; 240 sc->sc_npins = gba->gba_npins; 241 242 aprint_normal(": %d pins\n", sc->sc_npins); 243 aprint_naive("\n"); 244 245 /* Configure default pin names */ 246 for (pin = 0; pin < sc->sc_npins; pin++) { 247 const char *defname; 248 249 defname = gpio_pin_defname(sc, pin); 250 if (defname == NULL && 251 sc->sc_pins[pin].pin_defname[0] != '\0') { 252 defname = sc->sc_pins[pin].pin_defname; 253 } 254 if (defname == NULL) { 255 continue; 256 } 257 nm = kmem_alloc(sizeof(*nm), KM_SLEEP); 258 strlcpy(nm->gp_name, defname, sizeof(nm->gp_name)); 259 nm->gp_pin = pin; 260 LIST_INSERT_HEAD(&sc->sc_names, nm, gp_next); 261 } 262 263 if (!pmf_device_register(self, NULL, gpio_resume)) 264 aprint_error_dev(self, "couldn't establish power handler\n"); 265 mutex_init(&sc->sc_mtx, MUTEX_DEFAULT, IPL_VM); 266 cv_init(&sc->sc_ioctl, "gpioctl"); 267 cv_init(&sc->sc_attach, "gpioatch"); 268 /* 269 * Attach all devices that can be connected to the GPIO pins 270 * described in the kernel configuration file. 271 */ 272 gpio_rescan(self, "gpio", NULL); 273 } 274 275 static int 276 gpio_detach(device_t self, int flags) 277 { 278 struct gpio_softc *sc; 279 int rc; 280 281 sc = device_private(self); 282 283 if ((rc = config_detach_children(self, flags)) != 0) 284 return rc; 285 mutex_destroy(&sc->sc_mtx); 286 cv_destroy(&sc->sc_ioctl); 287 #if 0 288 int maj, mn; 289 290 /* Locate the major number */ 291 for (maj = 0; maj < nchrdev; maj++) 292 if (cdevsw[maj].d_open == gpioopen) 293 break; 294 295 /* Nuke the vnodes for any open instances (calls close) */ 296 mn = device_unit(self); 297 vdevgone(maj, mn, mn, VCHR); 298 #endif 299 return 0; 300 } 301 302 static int 303 gpio_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux) 304 { 305 struct gpio_attach_args ga; 306 size_t namlen; 307 308 ga.ga_gpio = device_private(parent); 309 ga.ga_offset = cf->cf_loc[GPIOCF_OFFSET]; 310 ga.ga_mask = cf->cf_loc[GPIOCF_MASK]; 311 ga.ga_flags = cf->cf_loc[GPIOCF_FLAG]; 312 namlen = strlen(cf->cf_name) + 1; 313 ga.ga_dvname = kmem_alloc(namlen, KM_SLEEP); 314 strcpy(ga.ga_dvname, cf->cf_name); 315 316 if (config_probe(parent, cf, &ga)) 317 config_attach(parent, cf, &ga, gpio_print, CFARGS_NONE); 318 kmem_free(ga.ga_dvname, namlen); 319 return 0; 320 } 321 322 int 323 gpio_print(void *aux, const char *pnp) 324 { 325 struct gpio_attach_args *ga = aux; 326 int i; 327 328 aprint_normal(" pins"); 329 for (i = 0; i < 32; i++) 330 if (ga->ga_mask & (1 << i)) 331 aprint_normal(" %d", ga->ga_offset + i); 332 333 return UNCONF; 334 } 335 336 int 337 gpiobus_print(void *aux, const char *pnp) 338 { 339 #if 0 340 struct gpiobus_attach_args *gba = aux; 341 #endif 342 if (pnp != NULL) 343 aprint_normal("gpiobus at %s", pnp); 344 345 return UNCONF; 346 } 347 348 void * 349 gpio_find_device(const char *name) 350 { 351 device_t gpio_dev; 352 gpio_dev = device_find_by_xname(name); 353 if (gpio_dev == NULL) 354 return NULL; 355 return device_private(gpio_dev); 356 } 357 358 const char * 359 gpio_get_name(void *gpio) 360 { 361 struct gpio_softc *sc = gpio; 362 return device_xname(sc->sc_dev); 363 } 364 365 /* return 1 if all pins can be mapped, 0 if not */ 366 int 367 gpio_pin_can_map(void *gpio, int offset, uint32_t mask) 368 { 369 struct gpio_softc *sc = gpio; 370 int npins, pin, i; 371 372 npins = gpio_npins(mask); 373 if (npins > sc->sc_npins) 374 return 0; 375 376 for (npins = 0, i = 0; i < 32; i++) 377 if (mask & (1 << i)) { 378 pin = offset + i; 379 if (pin < 0 || pin >= sc->sc_npins) 380 return 0; 381 if (sc->sc_pins[pin].pin_mapped) 382 return 0; 383 } 384 385 return 1; 386 } 387 388 int 389 gpio_pin_map(void *gpio, int offset, uint32_t mask, struct gpio_pinmap *map) 390 { 391 struct gpio_softc *sc = gpio; 392 int npins, pin, i; 393 394 npins = gpio_npins(mask); 395 if (npins > sc->sc_npins) 396 return 1; 397 398 for (npins = 0, i = 0; i < 32; i++) 399 if (mask & (1 << i)) { 400 pin = offset + i; 401 if (pin < 0 || pin >= sc->sc_npins) 402 return 1; 403 if (sc->sc_pins[pin].pin_mapped) 404 return 1; 405 sc->sc_pins[pin].pin_mapped = 1; 406 map->pm_map[npins++] = pin; 407 } 408 map->pm_size = npins; 409 410 return 0; 411 } 412 413 void 414 gpio_pin_unmap(void *gpio, struct gpio_pinmap *map) 415 { 416 struct gpio_softc *sc = gpio; 417 int pin, i; 418 419 for (i = 0; i < map->pm_size; i++) { 420 pin = map->pm_map[i]; 421 sc->sc_pins[pin].pin_mapped = 0; 422 } 423 } 424 425 int 426 gpio_pin_read(void *gpio, struct gpio_pinmap *map, int pin) 427 { 428 struct gpio_softc *sc = gpio; 429 430 return gpiobus_pin_read(sc->sc_gc, map->pm_map[pin]); 431 } 432 433 void 434 gpio_pin_write(void *gpio, struct gpio_pinmap *map, int pin, int value) 435 { 436 struct gpio_softc *sc = gpio; 437 438 gpiobus_pin_write(sc->sc_gc, map->pm_map[pin], value); 439 sc->sc_pins[map->pm_map[pin]].pin_state = value; 440 } 441 442 int 443 gpio_pin_get_conf(void *gpio, struct gpio_pinmap *map, int pin) 444 { 445 struct gpio_softc *sc = gpio; 446 int rv; 447 448 mutex_enter(&sc->sc_mtx); 449 rv = sc->sc_pins[map->pm_map[pin]].pin_flags; 450 mutex_exit(&sc->sc_mtx); 451 452 return (rv); 453 } 454 455 bool 456 gpio_pin_set_conf(void *gpio, struct gpio_pinmap *map, int pin, int flags) 457 { 458 struct gpio_softc *sc = gpio; 459 int checkflags = flags & GPIO_PIN_HWCAPS; 460 461 if ((sc->sc_pins[map->pm_map[pin]].pin_caps & checkflags) != checkflags) 462 return (false); 463 464 gpio_pin_ctl(gpio, map, pin, flags); 465 466 return (true); 467 } 468 469 void 470 gpio_pin_ctl(void *gpio, struct gpio_pinmap *map, int pin, int flags) 471 { 472 struct gpio_softc *sc = gpio; 473 474 /* loosey-goosey version of gpio_pin_set_conf(). */ 475 476 mutex_enter(&sc->sc_mtx); 477 gpiobus_pin_ctl(sc->sc_gc, map->pm_map[pin], flags); 478 sc->sc_pins[map->pm_map[pin]].pin_flags = flags; 479 mutex_exit(&sc->sc_mtx); 480 } 481 482 int 483 gpio_pin_caps(void *gpio, struct gpio_pinmap *map, int pin) 484 { 485 struct gpio_softc *sc = gpio; 486 487 return sc->sc_pins[map->pm_map[pin]].pin_caps; 488 } 489 490 int 491 gpio_pin_intrcaps(void *gpio, struct gpio_pinmap *map, int pin) 492 { 493 struct gpio_softc *sc = gpio; 494 495 return sc->sc_pins[map->pm_map[pin]].pin_intrcaps; 496 } 497 498 static int 499 gpio_irqmode_sanitize(int irqmode) 500 { 501 int has_edge, has_level; 502 503 has_edge = irqmode & GPIO_INTR_EDGE_MASK; 504 has_level = irqmode & GPIO_INTR_LEVEL_MASK; 505 506 /* Must specify an interrupt mode. */ 507 if ((irqmode & GPIO_INTR_MODE_MASK) == 0) 508 return (0); 509 510 /* Can't specify edge and level together */ 511 if (has_level && has_edge) 512 return (0); 513 514 /* "Be liberal in what you accept..." */ 515 if (has_edge) { 516 if (irqmode & GPIO_INTR_DOUBLE_EDGE) { 517 /* if DOUBLE is set, just pass through DOUBLE */ 518 irqmode = (irqmode & ~GPIO_INTR_EDGE_MASK) | 519 GPIO_INTR_DOUBLE_EDGE; 520 } else if ((irqmode ^ 521 (GPIO_INTR_POS_EDGE | GPIO_INTR_NEG_EDGE)) == 0) { 522 /* both POS and NEG set; treat as DOUBLE */ 523 irqmode = (irqmode & ~GPIO_INTR_EDGE_MASK) | 524 GPIO_INTR_DOUBLE_EDGE; 525 } 526 } else { 527 /* Can't specify both levels together. */ 528 if (has_level == GPIO_INTR_LEVEL_MASK) 529 return (0); 530 } 531 532 return (irqmode); 533 } 534 535 bool 536 gpio_pin_irqmode_issupported(void *gpio, struct gpio_pinmap *map, 537 int pin, int irqmode) 538 { 539 struct gpio_softc *sc = gpio; 540 int match; 541 542 irqmode = gpio_irqmode_sanitize(irqmode) & GPIO_INTR_MODE_MASK; 543 544 /* Make sure the pin can do what is being asked. */ 545 match = sc->sc_pins[map->pm_map[pin]].pin_intrcaps & irqmode; 546 547 return (irqmode && irqmode == match); 548 } 549 550 void * 551 gpio_intr_establish(void *gpio, struct gpio_pinmap *map, int pin, int ipl, 552 int irqmode, int (*func)(void *), void *arg) 553 { 554 struct gpio_softc *sc = gpio; 555 556 if (sc->sc_gc->gp_intr_establish == NULL) 557 return (NULL); 558 559 irqmode = gpio_irqmode_sanitize(irqmode); 560 if (irqmode == 0) 561 return (NULL); 562 563 if (! gpio_pin_irqmode_issupported(gpio, map, pin, irqmode)) 564 return (NULL); 565 566 /* XXX Right now, everything has to be at IPL_VM. */ 567 if (ipl != IPL_VM) 568 return (NULL); 569 570 return ((*sc->sc_gc->gp_intr_establish)(sc->sc_gc->gp_cookie, 571 sc->sc_pins[map->pm_map[pin]].pin_num, ipl, irqmode, func, arg)); 572 } 573 574 void 575 gpio_intr_disestablish(void *gpio, void *ih) 576 { 577 struct gpio_softc *sc = gpio; 578 579 if (sc->sc_gc->gp_intr_disestablish != NULL && ih != NULL) 580 (*sc->sc_gc->gp_intr_disestablish)(sc->sc_gc->gp_cookie, ih); 581 } 582 583 bool 584 gpio_intr_str(void *gpio, struct gpio_pinmap *map, int pin, int irqmode, 585 char *intrstr, size_t intrstrlen) 586 { 587 struct gpio_softc *sc = gpio; 588 const char *mode; 589 char hwstr[64]; 590 591 if (sc->sc_gc->gp_intr_str == NULL) 592 return (false); 593 594 irqmode = gpio_irqmode_sanitize(irqmode); 595 if (irqmode == 0) 596 return (false); 597 598 if (irqmode & GPIO_INTR_DOUBLE_EDGE) 599 mode = "double edge"; 600 else if (irqmode & GPIO_INTR_POS_EDGE) 601 mode = "positive edge"; 602 else if (irqmode & GPIO_INTR_NEG_EDGE) 603 mode = "negative edge"; 604 else if (irqmode & GPIO_INTR_HIGH_LEVEL) 605 mode = "high level"; 606 else if (irqmode & GPIO_INTR_LOW_LEVEL) 607 mode = "low level"; 608 else 609 return (false); 610 611 if (! (*sc->sc_gc->gp_intr_str)(sc->sc_gc->gp_cookie, 612 sc->sc_pins[map->pm_map[pin]].pin_num, 613 irqmode, hwstr, sizeof(hwstr))) 614 return (false); 615 616 (void) snprintf(intrstr, intrstrlen, "%s (%s)", hwstr, mode); 617 618 return (true); 619 } 620 621 int 622 gpio_npins(uint32_t mask) 623 { 624 int npins, i; 625 626 for (npins = 0, i = 0; i < 32; i++) 627 if (mask & (1 << i)) 628 npins++; 629 630 return npins; 631 } 632 633 int 634 gpio_lock(void *data) 635 { 636 struct gpio_softc *sc; 637 int error; 638 639 error = 0; 640 sc = data; 641 mutex_enter(&sc->sc_mtx); 642 while (sc->sc_ioctl_busy) { 643 error = cv_wait_sig(&sc->sc_ioctl, &sc->sc_mtx); 644 if (error) 645 break; 646 } 647 if (!error) 648 sc->sc_ioctl_busy = 1; 649 mutex_exit(&sc->sc_mtx); 650 return error; 651 } 652 653 void 654 gpio_unlock(void *data) 655 { 656 struct gpio_softc *sc; 657 658 sc = data; 659 mutex_enter(&sc->sc_mtx); 660 sc->sc_ioctl_busy = 0; 661 cv_signal(&sc->sc_ioctl); 662 mutex_exit(&sc->sc_mtx); 663 } 664 665 int 666 gpioopen(dev_t dev, int flag, int mode, struct lwp *l) 667 { 668 struct gpio_softc *sc; 669 670 sc = device_lookup_private(&gpio_cd, minor(dev)); 671 if (sc == NULL) 672 return ENXIO; 673 674 return gpiobus_open(sc->sc_gc, sc->sc_dev); 675 } 676 677 int 678 gpioclose(dev_t dev, int flag, int mode, struct lwp *l) 679 { 680 struct gpio_softc *sc; 681 682 sc = device_lookup_private(&gpio_cd, minor(dev)); 683 return gpiobus_close(sc->sc_gc, sc->sc_dev); 684 } 685 686 static int 687 gpio_pinbyname(struct gpio_softc *sc, char *gp_name) 688 { 689 struct gpio_name *nm; 690 691 LIST_FOREACH(nm, &sc->sc_names, gp_next) 692 if (!strcmp(nm->gp_name, gp_name)) 693 return nm->gp_pin; 694 return -1; 695 } 696 697 int 698 gpioioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l) 699 { 700 int error; 701 struct gpio_softc *sc; 702 703 sc = device_lookup_private(&gpio_cd, minor(dev)); 704 705 error = gpio_lock(sc); 706 if (error) 707 return error; 708 709 error = gpio_ioctl(sc, cmd, data, flag, l); 710 gpio_unlock(sc); 711 return error; 712 } 713 714 static int 715 gpio_ioctl(struct gpio_softc *sc, u_long cmd, void *data, int flag, 716 struct lwp *l) 717 { 718 gpio_chipset_tag_t gc; 719 struct gpio_info *info; 720 struct gpio_attach *attach; 721 struct gpio_attach_args ga; 722 struct gpio_req *req; 723 struct gpio_name *nm; 724 struct gpio_set *set; 725 #ifdef COMPAT_50 726 struct gpio_dev *gdev; 727 #endif 728 device_t dv; 729 cfdata_t cf; 730 int locs[GPIOCF_NLOCS]; 731 int error, pin, value, flags; 732 733 gc = sc->sc_gc; 734 ga.ga_flags = 0; 735 736 if (cmd != GPIOINFO && !device_is_active(sc->sc_dev)) { 737 DPRINTF(("%s: device is not active\n", 738 device_xname(sc->sc_dev))); 739 return EBUSY; 740 } 741 742 switch (cmd) { 743 case GPIOINFO: 744 info = data; 745 info->gpio_npins = sc->sc_npins; 746 break; 747 case GPIOREAD: 748 req = data; 749 750 if (req->gp_name[0] != '\0') 751 req->gp_pin = gpio_pinbyname(sc, req->gp_name); 752 pin = req->gp_pin; 753 754 if (pin < 0 || pin >= sc->sc_npins) 755 return EINVAL; 756 757 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) && 758 kauth_authorize_device(l->l_cred, 759 KAUTH_DEVICE_GPIO_PINSET, NULL, NULL, NULL, NULL)) 760 return EPERM; 761 762 /* return read value */ 763 req->gp_value = gpiobus_pin_read(gc, pin); 764 LIST_FOREACH(nm, &sc->sc_names, gp_next) 765 if (nm->gp_pin == pin) { 766 strlcpy(req->gp_name, nm->gp_name, GPIOMAXNAME); 767 break; 768 } 769 break; 770 case GPIOWRITE: 771 if ((flag & FWRITE) == 0) 772 return EBADF; 773 774 req = data; 775 776 if (req->gp_name[0] != '\0') 777 pin = gpio_pinbyname(sc, req->gp_name); 778 else 779 pin = req->gp_pin; 780 781 if (pin < 0 || pin >= sc->sc_npins) 782 return EINVAL; 783 784 if (sc->sc_pins[pin].pin_mapped) 785 return EBUSY; 786 787 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) && 788 kauth_authorize_device(l->l_cred, 789 KAUTH_DEVICE_GPIO_PINSET, NULL, NULL, NULL, NULL)) 790 return EPERM; 791 792 value = req->gp_value; 793 if (value != GPIO_PIN_LOW && value != GPIO_PIN_HIGH) 794 return EINVAL; 795 796 /* return old value */ 797 req->gp_value = gpiobus_pin_read(gc, pin); 798 gpiobus_pin_write(gc, pin, value); 799 /* update current value */ 800 sc->sc_pins[pin].pin_state = value; 801 break; 802 case GPIOTOGGLE: 803 if ((flag & FWRITE) == 0) 804 return EBADF; 805 806 req = data; 807 808 if (req->gp_name[0] != '\0') 809 pin = gpio_pinbyname(sc, req->gp_name); 810 else 811 pin = req->gp_pin; 812 813 if (pin < 0 || pin >= sc->sc_npins) 814 return EINVAL; 815 816 if (sc->sc_pins[pin].pin_mapped) 817 return EBUSY; 818 819 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) && 820 kauth_authorize_device(l->l_cred, 821 KAUTH_DEVICE_GPIO_PINSET, NULL, NULL, NULL, NULL)) 822 return EPERM; 823 824 value = (sc->sc_pins[pin].pin_state == GPIO_PIN_LOW ? 825 GPIO_PIN_HIGH : GPIO_PIN_LOW); 826 gpiobus_pin_write(gc, pin, value); 827 /* return old value */ 828 req->gp_value = sc->sc_pins[pin].pin_state; 829 /* update current value */ 830 sc->sc_pins[pin].pin_state = value; 831 break; 832 case GPIOATTACH: 833 attach = data; 834 ga.ga_flags = attach->ga_flags; 835 #ifdef COMPAT_50 836 /* FALLTHROUGH */ 837 case GPIOATTACH50: 838 /* 839 * The double assignment to 'attach' in case of GPIOATTACH 840 * and COMPAT_50 is on purpose. It ensures backward 841 * compatibility in case we are called through the old 842 * GPIOATTACH50 ioctl(2), which had not the ga_flags field 843 * in struct gpio_attach. 844 */ 845 attach = data; 846 #endif 847 if (kauth_authorize_device(l->l_cred, 848 KAUTH_DEVICE_GPIO_PINSET, NULL, NULL, NULL, NULL)) 849 return EPERM; 850 851 /* do not try to attach if the pins are already mapped */ 852 if (!gpio_pin_can_map(sc, attach->ga_offset, attach->ga_mask)) 853 return EBUSY; 854 855 error = 0; 856 mutex_enter(&sc->sc_mtx); 857 while (sc->sc_attach_busy) { 858 error = cv_wait_sig(&sc->sc_attach, &sc->sc_mtx); 859 if (error) 860 break; 861 } 862 if (!error) 863 sc->sc_attach_busy = 1; 864 mutex_exit(&sc->sc_mtx); 865 if (error) 866 return EBUSY; 867 868 ga.ga_gpio = sc; 869 /* Don't access attach->ga_flags here. */ 870 ga.ga_dvname = attach->ga_dvname; 871 ga.ga_offset = attach->ga_offset; 872 ga.ga_mask = attach->ga_mask; 873 DPRINTF(("%s: attach %s with offset %d, mask " 874 "0x%02x, and flags 0x%02x\n", device_xname(sc->sc_dev), 875 ga.ga_dvname, ga.ga_offset, ga.ga_mask, ga.ga_flags)); 876 877 locs[GPIOCF_OFFSET] = ga.ga_offset; 878 locs[GPIOCF_MASK] = ga.ga_mask; 879 locs[GPIOCF_FLAG] = ga.ga_flags; 880 881 KERNEL_LOCK(1, NULL); 882 cf = config_search(sc->sc_dev, &ga, 883 CFARGS(.locators = locs)); 884 if (cf != NULL) { 885 dv = config_attach(sc->sc_dev, cf, &ga, 886 gpiobus_print, 887 CFARGS(.locators = locs)); 888 #ifdef COMPAT_50 889 if (dv != NULL) { 890 gdev = kmem_alloc(sizeof(struct gpio_dev), 891 KM_SLEEP); 892 gdev->sc_dev = dv; 893 LIST_INSERT_HEAD(&sc->sc_devs, gdev, sc_next); 894 } else 895 error = EINVAL; 896 #else 897 if (dv == NULL) 898 error = EINVAL; 899 #endif 900 } else 901 error = EINVAL; 902 KERNEL_UNLOCK_ONE(NULL); 903 904 mutex_enter(&sc->sc_mtx); 905 sc->sc_attach_busy = 0; 906 cv_signal(&sc->sc_attach); 907 mutex_exit(&sc->sc_mtx); 908 return error; 909 case GPIOSET: 910 if (kauth_authorize_device(l->l_cred, 911 KAUTH_DEVICE_GPIO_PINSET, NULL, NULL, NULL, NULL)) 912 return EPERM; 913 914 set = data; 915 916 if (set->gp_name[0] != '\0') 917 pin = gpio_pinbyname(sc, set->gp_name); 918 else 919 pin = set->gp_pin; 920 921 if (pin < 0 || pin >= sc->sc_npins) 922 return EINVAL; 923 flags = set->gp_flags; 924 925 /* check that the controller supports all requested flags */ 926 if ((flags & sc->sc_pins[pin].pin_caps) != flags) 927 return ENODEV; 928 flags = set->gp_flags; 929 930 set->gp_caps = sc->sc_pins[pin].pin_caps; 931 /* return old value */ 932 set->gp_flags = sc->sc_pins[pin].pin_flags; 933 934 if (flags > 0) { 935 flags |= GPIO_PIN_SET; 936 gpiobus_pin_ctl(gc, pin, flags); 937 /* update current value */ 938 sc->sc_pins[pin].pin_flags = flags; 939 } 940 941 /* rename pin or new pin? */ 942 if (set->gp_name2[0] != '\0') { 943 struct gpio_name *gnm; 944 945 gnm = NULL; 946 LIST_FOREACH(nm, &sc->sc_names, gp_next) { 947 if (!strcmp(nm->gp_name, set->gp_name2) && 948 nm->gp_pin != pin) 949 return EINVAL; /* duplicate name */ 950 if (nm->gp_pin == pin) 951 gnm = nm; 952 } 953 if (gnm != NULL) 954 strlcpy(gnm->gp_name, set->gp_name2, 955 sizeof(gnm->gp_name)); 956 else { 957 nm = kmem_alloc(sizeof(struct gpio_name), 958 KM_SLEEP); 959 strlcpy(nm->gp_name, set->gp_name2, 960 sizeof(nm->gp_name)); 961 nm->gp_pin = set->gp_pin; 962 LIST_INSERT_HEAD(&sc->sc_names, nm, gp_next); 963 } 964 } 965 break; 966 case GPIOUNSET: 967 if (kauth_authorize_device(l->l_cred, 968 KAUTH_DEVICE_GPIO_PINSET, NULL, NULL, NULL, NULL)) 969 return EPERM; 970 971 set = data; 972 if (set->gp_name[0] != '\0') 973 pin = gpio_pinbyname(sc, set->gp_name); 974 else 975 pin = set->gp_pin; 976 977 if (pin < 0 || pin >= sc->sc_npins) 978 return EINVAL; 979 if (sc->sc_pins[pin].pin_mapped) 980 return EBUSY; 981 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET)) 982 return EINVAL; 983 984 LIST_FOREACH(nm, &sc->sc_names, gp_next) { 985 if (nm->gp_pin == pin) { 986 LIST_REMOVE(nm, gp_next); 987 kmem_free(nm, sizeof(struct gpio_name)); 988 break; 989 } 990 } 991 sc->sc_pins[pin].pin_flags &= ~GPIO_PIN_SET; 992 break; 993 default: 994 #ifdef COMPAT_50 995 /* Try the old API */ 996 DPRINTF(("%s: trying the old API\n", device_xname(sc->sc_dev))); 997 return gpio_ioctl_oapi(sc, cmd, data, flag, l); 998 #else 999 return ENOTTY; 1000 #endif 1001 } 1002 return 0; 1003 } 1004 1005 #ifdef COMPAT_50 1006 static int 1007 gpio_ioctl_oapi(struct gpio_softc *sc, u_long cmd, void *data, int flag, 1008 struct lwp *l) 1009 { 1010 gpio_chipset_tag_t gc; 1011 struct gpio_pin_op *op; 1012 struct gpio_pin_ctl *ctl; 1013 struct gpio_attach *attach; 1014 struct gpio_dev *gdev; 1015 1016 int error, pin, value, flags; 1017 1018 gc = sc->sc_gc; 1019 1020 switch (cmd) { 1021 case GPIOPINREAD: 1022 op = data; 1023 1024 pin = op->gp_pin; 1025 1026 if (pin < 0 || pin >= sc->sc_npins) 1027 return EINVAL; 1028 1029 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) && 1030 kauth_authorize_device(l->l_cred, 1031 KAUTH_DEVICE_GPIO_PINSET, NULL, NULL, NULL, NULL)) 1032 return EPERM; 1033 1034 /* return read value */ 1035 op->gp_value = gpiobus_pin_read(gc, pin); 1036 break; 1037 case GPIOPINWRITE: 1038 if ((flag & FWRITE) == 0) 1039 return EBADF; 1040 1041 op = data; 1042 1043 pin = op->gp_pin; 1044 1045 if (pin < 0 || pin >= sc->sc_npins) 1046 return EINVAL; 1047 1048 if (sc->sc_pins[pin].pin_mapped) 1049 return EBUSY; 1050 1051 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) && 1052 kauth_authorize_device(l->l_cred, 1053 KAUTH_DEVICE_GPIO_PINSET, NULL, NULL, NULL, NULL)) 1054 return EPERM; 1055 1056 value = op->gp_value; 1057 if (value != GPIO_PIN_LOW && value != GPIO_PIN_HIGH) 1058 return EINVAL; 1059 1060 gpiobus_pin_write(gc, pin, value); 1061 /* return old value */ 1062 op->gp_value = sc->sc_pins[pin].pin_state; 1063 /* update current value */ 1064 sc->sc_pins[pin].pin_state = value; 1065 break; 1066 case GPIOPINTOGGLE: 1067 if ((flag & FWRITE) == 0) 1068 return EBADF; 1069 1070 op = data; 1071 1072 pin = op->gp_pin; 1073 1074 if (pin < 0 || pin >= sc->sc_npins) 1075 return EINVAL; 1076 1077 if (sc->sc_pins[pin].pin_mapped) 1078 return EBUSY; 1079 1080 if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) && 1081 kauth_authorize_device(l->l_cred, 1082 KAUTH_DEVICE_GPIO_PINSET, NULL, NULL, NULL, NULL)) 1083 return EPERM; 1084 1085 value = (sc->sc_pins[pin].pin_state == GPIO_PIN_LOW ? 1086 GPIO_PIN_HIGH : GPIO_PIN_LOW); 1087 gpiobus_pin_write(gc, pin, value); 1088 /* return old value */ 1089 op->gp_value = sc->sc_pins[pin].pin_state; 1090 /* update current value */ 1091 sc->sc_pins[pin].pin_state = value; 1092 break; 1093 case GPIOPINCTL: 1094 ctl = data; 1095 1096 if (kauth_authorize_device(l->l_cred, 1097 KAUTH_DEVICE_GPIO_PINSET, NULL, NULL, NULL, NULL)) 1098 return EPERM; 1099 1100 pin = ctl->gp_pin; 1101 1102 if (pin < 0 || pin >= sc->sc_npins) 1103 return EINVAL; 1104 if (sc->sc_pins[pin].pin_mapped) 1105 return EBUSY; 1106 flags = ctl->gp_flags; 1107 1108 /* check that the controller supports all requested flags */ 1109 if ((flags & sc->sc_pins[pin].pin_caps) != flags) 1110 return ENODEV; 1111 1112 ctl->gp_caps = sc->sc_pins[pin].pin_caps; 1113 /* return old value */ 1114 ctl->gp_flags = sc->sc_pins[pin].pin_flags; 1115 if (flags > 0) { 1116 gpiobus_pin_ctl(gc, pin, flags); 1117 /* update current value */ 1118 sc->sc_pins[pin].pin_flags = flags; 1119 } 1120 break; 1121 case GPIODETACH50: 1122 /* FALLTHOUGH */ 1123 case GPIODETACH: 1124 if (kauth_authorize_device(l->l_cred, 1125 KAUTH_DEVICE_GPIO_PINSET, NULL, NULL, NULL, NULL)) 1126 return EPERM; 1127 1128 error = 0; 1129 mutex_enter(&sc->sc_mtx); 1130 while (sc->sc_attach_busy) { 1131 error = cv_wait_sig(&sc->sc_attach, &sc->sc_mtx); 1132 if (error) 1133 break; 1134 } 1135 if (!error) 1136 sc->sc_attach_busy = 1; 1137 mutex_exit(&sc->sc_mtx); 1138 if (error) 1139 return EBUSY; 1140 1141 KERNEL_LOCK(1, NULL); 1142 attach = data; 1143 LIST_FOREACH(gdev, &sc->sc_devs, sc_next) { 1144 if (strcmp(device_xname(gdev->sc_dev), 1145 attach->ga_dvname) == 0) { 1146 mutex_enter(&sc->sc_mtx); 1147 sc->sc_attach_busy = 0; 1148 cv_signal(&sc->sc_attach); 1149 mutex_exit(&sc->sc_mtx); 1150 1151 if (config_detach(gdev->sc_dev, 0) == 0) { 1152 KERNEL_UNLOCK_ONE(NULL); 1153 return 0; 1154 } 1155 break; 1156 } 1157 } 1158 KERNEL_UNLOCK_ONE(NULL); 1159 1160 if (gdev == NULL) { 1161 mutex_enter(&sc->sc_mtx); 1162 sc->sc_attach_busy = 0; 1163 cv_signal(&sc->sc_attach); 1164 mutex_exit(&sc->sc_mtx); 1165 } 1166 return EINVAL; 1167 1168 default: 1169 return ENOTTY; 1170 } 1171 return 0; 1172 } 1173 #endif /* COMPAT_50 */ 1174 1175 MODULE(MODULE_CLASS_DRIVER, gpio, NULL); 1176 1177 #ifdef _MODULE 1178 #include "ioconf.c" 1179 #endif 1180 1181 static int 1182 gpio_modcmd(modcmd_t cmd, void *opaque) 1183 { 1184 #ifdef _MODULE 1185 devmajor_t cmajor = NODEVMAJOR, bmajor = NODEVMAJOR; 1186 int error; 1187 #endif 1188 switch (cmd) { 1189 case MODULE_CMD_INIT: 1190 #ifdef _MODULE 1191 error = devsw_attach(gpio_cd.cd_name, NULL, &bmajor, 1192 &gpio_cdevsw, &cmajor); 1193 if (error) { 1194 aprint_error("%s: unable to register devsw\n", 1195 gpio_cd.cd_name); 1196 return error; 1197 } 1198 error = config_init_component(cfdriver_ioconf_gpio, 1199 cfattach_ioconf_gpio, cfdata_ioconf_gpio); 1200 if (error) { 1201 aprint_error("%s: unable to init component\n", 1202 gpio_cd.cd_name); 1203 devsw_detach(NULL, &gpio_cdevsw); 1204 return error; 1205 } 1206 #endif 1207 return 0; 1208 case MODULE_CMD_FINI: 1209 #ifdef _MODULE 1210 config_fini_component(cfdriver_ioconf_gpio, 1211 cfattach_ioconf_gpio, cfdata_ioconf_gpio); 1212 devsw_detach(NULL, &gpio_cdevsw); 1213 #endif 1214 return 0; 1215 default: 1216 return ENOTTY; 1217 } 1218 } 1219