1 /* $NetBSD: gpio.c,v 1.16 2008/04/29 14:07:36 cegger Exp $ */ 2 /* $OpenBSD: gpio.c,v 1.6 2006/01/14 12:33:49 grange Exp $ */ 3 4 /* 5 * Copyright (c) 2004, 2006 Alexander Yurchenko <grange@openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #include <sys/cdefs.h> 21 __KERNEL_RCSID(0, "$NetBSD: gpio.c,v 1.16 2008/04/29 14:07:36 cegger Exp $"); 22 23 /* 24 * General Purpose Input/Output framework. 25 */ 26 27 #include <sys/param.h> 28 #include <sys/systm.h> 29 #include <sys/conf.h> 30 #include <sys/device.h> 31 #include <sys/ioctl.h> 32 #include <sys/gpio.h> 33 #include <sys/vnode.h> 34 35 #include <dev/gpio/gpiovar.h> 36 37 #include "locators.h" 38 39 struct gpio_softc { 40 struct device sc_dev; 41 42 gpio_chipset_tag_t sc_gc; /* our GPIO controller */ 43 gpio_pin_t *sc_pins; /* pins array */ 44 int sc_npins; /* total number of pins */ 45 46 int sc_opened; 47 int sc_dying; 48 }; 49 50 int gpio_match(device_t, struct cfdata *, void *); 51 void gpio_attach(device_t, device_t, void *); 52 bool gpio_resume(device_t PMF_FN_PROTO); 53 int gpio_detach(device_t, int); 54 int gpio_activate(device_t, enum devact); 55 int gpio_search(device_t, struct cfdata *, const int *, void *); 56 int gpio_print(void *, const char *); 57 58 CFATTACH_DECL(gpio, sizeof(struct gpio_softc), 59 gpio_match, gpio_attach, gpio_detach, gpio_activate); 60 61 dev_type_open(gpioopen); 62 dev_type_close(gpioclose); 63 dev_type_ioctl(gpioioctl); 64 65 const struct cdevsw gpio_cdevsw = { 66 gpioopen, gpioclose, noread, nowrite, gpioioctl, 67 nostop, notty, nopoll, nommap, nokqfilter, D_OTHER, 68 }; 69 70 extern struct cfdriver gpio_cd; 71 72 int 73 gpio_match(device_t parent, struct cfdata *cf, void *aux) 74 { 75 76 return (1); 77 } 78 79 bool 80 gpio_resume(device_t self PMF_FN_ARGS) 81 { 82 struct gpio_softc *sc = device_private(self); 83 int pin; 84 85 for (pin = 0; pin < sc->sc_npins; pin++) { 86 gpiobus_pin_ctl(sc->sc_gc, pin, sc->sc_pins[pin].pin_flags); 87 gpiobus_pin_write(sc->sc_gc, pin, sc->sc_pins[pin].pin_state); 88 } 89 return true; 90 } 91 92 void 93 gpio_attach(device_t parent, device_t self, void *aux) 94 { 95 struct gpio_softc *sc = device_private(self); 96 struct gpiobus_attach_args *gba = aux; 97 98 sc->sc_gc = gba->gba_gc; 99 sc->sc_pins = gba->gba_pins; 100 sc->sc_npins = gba->gba_npins; 101 102 printf(": %d pins\n", sc->sc_npins); 103 104 if (!pmf_device_register(self, NULL, gpio_resume)) 105 aprint_error_dev(self, "couldn't establish power handler\n"); 106 107 /* 108 * Attach all devices that can be connected to the GPIO pins 109 * described in the kernel configuration file. 110 */ 111 config_search_ia(gpio_search, self, "gpio", sc); 112 } 113 114 int 115 gpio_detach(device_t self, int flags) 116 { 117 #if 0 118 int maj, mn; 119 120 /* Locate the major number */ 121 for (maj = 0; maj < nchrdev; maj++) 122 if (cdevsw[maj].d_open == gpioopen) 123 break; 124 125 /* Nuke the vnodes for any open instances (calls close) */ 126 mn = device_unit(self); 127 vdevgone(maj, mn, mn, VCHR); 128 #endif 129 130 return (0); 131 } 132 133 int 134 gpio_activate(device_t self, enum devact act) 135 { 136 struct gpio_softc *sc = device_private(self); 137 138 switch (act) { 139 case DVACT_ACTIVATE: 140 return (EOPNOTSUPP); 141 case DVACT_DEACTIVATE: 142 sc->sc_dying = 1; 143 break; 144 } 145 146 return (0); 147 } 148 149 int 150 gpio_search(device_t parent, struct cfdata *cf, 151 const int *ldesc, void *aux) 152 { 153 struct gpio_attach_args ga; 154 155 ga.ga_gpio = aux; 156 ga.ga_offset = cf->cf_loc[GPIOCF_OFFSET]; 157 ga.ga_mask = cf->cf_loc[GPIOCF_MASK]; 158 159 if (config_match(parent, cf, &ga) > 0) 160 config_attach(parent, cf, &ga, gpio_print); 161 162 return (0); 163 } 164 165 int 166 gpio_print(void *aux, const char *pnp) 167 { 168 struct gpio_attach_args *ga = aux; 169 int i; 170 171 printf(" pins"); 172 for (i = 0; i < 32; i++) 173 if (ga->ga_mask & (1 << i)) 174 printf(" %d", ga->ga_offset + i); 175 176 return (UNCONF); 177 } 178 179 int 180 gpiobus_print(void *aux, const char *pnp) 181 { 182 #if 0 183 struct gpiobus_attach_args *gba = aux; 184 #endif 185 if (pnp != NULL) 186 printf("%s at %s", "gpiobus", pnp); 187 188 return (UNCONF); 189 } 190 191 int 192 gpio_pin_map(void *gpio, int offset, u_int32_t mask, struct gpio_pinmap *map) 193 { 194 struct gpio_softc *sc = gpio; 195 int npins, pin, i; 196 197 npins = gpio_npins(mask); 198 if (npins > sc->sc_npins) 199 return (1); 200 201 for (npins = 0, i = 0; i < 32; i++) 202 if (mask & (1 << i)) { 203 pin = offset + i; 204 if (pin < 0 || pin >= sc->sc_npins) 205 return (1); 206 if (sc->sc_pins[pin].pin_mapped) 207 return (1); 208 sc->sc_pins[pin].pin_mapped = 1; 209 map->pm_map[npins++] = pin; 210 } 211 map->pm_size = npins; 212 213 return (0); 214 } 215 216 void 217 gpio_pin_unmap(void *gpio, struct gpio_pinmap *map) 218 { 219 struct gpio_softc *sc = gpio; 220 int pin, i; 221 222 for (i = 0; i < map->pm_size; i++) { 223 pin = map->pm_map[i]; 224 sc->sc_pins[pin].pin_mapped = 0; 225 } 226 } 227 228 int 229 gpio_pin_read(void *gpio, struct gpio_pinmap *map, int pin) 230 { 231 struct gpio_softc *sc = gpio; 232 233 return (gpiobus_pin_read(sc->sc_gc, map->pm_map[pin])); 234 } 235 236 void 237 gpio_pin_write(void *gpio, struct gpio_pinmap *map, int pin, int value) 238 { 239 struct gpio_softc *sc = gpio; 240 241 gpiobus_pin_write(sc->sc_gc, map->pm_map[pin], value); 242 sc->sc_pins[map->pm_map[pin]].pin_state = value; 243 } 244 245 void 246 gpio_pin_ctl(void *gpio, struct gpio_pinmap *map, int pin, int flags) 247 { 248 struct gpio_softc *sc = gpio; 249 250 return (gpiobus_pin_ctl(sc->sc_gc, map->pm_map[pin], flags)); 251 } 252 253 int 254 gpio_pin_caps(void *gpio, struct gpio_pinmap *map, int pin) 255 { 256 struct gpio_softc *sc = gpio; 257 258 return (sc->sc_pins[map->pm_map[pin]].pin_caps); 259 } 260 261 int 262 gpio_npins(u_int32_t mask) 263 { 264 int npins, i; 265 266 for (npins = 0, i = 0; i < 32; i++) 267 if (mask & (1 << i)) 268 npins++; 269 270 return (npins); 271 } 272 273 int 274 gpioopen(dev_t dev, int flag, int mode, 275 struct lwp *l) 276 { 277 struct gpio_softc *sc; 278 int ret; 279 280 sc = (struct gpio_softc *)device_lookup(&gpio_cd, minor(dev)); 281 if (sc == NULL) 282 return (ENXIO); 283 284 if (sc->sc_opened) 285 return (EBUSY); 286 287 if ((ret = gpiobus_open(sc->sc_gc, &sc->sc_dev))) 288 return ret; 289 290 sc->sc_opened = 1; 291 292 return (0); 293 } 294 295 int 296 gpioclose(dev_t dev, int flag, int mode, 297 struct lwp *l) 298 { 299 struct gpio_softc *sc; 300 301 sc = (struct gpio_softc *)device_lookup(&gpio_cd, minor(dev)); 302 gpiobus_close(sc->sc_gc, &sc->sc_dev); 303 sc->sc_opened = 0; 304 305 return (0); 306 } 307 308 int 309 gpioioctl(dev_t dev, u_long cmd, void *data, int flag, 310 struct lwp *l) 311 { 312 struct gpio_softc *sc; 313 gpio_chipset_tag_t gc; 314 struct gpio_info *info; 315 struct gpio_pin_op *op; 316 struct gpio_pin_ctl *ctl; 317 int pin, value, flags; 318 319 sc = (struct gpio_softc *)device_lookup(&gpio_cd, minor(dev)); 320 gc = sc->sc_gc; 321 322 if (cmd != GPIOINFO && !device_is_active(&sc->sc_dev)) 323 return EBUSY; 324 325 switch (cmd) { 326 case GPIOINFO: 327 info = (struct gpio_info *)data; 328 329 info->gpio_npins = sc->sc_npins; 330 break; 331 case GPIOPINREAD: 332 op = (struct gpio_pin_op *)data; 333 334 pin = op->gp_pin; 335 if (pin < 0 || pin >= sc->sc_npins) 336 return (EINVAL); 337 338 /* return read value */ 339 op->gp_value = gpiobus_pin_read(gc, pin); 340 break; 341 case GPIOPINWRITE: 342 op = (struct gpio_pin_op *)data; 343 344 pin = op->gp_pin; 345 if (pin < 0 || pin >= sc->sc_npins) 346 return (EINVAL); 347 if (sc->sc_pins[pin].pin_mapped) 348 return (EBUSY); 349 350 value = op->gp_value; 351 if (value != GPIO_PIN_LOW && value != GPIO_PIN_HIGH) 352 return (EINVAL); 353 354 gpiobus_pin_write(gc, pin, value); 355 /* return old value */ 356 op->gp_value = sc->sc_pins[pin].pin_state; 357 /* update current value */ 358 sc->sc_pins[pin].pin_state = value; 359 break; 360 case GPIOPINTOGGLE: 361 op = (struct gpio_pin_op *)data; 362 363 pin = op->gp_pin; 364 if (pin < 0 || pin >= sc->sc_npins) 365 return (EINVAL); 366 if (sc->sc_pins[pin].pin_mapped) 367 return (EBUSY); 368 369 value = (sc->sc_pins[pin].pin_state == GPIO_PIN_LOW ? 370 GPIO_PIN_HIGH : GPIO_PIN_LOW); 371 gpiobus_pin_write(gc, pin, value); 372 /* return old value */ 373 op->gp_value = sc->sc_pins[pin].pin_state; 374 /* update current value */ 375 sc->sc_pins[pin].pin_state = value; 376 break; 377 case GPIOPINCTL: 378 ctl = (struct gpio_pin_ctl *)data; 379 380 pin = ctl->gp_pin; 381 if (pin < 0 || pin >= sc->sc_npins) 382 return (EINVAL); 383 if (sc->sc_pins[pin].pin_mapped) 384 return (EBUSY); 385 386 flags = ctl->gp_flags; 387 /* check that the controller supports all requested flags */ 388 if ((flags & sc->sc_pins[pin].pin_caps) != flags) 389 return (ENODEV); 390 391 ctl->gp_caps = sc->sc_pins[pin].pin_caps; 392 /* return old value */ 393 ctl->gp_flags = sc->sc_pins[pin].pin_flags; 394 if (flags > 0) { 395 gpiobus_pin_ctl(gc, pin, flags); 396 /* update current value */ 397 sc->sc_pins[pin].pin_flags = flags; 398 } 399 break; 400 default: 401 return (ENOTTY); 402 } 403 404 return (0); 405 } 406