1 /* $NetBSD: ppi.c,v 1.1 2003/06/02 03:47:09 gmcgarry Exp $ */ 2 3 /*- 4 * Copyright (c) 1996-2003 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1982, 1990, 1993 41 * The Regents of the University of California. All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the University of 54 * California, Berkeley and its contributors. 55 * 4. Neither the name of the University nor the names of its contributors 56 * may be used to endorse or promote products derived from this software 57 * without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 * @(#)ppi.c 8.1 (Berkeley) 6/16/93 72 */ 73 74 /* 75 * Printer/Plotter GPIB interface 76 */ 77 78 #include <sys/cdefs.h> 79 __KERNEL_RCSID(0, "$NetBSD: ppi.c,v 1.1 2003/06/02 03:47:09 gmcgarry Exp $"); 80 81 #include <sys/param.h> 82 #include <sys/systm.h> 83 #include <sys/callout.h> 84 #include <sys/conf.h> 85 #include <sys/device.h> 86 #include <sys/malloc.h> 87 #include <sys/proc.h> 88 #include <sys/uio.h> 89 90 #include <dev/gpib/gpibvar.h> 91 92 #include <dev/gpib/ppiio.h> 93 94 struct ppi_softc { 95 struct device sc_dev; 96 gpib_chipset_tag_t sc_ic; 97 gpib_handle_t sc_hdl; 98 99 int sc_address; /* GPIB address */ 100 int sc_flags; 101 int sc_sec; 102 struct ppiparam sc_param; 103 #define sc_burst sc_param.burst 104 #define sc_timo sc_param.timo 105 #define sc_delay sc_param.delay 106 struct callout sc_timo_ch; 107 struct callout sc_start_ch; 108 }; 109 110 /* sc_flags values */ 111 #define PPIF_ALIVE 0x01 112 #define PPIF_OPEN 0x02 113 #define PPIF_UIO 0x04 114 #define PPIF_TIMO 0x08 115 #define PPIF_DELAY 0x10 116 117 int ppimatch(struct device *, struct cfdata *, void *); 118 void ppiattach(struct device *, struct device *, void *); 119 120 CFATTACH_DECL(ppi, sizeof(struct ppi_softc), 121 ppimatch, ppiattach, NULL, NULL); 122 123 extern struct cfdriver ppi_cd; 124 125 void ppicallback(void *, int); 126 void ppistart(void *); 127 128 void ppitimo(void *); 129 int ppirw(dev_t, struct uio *); 130 int ppihztoms(int); 131 int ppimstohz(int); 132 133 dev_type_open(ppiopen); 134 dev_type_close(ppiclose); 135 dev_type_read(ppiread); 136 dev_type_write(ppiwrite); 137 dev_type_ioctl(ppiioctl); 138 139 const struct cdevsw ppi_cdevsw = { 140 ppiopen, ppiclose, ppiread, ppiwrite, ppiioctl, 141 nostop, notty, nopoll, nommap, nokqfilter, 142 }; 143 144 #define UNIT(x) minor(x) 145 146 #ifdef DEBUG 147 int ppidebug = 0x80; 148 #define PDB_FOLLOW 0x01 149 #define PDB_IO 0x02 150 #define PDB_NOCHECK 0x80 151 #define DPRINTF(mask, str) if (ppidebug & (mask)) printf str 152 #else 153 #define DPRINTF(mask, str) /* nothing */ 154 #endif 155 156 int 157 ppimatch(parent, match, aux) 158 struct device *parent; 159 struct cfdata *match; 160 void *aux; 161 { 162 163 return (1); 164 } 165 166 void 167 ppiattach(parent, self, aux) 168 struct device *parent, *self; 169 void *aux; 170 { 171 struct ppi_softc *sc = (struct ppi_softc *)self; 172 struct gpib_attach_args *ga = aux; 173 174 printf("\n"); 175 176 sc->sc_ic = ga->ga_ic; 177 sc->sc_address = ga->ga_address; 178 179 callout_init(&sc->sc_timo_ch); 180 callout_init(&sc->sc_start_ch); 181 182 if (gpibregister(sc->sc_ic, sc->sc_address, ppicallback, sc, 183 &sc->sc_hdl)) { 184 printf("%s: can't register callback\n", sc->sc_dev.dv_xname); 185 return; 186 } 187 188 sc->sc_flags = PPIF_ALIVE; 189 } 190 191 int 192 ppiopen(dev, flags, fmt, p) 193 dev_t dev; 194 int flags, fmt; 195 struct proc *p; 196 { 197 int unit = UNIT(dev); 198 struct ppi_softc *sc; 199 200 if (unit >= ppi_cd.cd_ndevs || 201 (sc = ppi_cd.cd_devs[unit]) == NULL || 202 (sc->sc_flags & PPIF_ALIVE) == 0) 203 return (ENXIO); 204 205 DPRINTF(PDB_FOLLOW, ("ppiopen(%x, %x): flags %x\n", 206 dev, flags, sc->sc_flags)); 207 208 if (sc->sc_flags & PPIF_OPEN) 209 return (EBUSY); 210 sc->sc_flags |= PPIF_OPEN; 211 sc->sc_burst = PPI_BURST; 212 sc->sc_timo = ppimstohz(PPI_TIMO); 213 sc->sc_delay = ppimstohz(PPI_DELAY); 214 sc->sc_sec = -1; 215 return (0); 216 } 217 218 int 219 ppiclose(dev, flags, fmt, p) 220 dev_t dev; 221 int flags, fmt; 222 struct proc *p; 223 { 224 int unit = UNIT(dev); 225 struct ppi_softc *sc = ppi_cd.cd_devs[unit]; 226 227 DPRINTF(PDB_FOLLOW, ("ppiclose(%x, %x): flags %x\n", 228 dev, flags, sc->sc_flags)); 229 230 sc->sc_flags &= ~PPIF_OPEN; 231 return (0); 232 } 233 234 void 235 ppicallback(v, action) 236 void *v; 237 int action; 238 { 239 struct ppi_softc *sc = v; 240 241 DPRINTF(PDB_FOLLOW, ("ppicallback: v=%p, action=%d\n", v, action)); 242 243 switch (action) { 244 case GPIBCBF_START: 245 ppistart(sc); 246 case GPIBCBF_INTR: 247 /* no-op */ 248 break; 249 #ifdef DEBUG 250 default: 251 DPRINTF(PDB_FOLLOW, ("ppicallback: unknown action %d\n", 252 action)); 253 break; 254 #endif 255 } 256 } 257 258 void 259 ppistart(v) 260 void *v; 261 { 262 struct ppi_softc *sc = v; 263 264 DPRINTF(PDB_FOLLOW, ("ppistart(%x)\n", sc->sc_dev.dv_unit)); 265 266 sc->sc_flags &= ~PPIF_DELAY; 267 wakeup(sc); 268 } 269 270 void 271 ppitimo(arg) 272 void *arg; 273 { 274 struct ppi_softc *sc = arg; 275 276 DPRINTF(PDB_FOLLOW, ("ppitimo(%x)\n", sc->sc_dev.dv_unit)); 277 278 sc->sc_flags &= ~(PPIF_UIO|PPIF_TIMO); 279 wakeup(sc); 280 } 281 282 int 283 ppiread(dev, uio, flags) 284 dev_t dev; 285 struct uio *uio; 286 int flags; 287 { 288 289 DPRINTF(PDB_FOLLOW, ("ppiread(%x, %p)\n", dev, uio)); 290 291 return (ppirw(dev, uio)); 292 } 293 294 int 295 ppiwrite(dev, uio, flags) 296 dev_t dev; 297 struct uio *uio; 298 int flags; 299 { 300 301 DPRINTF(PDB_FOLLOW, ("ppiwrite(%x, %p)\n", dev, uio)); 302 303 return (ppirw(dev, uio)); 304 } 305 306 int 307 ppirw(dev, uio) 308 dev_t dev; 309 struct uio *uio; 310 { 311 int unit = UNIT(dev); 312 struct ppi_softc *sc = ppi_cd.cd_devs[unit]; 313 int s, len, cnt; 314 char *cp; 315 int error = 0, gotdata = 0; 316 int buflen, address; 317 char *buf; 318 319 if (uio->uio_resid == 0) 320 return (0); 321 322 address = sc->sc_address; 323 324 DPRINTF(PDB_FOLLOW|PDB_IO, 325 ("ppirw(%x, %p, %c): burst %d, timo %d, resid %x\n", 326 dev, uio, uio->uio_rw == UIO_READ ? 'R' : 'W', 327 sc->sc_burst, sc->sc_timo, uio->uio_resid)); 328 329 buflen = min(sc->sc_burst, uio->uio_resid); 330 buf = (char *)malloc(buflen, M_DEVBUF, M_WAITOK); 331 sc->sc_flags |= PPIF_UIO; 332 if (sc->sc_timo > 0) { 333 sc->sc_flags |= PPIF_TIMO; 334 callout_reset(&sc->sc_timo_ch, sc->sc_timo, ppitimo, sc); 335 } 336 len = cnt = 0; 337 while (uio->uio_resid > 0) { 338 len = min(buflen, uio->uio_resid); 339 cp = buf; 340 if (uio->uio_rw == UIO_WRITE) { 341 error = uiomove(cp, len, uio); 342 if (error) 343 break; 344 } 345 again: 346 s = splbio(); 347 if (sc->sc_flags & PPIF_UIO) { 348 if (gpibrequest(sc->sc_ic, sc->sc_hdl) == 0) 349 (void) tsleep(sc, PRIBIO + 1, "ppirw", 0); 350 } 351 /* 352 * Check if we timed out during sleep or uiomove 353 */ 354 (void) spllowersoftclock(); 355 if ((sc->sc_flags & PPIF_UIO) == 0) { 356 DPRINTF(PDB_IO, 357 ("ppirw: uiomove/sleep timo, flags %x\n", 358 sc->sc_flags)); 359 if (sc->sc_flags & PPIF_TIMO) { 360 callout_stop(&sc->sc_timo_ch); 361 sc->sc_flags &= ~PPIF_TIMO; 362 } 363 splx(s); 364 break; 365 } 366 splx(s); 367 /* 368 * Perform the operation 369 */ 370 if (uio->uio_rw == UIO_WRITE) 371 cnt = gpibsend(sc->sc_ic, address, sc->sc_sec, 372 cp, len); 373 else 374 cnt = gpibrecv(sc->sc_ic, address, sc->sc_sec, 375 cp, len); 376 s = splbio(); 377 gpibrelease(sc->sc_ic, sc->sc_hdl); 378 DPRINTF(PDB_IO, ("ppirw: %s(%d, %x, %p, %d) -> %d\n", 379 uio->uio_rw == UIO_READ ? "recv" : "send", 380 address, sc->sc_sec, cp, len, cnt)); 381 splx(s); 382 if (uio->uio_rw == UIO_READ) { 383 if (cnt) { 384 error = uiomove(cp, cnt, uio); 385 if (error) 386 break; 387 gotdata++; 388 } 389 /* 390 * Didn't get anything this time, but did in the past. 391 * Consider us done. 392 */ 393 else if (gotdata) 394 break; 395 } 396 s = splsoftclock(); 397 /* 398 * Operation timeout (or non-blocking), quit now. 399 */ 400 if ((sc->sc_flags & PPIF_UIO) == 0) { 401 DPRINTF(PDB_IO, ("ppirw: timeout/done\n")); 402 splx(s); 403 break; 404 } 405 /* 406 * Implement inter-read delay 407 */ 408 if (sc->sc_delay > 0) { 409 sc->sc_flags |= PPIF_DELAY; 410 callout_reset(&sc->sc_start_ch, sc->sc_delay, 411 ppistart, sc); 412 error = tsleep(sc, (PCATCH|PZERO) + 1, "gpib", 0); 413 if (error) { 414 splx(s); 415 break; 416 } 417 } 418 splx(s); 419 /* 420 * Must not call uiomove again til we've used all data 421 * that we already grabbed. 422 */ 423 if (uio->uio_rw == UIO_WRITE && cnt != len) { 424 cp += cnt; 425 len -= cnt; 426 cnt = 0; 427 goto again; 428 } 429 } 430 s = splsoftclock(); 431 if (sc->sc_flags & PPIF_TIMO) { 432 callout_stop(&sc->sc_timo_ch); 433 sc->sc_flags &= ~PPIF_TIMO; 434 } 435 if (sc->sc_flags & PPIF_DELAY) { 436 callout_stop(&sc->sc_start_ch); 437 sc->sc_flags &= ~PPIF_DELAY; 438 } 439 splx(s); 440 /* 441 * Adjust for those chars that we uiomove'ed but never wrote 442 */ 443 if (uio->uio_rw == UIO_WRITE && cnt != len) { 444 uio->uio_resid += (len - cnt); 445 DPRINTF(PDB_IO, ("ppirw: short write, adjust by %d\n", 446 len - cnt)); 447 } 448 free(buf, M_DEVBUF); 449 DPRINTF(PDB_FOLLOW|PDB_IO, ("ppirw: return %d, resid %d\n", 450 error, uio->uio_resid)); 451 return (error); 452 } 453 454 int 455 ppiioctl(dev, cmd, data, flag, p) 456 dev_t dev; 457 u_long cmd; 458 caddr_t data; 459 int flag; 460 struct proc *p; 461 { 462 struct ppi_softc *sc = ppi_cd.cd_devs[UNIT(dev)]; 463 struct ppiparam *pp, *upp; 464 int error = 0; 465 466 switch (cmd) { 467 case PPIIOCGPARAM: 468 pp = &sc->sc_param; 469 upp = (struct ppiparam *)data; 470 upp->burst = pp->burst; 471 upp->timo = ppihztoms(pp->timo); 472 upp->delay = ppihztoms(pp->delay); 473 break; 474 case PPIIOCSPARAM: 475 pp = &sc->sc_param; 476 upp = (struct ppiparam *)data; 477 if (upp->burst < PPI_BURST_MIN || upp->burst > PPI_BURST_MAX || 478 upp->delay < PPI_DELAY_MIN || upp->delay > PPI_DELAY_MAX) 479 return (EINVAL); 480 pp->burst = upp->burst; 481 pp->timo = ppimstohz(upp->timo); 482 pp->delay = ppimstohz(upp->delay); 483 break; 484 case PPIIOCSSEC: 485 sc->sc_sec = *(int *)data; 486 break; 487 default: 488 return (EINVAL); 489 } 490 return (error); 491 } 492 493 int 494 ppihztoms(h) 495 int h; 496 { 497 extern int hz; 498 int m = h; 499 500 if (m > 0) 501 m = m * 1000 / hz; 502 return (m); 503 } 504 505 int 506 ppimstohz(m) 507 int m; 508 { 509 extern int hz; 510 int h = m; 511 512 if (h > 0) { 513 h = h * hz / 1000; 514 if (h == 0) 515 h = 1000 / hz; 516 } 517 return (h); 518 } 519