1 /* $NetBSD: gfpic.c,v 1.1 2024/01/02 07:27:51 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2023 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * Support for the Goldfish virtual Programmable Interrupt Controller. 34 */ 35 36 #include <sys/cdefs.h> 37 __KERNEL_RCSID(0, "$NetBSD: gfpic.c,v 1.1 2024/01/02 07:27:51 thorpej Exp $"); 38 39 #include <sys/types.h> 40 #include <sys/systm.h> 41 #include <sys/bus.h> 42 43 #include <dev/goldfish/gfpicvar.h> 44 45 /* 46 * Goldfish PIC registers. 47 */ 48 #define GFPIC_STATUS (0 << 2) /* pending interrupt count */ 49 #define GFPIC_PENDING (1 << 2) /* pending interrupt bitmask */ 50 #define GFPIC_DISABLE_ALL (2 << 2) /* disables / clears all interrupts */ 51 #define GFPIC_DISABLE (3 << 2) /* disable IRQs (bitmask) */ 52 #define GFPIC_ENABLE (4 << 2) /* enable IRQs (bitmask) */ 53 54 #define REG_READ(sc, r) \ 55 bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (r)) 56 #define REG_WRITE(sc, r, v) \ 57 bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (r), (v)) 58 59 /* 60 * gfpic_attach -- 61 * Attach a Goldfish virtual PIC. 62 */ 63 void 64 gfpic_attach(struct gfpic_softc *sc) 65 { 66 aprint_naive("\n"); 67 aprint_normal(": Google Goldfish PIC\n"); 68 69 REG_WRITE(sc, GFPIC_DISABLE_ALL, 0); 70 } 71 72 /* 73 * gfpic_enable -- 74 * Enable the specified IRQ on a Goldfish virtual PIC. 75 */ 76 void 77 gfpic_enable(struct gfpic_softc *sc, int pirq) 78 { 79 KASSERT(pirq >= 0); 80 KASSERT(pirq <= 31); 81 82 device_printf(sc->sc_dev, "enabling IRQ %d (0x%08x)\n", 83 pirq, (1U << pirq)); 84 REG_WRITE(sc, GFPIC_ENABLE, (1U << pirq)); 85 } 86 87 /* 88 * gfpic_disable -- 89 * Disable the specified IRQ on a Goldfish virtual PIC. 90 */ 91 void 92 gfpic_disable(struct gfpic_softc *sc, int pirq) 93 { 94 KASSERT(pirq >= 0); 95 KASSERT(pirq <= 31); 96 97 REG_WRITE(sc, GFPIC_DISABLE, (1U << pirq)); 98 } 99 100 /* 101 * gfpic_pending -- 102 * Return the next pending IRQ on a Goldfish virtual PIC, 103 * or -1 if there are none. 104 */ 105 int 106 gfpic_pending(struct gfpic_softc *sc) 107 { 108 return ffs(REG_READ(sc, GFPIC_PENDING)) - 1; 109 } 110