1 /* $NetBSD: dwcmmc_fdt.c,v 1.8 2019/04/30 23:10:33 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2015-2018 Jared McNeill <jmcneill@invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: dwcmmc_fdt.c,v 1.8 2019/04/30 23:10:33 jmcneill Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/device.h> 35 #include <sys/intr.h> 36 #include <sys/systm.h> 37 #include <sys/kernel.h> 38 #include <sys/mutex.h> 39 #include <sys/condvar.h> 40 #include <sys/gpio.h> 41 42 #include <dev/ic/dwc_mmc_var.h> 43 #include <dev/fdt/fdtvar.h> 44 45 static int dwcmmc_fdt_match(device_t, cfdata_t, void *); 46 static void dwcmmc_fdt_attach(device_t, device_t, void *); 47 48 static int dwcmmc_fdt_card_detect(struct dwc_mmc_softc *); 49 static int dwcmmc_fdt_bus_clock(struct dwc_mmc_softc *, int); 50 51 struct dwcmmc_fdt_config { 52 u_int ciu_div; 53 }; 54 55 static const struct dwcmmc_fdt_config dwcmmc_rk3288_config = { 56 .ciu_div = 2, 57 }; 58 59 static const struct of_compat_data compat_data[] = { 60 { "rockchip,rk3288-dw-mshc", (uintptr_t)&dwcmmc_rk3288_config }, 61 { NULL } 62 }; 63 64 struct dwcmmc_fdt_softc { 65 struct dwc_mmc_softc sc; 66 struct clk *sc_clk_biu; 67 struct clk *sc_clk_ciu; 68 struct fdtbus_gpio_pin *sc_pin_cd; 69 const struct dwcmmc_fdt_config *sc_conf; 70 u_int sc_ciu_div; 71 }; 72 73 CFATTACH_DECL_NEW(dwcmmc_fdt, sizeof(struct dwcmmc_fdt_softc), 74 dwcmmc_fdt_match, dwcmmc_fdt_attach, NULL, NULL); 75 76 static int 77 dwcmmc_fdt_match(device_t parent, cfdata_t cf, void *aux) 78 { 79 struct fdt_attach_args * const faa = aux; 80 81 return of_match_compat_data(faa->faa_phandle, compat_data); 82 } 83 84 static void 85 dwcmmc_fdt_attach(device_t parent, device_t self, void *aux) 86 { 87 struct dwcmmc_fdt_softc *esc = device_private(self); 88 struct dwc_mmc_softc *sc = &esc->sc; 89 struct fdt_attach_args * const faa = aux; 90 const int phandle = faa->faa_phandle; 91 char intrstr[128]; 92 u_int fifo_depth; 93 bus_addr_t addr; 94 bus_size_t size; 95 int error; 96 97 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { 98 aprint_error(": couldn't get registers\n"); 99 return; 100 } 101 102 if (of_getprop_uint32(phandle, "fifo-depth", &fifo_depth)) 103 fifo_depth = 0; 104 105 fdtbus_clock_assign(phandle); 106 107 esc->sc_clk_biu = fdtbus_clock_get(phandle, "biu"); 108 if (esc->sc_clk_biu == NULL) { 109 aprint_error(": couldn't get clock biu\n"); 110 return; 111 } 112 esc->sc_clk_ciu = fdtbus_clock_get(phandle, "ciu"); 113 if (esc->sc_clk_ciu == NULL) { 114 aprint_error(": couldn't get clock ciu\n"); 115 return; 116 } 117 118 error = clk_enable(esc->sc_clk_biu); 119 if (error) { 120 aprint_error(": couldn't enable clock biu: %d\n", error); 121 return; 122 } 123 error = clk_enable(esc->sc_clk_ciu); 124 if (error) { 125 aprint_error(": couldn't enable clock ciu: %d\n", error); 126 return; 127 } 128 129 sc->sc_dev = self; 130 sc->sc_bst = faa->faa_bst; 131 sc->sc_dmat = faa->faa_dmat; 132 error = bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh); 133 if (error) { 134 aprint_error(": couldn't map %#" PRIx64 ": %d\n", 135 (uint64_t)addr, error); 136 return; 137 } 138 esc->sc_conf = (void *)of_search_compatible(phandle, compat_data)->data; 139 140 141 if (of_getprop_uint32(phandle, "max-frequency", &sc->sc_clock_freq) != 0) 142 sc->sc_clock_freq = UINT_MAX; 143 144 sc->sc_fifo_depth = fifo_depth; 145 sc->sc_flags = DWC_MMC_F_USE_HOLD_REG | DWC_MMC_F_DMA; 146 sc->sc_bus_clock = dwcmmc_fdt_bus_clock; 147 148 esc->sc_pin_cd = fdtbus_gpio_acquire(phandle, "cd-gpios", 149 GPIO_PIN_INPUT); 150 if (esc->sc_pin_cd) 151 sc->sc_card_detect = dwcmmc_fdt_card_detect; 152 153 aprint_naive("\n"); 154 aprint_normal(": DesignWare SD/MMC\n"); 155 156 if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) { 157 aprint_error_dev(self, "failed to decode interrupt\n"); 158 return; 159 } 160 161 if (dwc_mmc_init(sc) != 0) 162 return; 163 164 sc->sc_ih = fdtbus_intr_establish(phandle, 0, IPL_BIO, 0, 165 dwc_mmc_intr, sc); 166 if (sc->sc_ih == NULL) { 167 aprint_error_dev(self, "couldn't establish interrupt on %s\n", 168 intrstr); 169 return; 170 } 171 aprint_normal_dev(self, "interrupting on %s\n", intrstr); 172 } 173 174 static int 175 dwcmmc_fdt_card_detect(struct dwc_mmc_softc *sc) 176 { 177 struct dwcmmc_fdt_softc *esc = device_private(sc->sc_dev); 178 179 KASSERT(esc->sc_pin_cd != NULL); 180 181 return fdtbus_gpio_read(esc->sc_pin_cd); 182 } 183 184 static int 185 dwcmmc_fdt_bus_clock(struct dwc_mmc_softc *sc, int rate) 186 { 187 struct dwcmmc_fdt_softc *esc = device_private(sc->sc_dev); 188 const u_int ciu_div = esc->sc_conf->ciu_div > 0 ? esc->sc_conf->ciu_div : 1; 189 int error; 190 191 error = clk_set_rate(esc->sc_clk_ciu, 1000 * rate * ciu_div); 192 if (error != 0) { 193 aprint_error_dev(sc->sc_dev, "failed to set rate to %u kHz: %d\n", 194 rate * ciu_div, error); 195 return error; 196 } 197 198 sc->sc_clock_freq = clk_get_rate(esc->sc_clk_ciu) / ciu_div; 199 200 aprint_debug_dev(sc->sc_dev, "set clock rate to %u kHz (target %u kHz)\n", 201 sc->sc_clock_freq, rate); 202 203 return 0; 204 } 205