1 /* $NetBSD: uha_eisa.c,v 1.8 1997/06/06 23:30:09 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1994, 1996, 1997 Charles M. Hannum. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Charles M. Hannum. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/types.h> 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/device.h> 36 #include <sys/kernel.h> 37 #include <sys/proc.h> 38 #include <sys/user.h> 39 40 #include <machine/bus.h> 41 #include <machine/intr.h> 42 43 #include <scsi/scsi_all.h> 44 #include <scsi/scsiconf.h> 45 46 #include <dev/eisa/eisavar.h> 47 #include <dev/eisa/eisadevs.h> 48 49 #include <dev/ic/uhareg.h> 50 #include <dev/ic/uhavar.h> 51 52 #define UHA_EISA_SLOT_OFFSET 0xc80 53 #define UHA_EISA_IOSIZE 0x020 54 55 #ifdef __BROKEN_INDIRECT_CONFIG 56 int uha_eisa_match __P((struct device *, void *, void *)); 57 #else 58 int uha_eisa_match __P((struct device *, struct cfdata *, void *)); 59 #endif 60 void uha_eisa_attach __P((struct device *, struct device *, void *)); 61 62 struct cfattach uha_eisa_ca = { 63 sizeof(struct uha_softc), uha_eisa_match, uha_eisa_attach 64 }; 65 66 #ifndef DDB 67 #define Debugger() panic("should call debugger here (uha_eisa.c)") 68 #endif /* ! DDB */ 69 70 int u24_find __P((bus_space_tag_t, bus_space_handle_t, 71 struct uha_probe_data *)); 72 void u24_start_mbox __P((struct uha_softc *, struct uha_mscp *)); 73 int u24_poll __P((struct uha_softc *, struct scsi_xfer *, int)); 74 int u24_intr __P((void *)); 75 void u24_init __P((struct uha_softc *)); 76 77 /* 78 * Check the slots looking for a board we recognise 79 * If we find one, note it's address (slot) and call 80 * the actual probe routine to check it out. 81 */ 82 int 83 uha_eisa_match(parent, match, aux) 84 struct device *parent; 85 #ifdef __BROKEN_INDIRECT_CONFIG 86 void *match; 87 #else 88 struct cfdata *match; 89 #endif 90 void *aux; 91 { 92 struct eisa_attach_args *ea = aux; 93 bus_space_tag_t iot = ea->ea_iot; 94 bus_space_handle_t ioh; 95 int rv; 96 97 /* must match one of our known ID strings */ 98 if (strncmp(ea->ea_idstring, "USC024", 6)) 99 return (0); 100 101 if (bus_space_map(iot, EISA_SLOT_ADDR(ea->ea_slot) + 102 UHA_EISA_SLOT_OFFSET, UHA_EISA_IOSIZE, 0, &ioh)) 103 return (0); 104 105 rv = u24_find(iot, ioh, NULL); 106 107 bus_space_unmap(iot, ioh, UHA_EISA_IOSIZE); 108 109 return (rv); 110 } 111 112 /* 113 * Attach all the sub-devices we can find 114 */ 115 void 116 uha_eisa_attach(parent, self, aux) 117 struct device *parent, *self; 118 void *aux; 119 { 120 struct eisa_attach_args *ea = aux; 121 struct uha_softc *sc = (void *)self; 122 bus_space_tag_t iot = ea->ea_iot; 123 bus_dma_tag_t dmat = ea->ea_dmat; 124 bus_space_handle_t ioh; 125 struct uha_probe_data upd; 126 eisa_chipset_tag_t ec = ea->ea_ec; 127 eisa_intr_handle_t ih; 128 const char *model, *intrstr; 129 130 if (!strncmp(ea->ea_idstring, "USC024", 6)) 131 model = EISA_PRODUCT_USC0240; 132 else 133 model = "unknown model!"; 134 printf(": %s\n", model); 135 136 if (bus_space_map(iot, EISA_SLOT_ADDR(ea->ea_slot) + 137 UHA_EISA_SLOT_OFFSET, UHA_EISA_IOSIZE, 0, &ioh)) 138 panic("uha_eisa_attach: could not map I/O addresses"); 139 140 sc->sc_iot = iot; 141 sc->sc_ioh = ioh; 142 sc->sc_dmat = dmat; 143 if (!u24_find(iot, ioh, &upd)) 144 panic("uha_eisa_attach: u24_find failed!"); 145 146 sc->sc_dmaflags = 0; 147 148 if (eisa_intr_map(ec, upd.sc_irq, &ih)) { 149 printf("%s: couldn't map interrupt (%d)\n", 150 sc->sc_dev.dv_xname, upd.sc_irq); 151 return; 152 } 153 intrstr = eisa_intr_string(ec, ih); 154 sc->sc_ih = eisa_intr_establish(ec, ih, IST_LEVEL, IPL_BIO, 155 u24_intr, sc); 156 if (sc->sc_ih == NULL) { 157 printf("%s: couldn't establish interrupt", 158 sc->sc_dev.dv_xname); 159 if (intrstr != NULL) 160 printf(" at %s", intrstr); 161 printf("\n"); 162 return; 163 } 164 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 165 166 /* Save function pointers for later use. */ 167 sc->start_mbox = u24_start_mbox; 168 sc->poll = u24_poll; 169 sc->init = u24_init; 170 171 uha_attach(sc, &upd); 172 } 173 174 int 175 u24_find(iot, ioh, sc) 176 bus_space_tag_t iot; 177 bus_space_handle_t ioh; 178 struct uha_probe_data *sc; 179 { 180 u_int8_t config0, config1, config2; 181 int irq, drq; 182 int resetcount = 4000; /* 4 secs? */ 183 184 config0 = bus_space_read_1(iot, ioh, U24_CONFIG + 0); 185 config1 = bus_space_read_1(iot, ioh, U24_CONFIG + 1); 186 config2 = bus_space_read_1(iot, ioh, U24_CONFIG + 2); 187 if ((config0 & U24_MAGIC1) == 0 || 188 (config1 & U24_MAGIC2) == 0) 189 return (0); 190 191 drq = -1; 192 193 switch (config0 & U24_IRQ_MASK) { 194 case U24_IRQ10: 195 irq = 10; 196 break; 197 case U24_IRQ11: 198 irq = 11; 199 break; 200 case U24_IRQ14: 201 irq = 14; 202 break; 203 case U24_IRQ15: 204 irq = 15; 205 break; 206 default: 207 printf("u24_find: illegal irq setting %x\n", 208 config0 & U24_IRQ_MASK); 209 return (0); 210 } 211 212 bus_space_write_1(iot, ioh, U24_LINT, UHA_ASRST); 213 214 while (--resetcount) { 215 if (bus_space_read_1(iot, ioh, U24_LINT)) 216 break; 217 delay(1000); /* 1 mSec per loop */ 218 } 219 if (!resetcount) { 220 printf("u24_find: board timed out during reset\n"); 221 return (0); 222 } 223 224 /* if we want to fill in softc, do so now */ 225 if (sc) { 226 sc->sc_irq = irq; 227 sc->sc_drq = drq; 228 sc->sc_scsi_dev = config2 & U24_HOSTID_MASK; 229 } 230 231 return (1); 232 } 233 234 void 235 u24_start_mbox(sc, mscp) 236 struct uha_softc *sc; 237 struct uha_mscp *mscp; 238 { 239 bus_space_tag_t iot = sc->sc_iot; 240 bus_space_handle_t ioh = sc->sc_ioh; 241 int spincount = 100000; /* 1s should be enough */ 242 243 while (--spincount) { 244 if ((bus_space_read_1(iot, ioh, U24_LINT) & U24_LDIP) == 0) 245 break; 246 delay(100); 247 } 248 if (!spincount) { 249 printf("%s: uha_start_mbox, board not responding\n", 250 sc->sc_dev.dv_xname); 251 Debugger(); 252 } 253 254 bus_space_write_4(iot, ioh, U24_OGMPTR, 255 mscp->dmamap_self->dm_segs[0].ds_addr); 256 if (mscp->flags & MSCP_ABORT) 257 bus_space_write_1(iot, ioh, U24_OGMCMD, 0x80); 258 else 259 bus_space_write_1(iot, ioh, U24_OGMCMD, 0x01); 260 bus_space_write_1(iot, ioh, U24_LINT, U24_OGMFULL); 261 262 if ((mscp->xs->flags & SCSI_POLL) == 0) 263 timeout(uha_timeout, mscp, (mscp->timeout * hz) / 1000); 264 } 265 266 int 267 u24_poll(sc, xs, count) 268 struct uha_softc *sc; 269 struct scsi_xfer *xs; 270 int count; 271 { 272 bus_space_tag_t iot = sc->sc_iot; 273 bus_space_handle_t ioh = sc->sc_ioh; 274 275 while (count) { 276 /* 277 * If we had interrupts enabled, would we 278 * have got an interrupt? 279 */ 280 if (bus_space_read_1(iot, ioh, U24_SINT) & U24_SDIP) 281 u24_intr(sc); 282 if (xs->flags & ITSDONE) 283 return (0); 284 delay(1000); 285 count--; 286 } 287 return (1); 288 } 289 290 int 291 u24_intr(arg) 292 void *arg; 293 { 294 struct uha_softc *sc = arg; 295 bus_space_tag_t iot = sc->sc_iot; 296 bus_space_handle_t ioh = sc->sc_ioh; 297 struct uha_mscp *mscp; 298 u_char uhastat; 299 u_long mboxval; 300 301 #ifdef UHADEBUG 302 printf("%s: uhaintr ", sc->sc_dev.dv_xname); 303 #endif /*UHADEBUG */ 304 305 if ((bus_space_read_1(iot, ioh, U24_SINT) & U24_SDIP) == 0) 306 return (0); 307 308 for (;;) { 309 /* 310 * First get all the information and then 311 * acknowledge the interrupt 312 */ 313 uhastat = bus_space_read_1(iot, ioh, U24_SINT); 314 mboxval = bus_space_read_4(iot, ioh, U24_ICMPTR); 315 bus_space_write_1(iot, ioh, U24_SINT, U24_ICM_ACK); 316 bus_space_write_1(iot, ioh, U24_ICMCMD, 0); 317 318 #ifdef UHADEBUG 319 printf("status = 0x%x ", uhastat); 320 #endif /*UHADEBUG*/ 321 322 /* 323 * Process the completed operation 324 */ 325 mscp = uha_mscp_phys_kv(sc, mboxval); 326 if (!mscp) { 327 printf("%s: BAD MSCP RETURNED!\n", 328 sc->sc_dev.dv_xname); 329 continue; /* whatever it was, it'll timeout */ 330 } 331 untimeout(uha_timeout, mscp); 332 uha_done(sc, mscp); 333 334 if ((bus_space_read_1(iot, ioh, U24_SINT) & U24_SDIP) == 0) 335 return (1); 336 } 337 } 338 339 void 340 u24_init(sc) 341 struct uha_softc *sc; 342 { 343 bus_space_tag_t iot = sc->sc_iot; 344 bus_space_handle_t ioh = sc->sc_ioh; 345 346 /* free OGM and ICM */ 347 bus_space_write_1(iot, ioh, U24_OGMCMD, 0); 348 bus_space_write_1(iot, ioh, U24_ICMCMD, 0); 349 /* make sure interrupts are enabled */ 350 #ifdef UHADEBUG 351 printf("u24_init: lmask=%02x, smask=%02x\n", 352 bus_space_read_1(iot, ioh, U24_LMASK), 353 bus_space_read_1(iot, ioh, U24_SMASK)); 354 #endif 355 bus_space_write_1(iot, ioh, U24_LMASK, 0xd2); /* XXX */ 356 bus_space_write_1(iot, ioh, U24_SMASK, 0x92); /* XXX */ 357 } 358