xref: /netbsd-src/sys/dev/eisa/ahb.c (revision fdecd6a253f999ae92b139670d9e15cc9df4497c)
1 /*	$NetBSD: ahb.c,v 1.9 1997/06/06 23:30:02 thorpej Exp $	*/
2 
3 #undef	AHBDEBUG
4 #ifdef DDB
5 #define	integrate
6 #else
7 #define	integrate	static inline
8 #endif
9 
10 /*-
11  * Copyright (c) 1997 The NetBSD Foundation, Inc.
12  * All rights reserved.
13  *
14  * This code is derived from software contributed to The NetBSD Foundation
15  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
16  * NASA Ames Research Center.
17  *
18  * Redistribution and use in source and binary forms, with or without
19  * modification, are permitted provided that the following conditions
20  * are met:
21  * 1. Redistributions of source code must retain the above copyright
22  *    notice, this list of conditions and the following disclaimer.
23  * 2. Redistributions in binary form must reproduce the above copyright
24  *    notice, this list of conditions and the following disclaimer in the
25  *    documentation and/or other materials provided with the distribution.
26  * 3. All advertising materials mentioning features or use of this software
27  *    must display the following acknowledgement:
28  *	This product includes software developed by the NetBSD
29  *	Foundation, Inc. and its contributors.
30  * 4. Neither the name of The NetBSD Foundation nor the names of its
31  *    contributors may be used to endorse or promote products derived
32  *    from this software without specific prior written permission.
33  *
34  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
35  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
36  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
37  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
38  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
39  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
40  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
41  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
42  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
43  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
44  * POSSIBILITY OF SUCH DAMAGE.
45  */
46 
47 /*
48  * Copyright (c) 1994, 1996, 1997 Charles M. Hannum.  All rights reserved.
49  *
50  * Redistribution and use in source and binary forms, with or without
51  * modification, are permitted provided that the following conditions
52  * are met:
53  * 1. Redistributions of source code must retain the above copyright
54  *    notice, this list of conditions and the following disclaimer.
55  * 2. Redistributions in binary form must reproduce the above copyright
56  *    notice, this list of conditions and the following disclaimer in the
57  *    documentation and/or other materials provided with the distribution.
58  * 3. All advertising materials mentioning features or use of this software
59  *    must display the following acknowledgement:
60  *	This product includes software developed by Charles M. Hannum.
61  * 4. The name of the author may not be used to endorse or promote products
62  *    derived from this software without specific prior written permission.
63  *
64  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
65  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
66  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
67  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
68  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
69  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
70  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
71  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
72  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
73  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
74  */
75 
76 /*
77  * Originally written by Julian Elischer (julian@tfs.com)
78  * for TRW Financial Systems for use under the MACH(2.5) operating system.
79  *
80  * TRW Financial Systems, in accordance with their agreement with Carnegie
81  * Mellon University, makes this software available to CMU to distribute
82  * or use in any manner that they see fit as long as this message is kept with
83  * the software. For this reason TFS also grants any other persons or
84  * organisations permission to use or modify this software.
85  *
86  * TFS supplies this software to be publicly redistributed
87  * on the understanding that TFS is not responsible for the correct
88  * functioning of this software in any circumstances.
89  */
90 
91 #include <sys/types.h>
92 #include <sys/param.h>
93 #include <sys/systm.h>
94 #include <sys/kernel.h>
95 #include <sys/errno.h>
96 #include <sys/ioctl.h>
97 #include <sys/device.h>
98 #include <sys/malloc.h>
99 #include <sys/buf.h>
100 #include <sys/proc.h>
101 #include <sys/user.h>
102 
103 #include <machine/bus.h>
104 #include <machine/intr.h>
105 
106 #include <scsi/scsi_all.h>
107 #include <scsi/scsiconf.h>
108 
109 #include <dev/eisa/eisareg.h>
110 #include <dev/eisa/eisavar.h>
111 #include <dev/eisa/eisadevs.h>
112 #include <dev/eisa/ahbreg.h>
113 
114 #ifndef DDB
115 #define Debugger() panic("should call debugger here (aha1742.c)")
116 #endif /* ! DDB */
117 
118 #define AHB_ECB_MAX	32	/* store up to 32 ECBs at one time */
119 #define	ECB_HASH_SIZE	32	/* hash table size for phystokv */
120 #define	ECB_HASH_SHIFT	9
121 #define ECB_HASH(x)	((((long)(x))>>ECB_HASH_SHIFT) & (ECB_HASH_SIZE - 1))
122 
123 #define AHB_MAXXFER	((AHB_NSEG - 1) << PGSHIFT)
124 
125 struct ahb_softc {
126 	struct device sc_dev;
127 
128 	bus_space_tag_t sc_iot;
129 	bus_space_handle_t sc_ioh;
130 	bus_dma_tag_t sc_dmat;
131 	void *sc_ih;
132 
133 	struct ahb_ecb *sc_ecbhash[ECB_HASH_SIZE];
134 	TAILQ_HEAD(, ahb_ecb) sc_free_ecb;
135 	struct ahb_ecb *sc_immed_ecb;	/* an outstanding immediete command */
136 	int sc_numecbs;
137 	struct scsi_link sc_link;
138 };
139 
140 struct ahb_probe_data {
141 	int sc_irq;
142 	int sc_scsi_dev;
143 };
144 
145 void	ahb_send_mbox __P((struct ahb_softc *, int, struct ahb_ecb *));
146 void	ahb_send_immed __P((struct ahb_softc *, u_long, struct ahb_ecb *));
147 int	ahbintr __P((void *));
148 void	ahb_free_ecb __P((struct ahb_softc *, struct ahb_ecb *));
149 struct	ahb_ecb *ahb_get_ecb __P((struct ahb_softc *, int));
150 struct	ahb_ecb *ahb_ecb_phys_kv __P((struct ahb_softc *, physaddr));
151 void	ahb_done __P((struct ahb_softc *, struct ahb_ecb *));
152 int	ahb_find __P((bus_space_tag_t, bus_space_handle_t, struct ahb_probe_data *));
153 void	ahb_init __P((struct ahb_softc *));
154 void	ahbminphys __P((struct buf *));
155 int	ahb_scsi_cmd __P((struct scsi_xfer *));
156 int	ahb_poll __P((struct ahb_softc *, struct scsi_xfer *, int));
157 void	ahb_timeout __P((void *));
158 int	ahb_create_ecbs __P((struct ahb_softc *));
159 
160 integrate void ahb_reset_ecb __P((struct ahb_softc *, struct ahb_ecb *));
161 integrate void ahb_init_ecb __P((struct ahb_softc *, struct ahb_ecb *));
162 
163 struct scsi_adapter ahb_switch = {
164 	ahb_scsi_cmd,
165 	ahbminphys,
166 	0,
167 	0,
168 };
169 
170 /* the below structure is so we have a default dev struct for our link struct */
171 struct scsi_device ahb_dev = {
172 	NULL,			/* Use default error handler */
173 	NULL,			/* have a queue, served by this */
174 	NULL,			/* have no async handler */
175 	NULL,			/* Use default 'done' routine */
176 };
177 
178 #ifdef __BROKEN_INDIRECT_CONFIG
179 int	ahbmatch __P((struct device *, void *, void *));
180 #else
181 int	ahbmatch __P((struct device *, struct cfdata *, void *));
182 #endif
183 void	ahbattach __P((struct device *, struct device *, void *));
184 
185 struct cfattach ahb_ca = {
186 	sizeof(struct ahb_softc), ahbmatch, ahbattach
187 };
188 
189 struct cfdriver ahb_cd = {
190 	NULL, "ahb", DV_DULL
191 };
192 
193 #define	AHB_ABORT_TIMEOUT	2000	/* time to wait for abort (mSec) */
194 
195 /* XXX Should put this in a better place. */
196 #define	offsetof(type, member)	((size_t)(&((type *)0)->member))
197 
198 /*
199  * Check the slots looking for a board we recognise
200  * If we find one, note it's address (slot) and call
201  * the actual probe routine to check it out.
202  */
203 int
204 ahbmatch(parent, match, aux)
205 	struct device *parent;
206 #ifdef __BROKEN_INDIRECT_CONFIG
207 	void *match;
208 #else
209 	struct cfdata *match;
210 #endif
211 	void *aux;
212 {
213 	struct eisa_attach_args *ea = aux;
214 	bus_space_tag_t iot = ea->ea_iot;
215 	bus_space_handle_t ioh;
216 	int rv;
217 
218 	/* must match one of our known ID strings */
219 	if (strcmp(ea->ea_idstring, "ADP0000") &&
220 	    strcmp(ea->ea_idstring, "ADP0001") &&
221 	    strcmp(ea->ea_idstring, "ADP0002") &&
222 	    strcmp(ea->ea_idstring, "ADP0400"))
223 		return (0);
224 
225 	if (bus_space_map(iot, EISA_SLOT_ADDR(ea->ea_slot),
226 	    EISA_SLOT_SIZE, 0, &ioh))
227 		return (0);
228 
229 	rv = !ahb_find(iot, ioh, NULL);
230 
231 	bus_space_unmap(iot, ioh, EISA_SLOT_SIZE);
232 
233 	return (rv);
234 }
235 
236 /*
237  * Attach all the sub-devices we can find
238  */
239 void
240 ahbattach(parent, self, aux)
241 	struct device *parent, *self;
242 	void *aux;
243 {
244 	struct eisa_attach_args *ea = aux;
245 	struct ahb_softc *sc = (void *)self;
246 	bus_space_tag_t iot = ea->ea_iot;
247 	bus_space_handle_t ioh;
248 	eisa_chipset_tag_t ec = ea->ea_ec;
249 	eisa_intr_handle_t ih;
250 	const char *model, *intrstr;
251 	struct ahb_probe_data apd;
252 
253 	if (!strcmp(ea->ea_idstring, "ADP0000"))
254 		model = EISA_PRODUCT_ADP0000;
255 	else if (!strcmp(ea->ea_idstring, "ADP0001"))
256 		model = EISA_PRODUCT_ADP0001;
257 	else if (!strcmp(ea->ea_idstring, "ADP0002"))
258 		model = EISA_PRODUCT_ADP0002;
259 	else if (!strcmp(ea->ea_idstring, "ADP0400"))
260 		model = EISA_PRODUCT_ADP0400;
261 	else
262 		model = "unknown model!";
263 	printf(": %s\n", model);
264 
265 	if (bus_space_map(iot, EISA_SLOT_ADDR(ea->ea_slot),
266 	   EISA_SLOT_SIZE, 0, &ioh))
267 		panic("ahbattach: could not map I/O addresses");
268 
269 	sc->sc_iot = iot;
270 	sc->sc_ioh = ioh;
271 	sc->sc_dmat = ea->ea_dmat;
272 	if (ahb_find(iot, ioh, &apd))
273 		panic("ahbattach: ahb_find failed!");
274 
275 	ahb_init(sc);
276 	TAILQ_INIT(&sc->sc_free_ecb);
277 
278 	/*
279 	 * fill in the prototype scsi_link.
280 	 */
281 	sc->sc_link.channel = SCSI_CHANNEL_ONLY_ONE;
282 	sc->sc_link.adapter_softc = sc;
283 	sc->sc_link.adapter_target = apd.sc_scsi_dev;
284 	sc->sc_link.adapter = &ahb_switch;
285 	sc->sc_link.device = &ahb_dev;
286 	sc->sc_link.openings = 4;
287 	sc->sc_link.max_target = 7;
288 
289 	if (eisa_intr_map(ec, apd.sc_irq, &ih)) {
290 		printf("%s: couldn't map interrupt (%d)\n",
291 		    sc->sc_dev.dv_xname, apd.sc_irq);
292 		return;
293 	}
294 	intrstr = eisa_intr_string(ec, ih);
295 	sc->sc_ih = eisa_intr_establish(ec, ih, IST_LEVEL, IPL_BIO,
296 	    ahbintr, sc);
297 	if (sc->sc_ih == NULL) {
298 		printf("%s: couldn't establish interrupt",
299 		    sc->sc_dev.dv_xname);
300 		if (intrstr != NULL)
301 			printf(" at %s", intrstr);
302 		printf("\n");
303 		return;
304 	}
305 	if (intrstr != NULL)
306 		printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname,
307 		    intrstr);
308 
309 	/*
310 	 * ask the adapter what subunits are present
311 	 */
312 	config_found(self, &sc->sc_link, scsiprint);
313 }
314 
315 /*
316  * Function to send a command out through a mailbox
317  */
318 void
319 ahb_send_mbox(sc, opcode, ecb)
320 	struct ahb_softc *sc;
321 	int opcode;
322 	struct ahb_ecb *ecb;
323 {
324 	bus_space_tag_t iot = sc->sc_iot;
325 	bus_space_handle_t ioh = sc->sc_ioh;
326 	int wait = 300;	/* 1ms should be enough */
327 
328 	while (--wait) {
329 		if ((bus_space_read_1(iot, ioh, G2STAT) & (G2STAT_BUSY | G2STAT_MBOX_EMPTY))
330 		    == (G2STAT_MBOX_EMPTY))
331 			break;
332 		delay(10);
333 	}
334 	if (!wait) {
335 		printf("%s: board not responding\n", sc->sc_dev.dv_xname);
336 		Debugger();
337 	}
338 
339 	/*
340 	 * don't know if this will work.
341 	 * XXX WHAT DOES THIS COMMENT MEAN?!  --thorpej
342 	 */
343 	bus_space_write_4(iot, ioh, MBOXOUT0,
344 	    ecb->dmamap_self->dm_segs[0].ds_addr);
345 	bus_space_write_1(iot, ioh, ATTN, opcode | ecb->xs->sc_link->target);
346 
347 	if ((ecb->xs->flags & SCSI_POLL) == 0)
348 		timeout(ahb_timeout, ecb, (ecb->timeout * hz) / 1000);
349 }
350 
351 /*
352  * Function to  send an immediate type command to the adapter
353  */
354 void
355 ahb_send_immed(sc, cmd, ecb)
356 	struct ahb_softc *sc;
357 	u_long cmd;
358 	struct ahb_ecb *ecb;
359 {
360 	bus_space_tag_t iot = sc->sc_iot;
361 	bus_space_handle_t ioh = sc->sc_ioh;
362 	int wait = 100;	/* 1 ms enough? */
363 
364 	while (--wait) {
365 		if ((bus_space_read_1(iot, ioh, G2STAT) & (G2STAT_BUSY | G2STAT_MBOX_EMPTY))
366 		    == (G2STAT_MBOX_EMPTY))
367 			break;
368 		delay(10);
369 	}
370 	if (!wait) {
371 		printf("%s: board not responding\n", sc->sc_dev.dv_xname);
372 		Debugger();
373 	}
374 
375 	bus_space_write_4(iot, ioh, MBOXOUT0, cmd);	/* don't know this will work */
376 	bus_space_write_1(iot, ioh, G2CNTRL, G2CNTRL_SET_HOST_READY);
377 	bus_space_write_1(iot, ioh, ATTN, OP_IMMED | ecb->xs->sc_link->target);
378 
379 	if ((ecb->xs->flags & SCSI_POLL) == 0)
380 		timeout(ahb_timeout, ecb, (ecb->timeout * hz) / 1000);
381 }
382 
383 /*
384  * Catch an interrupt from the adaptor
385  */
386 int
387 ahbintr(arg)
388 	void *arg;
389 {
390 	struct ahb_softc *sc = arg;
391 	bus_space_tag_t iot = sc->sc_iot;
392 	bus_space_handle_t ioh = sc->sc_ioh;
393 	struct ahb_ecb *ecb;
394 	u_char ahbstat;
395 	u_long mboxval;
396 
397 #ifdef	AHBDEBUG
398 	printf("%s: ahbintr ", sc->sc_dev.dv_xname);
399 #endif /* AHBDEBUG */
400 
401 	if ((bus_space_read_1(iot, ioh, G2STAT) & G2STAT_INT_PEND) == 0)
402 		return 0;
403 
404 	for (;;) {
405 		/*
406 		 * First get all the information and then
407 		 * acknowlege the interrupt
408 		 */
409 		ahbstat = bus_space_read_1(iot, ioh, G2INTST);
410 		mboxval = bus_space_read_4(iot, ioh, MBOXIN0);
411 		bus_space_write_1(iot, ioh, G2CNTRL, G2CNTRL_CLEAR_EISA_INT);
412 
413 #ifdef	AHBDEBUG
414 		printf("status = 0x%x ", ahbstat);
415 #endif /* AHBDEBUG */
416 
417 		/*
418 		 * Process the completed operation
419 		 */
420 		switch (ahbstat & G2INTST_INT_STAT) {
421 		case AHB_ECB_OK:
422 		case AHB_ECB_RECOVERED:
423 		case AHB_ECB_ERR:
424 			ecb = ahb_ecb_phys_kv(sc, mboxval);
425 			if (!ecb) {
426 				printf("%s: BAD ECB RETURNED!\n",
427 				    sc->sc_dev.dv_xname);
428 				goto next;	/* whatever it was, it'll timeout */
429 			}
430 			break;
431 
432 		case AHB_IMMED_ERR:
433 			ecb = sc->sc_immed_ecb;
434 			sc->sc_immed_ecb = 0;
435 			ecb->flags |= ECB_IMMED_FAIL;
436 			break;
437 
438 		case AHB_IMMED_OK:
439 			ecb = sc->sc_immed_ecb;
440 			sc->sc_immed_ecb = 0;
441 			break;
442 
443 		default:
444 			printf("%s: unexpected interrupt %x\n",
445 			    sc->sc_dev.dv_xname, ahbstat);
446 			goto next;
447 		}
448 
449 		untimeout(ahb_timeout, ecb);
450 		ahb_done(sc, ecb);
451 
452 	next:
453 		if ((bus_space_read_1(iot, ioh, G2STAT) & G2STAT_INT_PEND) == 0)
454 			return 1;
455 	}
456 }
457 
458 integrate void
459 ahb_reset_ecb(sc, ecb)
460 	struct ahb_softc *sc;
461 	struct ahb_ecb *ecb;
462 {
463 
464 	ecb->flags = 0;
465 }
466 
467 /*
468  * A ecb (and hence a mbx-out is put onto the
469  * free list.
470  */
471 void
472 ahb_free_ecb(sc, ecb)
473 	struct ahb_softc *sc;
474 	struct ahb_ecb *ecb;
475 {
476 	int s;
477 
478 	s = splbio();
479 
480 	ahb_reset_ecb(sc, ecb);
481 	TAILQ_INSERT_HEAD(&sc->sc_free_ecb, ecb, chain);
482 
483 	/*
484 	 * If there were none, wake anybody waiting for one to come free,
485 	 * starting with queued entries.
486 	 */
487 	if (ecb->chain.tqe_next == 0)
488 		wakeup(&sc->sc_free_ecb);
489 
490 	splx(s);
491 }
492 
493 /*
494  * Create a set of ecbs and add them to the free list.
495  */
496 integrate void
497 ahb_init_ecb(sc, ecb)
498 	struct ahb_softc *sc;
499 	struct ahb_ecb *ecb;
500 {
501 	bus_dma_tag_t dmat = sc->sc_dmat;
502 	int hashnum;
503 
504 	/*
505 	 * XXX Should we put a DIAGNOSTIC check for multiple
506 	 * XXX ECB inits here?
507 	 */
508 
509 	bzero(ecb, sizeof(struct ahb_ecb));
510 
511 	/*
512 	 * Create the DMA maps for this ECB.
513 	 */
514 	if (bus_dmamap_create(dmat, sizeof(struct ahb_ecb), 1,
515 	    sizeof(struct ahb_ecb), 0, BUS_DMA_NOWAIT, &ecb->dmamap_self) ||
516 
517 					/* XXX What's a good value for this? */
518 	    bus_dmamap_create(dmat, AHB_MAXXFER, AHB_NSEG, AHB_MAXXFER,
519 	    0, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW, &ecb->dmamap_xfer))
520 		panic("ahb_init_ecb: can't create DMA maps");
521 
522 	/*
523 	 * Load the permanent DMA maps.
524 	 */
525 	if (bus_dmamap_load(dmat, ecb->dmamap_self, ecb,
526 	    sizeof(struct ahb_ecb), NULL, BUS_DMA_NOWAIT))
527 		panic("ahb_init_ecb: can't load permanent maps");
528 
529 	/*
530 	 * put in the phystokv hash table
531 	 * Never gets taken out.
532 	 */
533 	ecb->hashkey = ecb->dmamap_self->dm_segs[0].ds_addr;
534 	hashnum = ECB_HASH(ecb->hashkey);
535 	ecb->nexthash = sc->sc_ecbhash[hashnum];
536 	sc->sc_ecbhash[hashnum] = ecb;
537 	ahb_reset_ecb(sc, ecb);
538 }
539 
540 int
541 ahb_create_ecbs(sc)
542 	struct ahb_softc *sc;
543 {
544 	bus_dma_segment_t seg;
545 	bus_size_t size;
546 	struct ahb_ecb *ecb;
547 	int rseg, error;
548 
549 	size = NBPG;
550 	error = bus_dmamem_alloc(sc->sc_dmat, size, NBPG, 0, &seg, 1, &rseg,
551 	    BUS_DMA_NOWAIT);
552 	if (error)
553 		return (error);
554 
555 	error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, size,
556 	    (caddr_t *)&ecb, BUS_DMA_NOWAIT|BUS_DMAMEM_NOSYNC);
557 	if (error) {
558 		bus_dmamem_free(sc->sc_dmat, &seg, rseg);
559 		return (error);
560 	}
561 
562 	bzero(ecb, size);
563 	while (size > sizeof(struct ahb_ecb)) {
564 		ahb_init_ecb(sc, ecb);
565 		sc->sc_numecbs++;
566 		TAILQ_INSERT_TAIL(&sc->sc_free_ecb, ecb, chain);
567 		(caddr_t)ecb += ALIGN(sizeof(struct ahb_ecb));
568 		size -= ALIGN(sizeof(struct ahb_ecb));
569 	}
570 
571 	return (0);
572 }
573 
574 /*
575  * Get a free ecb
576  *
577  * If there are none, see if we can allocate a new one. If so, put it in the
578  * hash table too otherwise either return an error or sleep.
579  */
580 struct ahb_ecb *
581 ahb_get_ecb(sc, flags)
582 	struct ahb_softc *sc;
583 	int flags;
584 {
585 	struct ahb_ecb *ecb;
586 	int s;
587 
588 	s = splbio();
589 
590 	/*
591 	 * If we can and have to, sleep waiting for one to come free
592 	 * but only if we can't allocate a new one.
593 	 */
594 	for (;;) {
595 		ecb = sc->sc_free_ecb.tqh_first;
596 		if (ecb) {
597 			TAILQ_REMOVE(&sc->sc_free_ecb, ecb, chain);
598 			break;
599 		}
600 		if (sc->sc_numecbs < AHB_ECB_MAX) {
601 			if (ahb_create_ecbs(sc)) {
602 				printf("%s: can't allocate ecbs\n",
603 				    sc->sc_dev.dv_xname);
604 				goto out;
605 			}
606 			continue;
607 		}
608 		if ((flags & SCSI_NOSLEEP) != 0)
609 			goto out;
610 		tsleep(&sc->sc_free_ecb, PRIBIO, "ahbecb", 0);
611 	}
612 
613 	ecb->flags |= ECB_ALLOC;
614 
615 out:
616 	splx(s);
617 	return ecb;
618 }
619 
620 /*
621  * given a physical address, find the ecb that it corresponds to.
622  */
623 struct ahb_ecb *
624 ahb_ecb_phys_kv(sc, ecb_phys)
625 	struct ahb_softc *sc;
626 	physaddr ecb_phys;
627 {
628 	int hashnum = ECB_HASH(ecb_phys);
629 	struct ahb_ecb *ecb = sc->sc_ecbhash[hashnum];
630 
631 	while (ecb) {
632 		if (ecb->hashkey == ecb_phys)
633 			break;
634 		ecb = ecb->nexthash;
635 	}
636 	return ecb;
637 }
638 
639 /*
640  * We have a ecb which has been processed by the adaptor, now we look to see
641  * how the operation went.
642  */
643 void
644 ahb_done(sc, ecb)
645 	struct ahb_softc *sc;
646 	struct ahb_ecb *ecb;
647 {
648 	bus_dma_tag_t dmat = sc->sc_dmat;
649 	struct scsi_sense_data *s1, *s2;
650 	struct scsi_xfer *xs = ecb->xs;
651 
652 	SC_DEBUG(xs->sc_link, SDEV_DB2, ("ahb_done\n"));
653 
654 	/*
655 	 * If we were a data transfer, unload the map that described
656 	 * the data buffer.
657 	 */
658 	if (xs->datalen) {
659 		bus_dmamap_sync(dmat, ecb->dmamap_xfer,
660 		    (xs->flags & SCSI_DATA_IN) ? BUS_DMASYNC_POSTREAD :
661 		    BUS_DMASYNC_POSTWRITE);
662 		bus_dmamap_unload(dmat, ecb->dmamap_xfer);
663 	}
664 
665 	/*
666 	 * Otherwise, put the results of the operation
667 	 * into the xfer and call whoever started it
668 	 */
669 	if ((ecb->flags & ECB_ALLOC) == 0) {
670 		printf("%s: exiting ecb not allocated!\n", sc->sc_dev.dv_xname);
671 		Debugger();
672 	}
673 	if (ecb->flags & ECB_IMMED) {
674 		if (ecb->flags & ECB_IMMED_FAIL)
675 			xs->error = XS_DRIVER_STUFFUP;
676 		goto done;
677 	}
678 	if (xs->error == XS_NOERROR) {
679 		if (ecb->ecb_status.host_stat != HS_OK) {
680 			switch (ecb->ecb_status.host_stat) {
681 			case HS_TIMED_OUT:	/* No response */
682 				xs->error = XS_SELTIMEOUT;
683 				break;
684 			default:	/* Other scsi protocol messes */
685 				printf("%s: host_stat %x\n",
686 				    sc->sc_dev.dv_xname, ecb->ecb_status.host_stat);
687 				xs->error = XS_DRIVER_STUFFUP;
688 			}
689 		} else if (ecb->ecb_status.target_stat != SCSI_OK) {
690 			switch (ecb->ecb_status.target_stat) {
691 			case SCSI_CHECK:
692 				s1 = &ecb->ecb_sense;
693 				s2 = &xs->sense;
694 				*s2 = *s1;
695 				xs->error = XS_SENSE;
696 				break;
697 			case SCSI_BUSY:
698 				xs->error = XS_BUSY;
699 				break;
700 			default:
701 				printf("%s: target_stat %x\n",
702 				    sc->sc_dev.dv_xname, ecb->ecb_status.target_stat);
703 				xs->error = XS_DRIVER_STUFFUP;
704 			}
705 		} else
706 			xs->resid = 0;
707 	}
708 done:
709 	ahb_free_ecb(sc, ecb);
710 	xs->flags |= ITSDONE;
711 	scsi_done(xs);
712 }
713 
714 /*
715  * Start the board, ready for normal operation
716  */
717 int
718 ahb_find(iot, ioh, sc)
719 	bus_space_tag_t iot;
720 	bus_space_handle_t ioh;
721 	struct ahb_probe_data *sc;
722 {
723 	u_char intdef;
724 	int i, irq, busid;
725 	int wait = 1000;	/* 1 sec enough? */
726 
727 	bus_space_write_1(iot, ioh, PORTADDR, PORTADDR_ENHANCED);
728 
729 #define	NO_NO 1
730 #ifdef NO_NO
731 	/*
732 	 * reset board, If it doesn't respond, assume
733 	 * that it's not there.. good for the probe
734 	 */
735 	bus_space_write_1(iot, ioh, G2CNTRL, G2CNTRL_HARD_RESET);
736 	delay(1000);
737 	bus_space_write_1(iot, ioh, G2CNTRL, 0);
738 	delay(10000);
739 	while (--wait) {
740 		if ((bus_space_read_1(iot, ioh, G2STAT) & G2STAT_BUSY) == 0)
741 			break;
742 		delay(1000);
743 	}
744 	if (!wait) {
745 #ifdef	AHBDEBUG
746 		printf("ahb_find: No answer from aha1742 board\n");
747 #endif /* AHBDEBUG */
748 		return ENXIO;
749 	}
750 	i = bus_space_read_1(iot, ioh, MBOXIN0);
751 	if (i) {
752 		printf("self test failed, val = 0x%x\n", i);
753 		return EIO;
754 	}
755 
756 	/* Set it again, just to be sure. */
757 	bus_space_write_1(iot, ioh, PORTADDR, PORTADDR_ENHANCED);
758 #endif
759 
760 	while (bus_space_read_1(iot, ioh, G2STAT) & G2STAT_INT_PEND) {
761 		printf(".");
762 		bus_space_write_1(iot, ioh, G2CNTRL, G2CNTRL_CLEAR_EISA_INT);
763 		delay(10000);
764 	}
765 
766 	intdef = bus_space_read_1(iot, ioh, INTDEF);
767 	switch (intdef & 0x07) {
768 	case INT9:
769 		irq = 9;
770 		break;
771 	case INT10:
772 		irq = 10;
773 		break;
774 	case INT11:
775 		irq = 11;
776 		break;
777 	case INT12:
778 		irq = 12;
779 		break;
780 	case INT14:
781 		irq = 14;
782 		break;
783 	case INT15:
784 		irq = 15;
785 		break;
786 	default:
787 		printf("illegal int setting %x\n", intdef);
788 		return EIO;
789 	}
790 
791 	bus_space_write_1(iot, ioh, INTDEF, (intdef | INTEN));	/* make sure we can interrupt */
792 
793 	/* who are we on the scsi bus? */
794 	busid = (bus_space_read_1(iot, ioh, SCSIDEF) & HSCSIID);
795 
796 	/* if we want to return data, do so now */
797 	if (sc) {
798 		sc->sc_irq = irq;
799 		sc->sc_scsi_dev = busid;
800 	}
801 
802 	/*
803 	 * Note that we are going and return (to probe)
804 	 */
805 	return 0;
806 }
807 
808 void
809 ahb_init(sc)
810 	struct ahb_softc *sc;
811 {
812 
813 }
814 
815 void
816 ahbminphys(bp)
817 	struct buf *bp;
818 {
819 
820 	if (bp->b_bcount > AHB_MAXXFER)
821 		bp->b_bcount = AHB_MAXXFER;
822 	minphys(bp);
823 }
824 
825 /*
826  * start a scsi operation given the command and the data address.  Also needs
827  * the unit, target and lu.
828  */
829 int
830 ahb_scsi_cmd(xs)
831 	struct scsi_xfer *xs;
832 {
833 	struct scsi_link *sc_link = xs->sc_link;
834 	struct ahb_softc *sc = sc_link->adapter_softc;
835 	bus_dma_tag_t dmat = sc->sc_dmat;
836 	struct ahb_ecb *ecb;
837 	int error, seg, flags, s;
838 
839 	SC_DEBUG(sc_link, SDEV_DB2, ("ahb_scsi_cmd\n"));
840 
841 	/*
842 	 * get a ecb (mbox-out) to use. If the transfer
843 	 * is from a buf (possibly from interrupt time)
844 	 * then we can't allow it to sleep
845 	 */
846 	flags = xs->flags;
847 	if ((ecb = ahb_get_ecb(sc, flags)) == NULL) {
848 		xs->error = XS_DRIVER_STUFFUP;
849 		return TRY_AGAIN_LATER;
850 	}
851 	ecb->xs = xs;
852 	ecb->timeout = xs->timeout;
853 
854 	/*
855 	 * If it's a reset, we need to do an 'immediate'
856 	 * command, and store its ecb for later
857 	 * if there is already an immediate waiting,
858 	 * then WE must wait
859 	 */
860 	if (flags & SCSI_RESET) {
861 		ecb->flags |= ECB_IMMED;
862 		if (sc->sc_immed_ecb)
863 			return TRY_AGAIN_LATER;
864 		sc->sc_immed_ecb = ecb;
865 
866 		s = splbio();
867 		ahb_send_immed(sc, AHB_TARG_RESET, ecb);
868 		splx(s);
869 
870 		if ((flags & SCSI_POLL) == 0)
871 			return SUCCESSFULLY_QUEUED;
872 
873 		/*
874 		 * If we can't use interrupts, poll on completion
875 		 */
876 		if (ahb_poll(sc, xs, ecb->timeout))
877 			ahb_timeout(ecb);
878 		return COMPLETE;
879 	}
880 
881 	/*
882 	 * Put all the arguments for the xfer in the ecb
883 	 */
884 	ecb->opcode = ECB_SCSI_OP;
885 	ecb->opt1 = ECB_SES /*| ECB_DSB*/ | ECB_ARS;
886 	ecb->opt2 = sc_link->lun | ECB_NRB;
887 	bcopy(xs->cmd, &ecb->scsi_cmd, ecb->scsi_cmd_length = xs->cmdlen);
888 	ecb->sense_ptr = ecb->dmamap_self->dm_segs[0].ds_addr +
889 	    offsetof(struct ahb_ecb, ecb_sense);
890 	ecb->req_sense_length = sizeof(ecb->ecb_sense);
891 	ecb->status = ecb->dmamap_self->dm_segs[0].ds_addr +
892 	    offsetof(struct ahb_ecb, ecb_status);
893 	ecb->ecb_status.host_stat = 0x00;
894 	ecb->ecb_status.target_stat = 0x00;
895 
896 	if (xs->datalen) {
897 		/*
898 		 * Map the DMA transfer.
899 		 */
900 #ifdef TFS
901 		if (flags & SCSI_DATA_UIO) {
902 			error = bus_dmamap_load_uio(sc->sc_dmat,
903 			    ecb->dmamap_xfer, (struct uio *)xs->data,
904 			    (flags & SCSI_NOSLEEP) ? BUS_DMA_NOWAIT :
905 			    BUS_DMA_WAITOK);
906 		} else
907 #endif /* TFS */
908 		{
909 			error = bus_dmamap_load(sc->sc_dmat,
910 			    ecb->dmamap_xfer, xs->data, xs->datalen, NULL,
911 			    (flags & SCSI_NOSLEEP) ? BUS_DMA_NOWAIT :
912 			    BUS_DMA_WAITOK);
913 		}
914 
915 		if (error) {
916 			if (error == EFBIG) {
917 				printf("%s: ahb_scsi_cmd, more than %d"
918 				    " dma segments\n",
919 				    sc->sc_dev.dv_xname, AHB_NSEG);
920 			} else {
921 				printf("%s: ahb_scsi_cmd, error %d loading"
922 				    " dma map\n",
923 				    sc->sc_dev.dv_xname, error);
924 			}
925 			goto bad;
926 		}
927 
928 		bus_dmamap_sync(dmat, ecb->dmamap_xfer,
929 		    (flags & SCSI_DATA_IN) ? BUS_DMASYNC_PREREAD :
930 		    BUS_DMASYNC_PREWRITE);
931 
932 		/*
933 		 * Load the hardware scatter/gather map with the
934 		 * contents of the DMA map.
935 		 */
936 		for (seg = 0; seg < ecb->dmamap_xfer->dm_nsegs; seg++) {
937 			ecb->ahb_dma[seg].seg_addr =
938 			    ecb->dmamap_xfer->dm_segs[seg].ds_addr;
939 			ecb->ahb_dma[seg].seg_len =
940 			    ecb->dmamap_xfer->dm_segs[seg].ds_len;
941 		}
942 
943 		ecb->data_addr = ecb->dmamap_self->dm_segs[0].ds_addr +
944 		    offsetof(struct ahb_ecb, ahb_dma);
945 		ecb->data_length = ecb->dmamap_xfer->dm_nsegs *
946 		    sizeof(struct ahb_dma_seg);
947 		ecb->opt1 |= ECB_S_G;
948 	} else {	/* No data xfer, use non S/G values */
949 		ecb->data_addr = (physaddr)0;
950 		ecb->data_length = 0;
951 	}
952 	ecb->link_addr = (physaddr)0;
953 
954 	s = splbio();
955 	ahb_send_mbox(sc, OP_START_ECB, ecb);
956 	splx(s);
957 
958 	/*
959 	 * Usually return SUCCESSFULLY QUEUED
960 	 */
961 	if ((flags & SCSI_POLL) == 0)
962 		return SUCCESSFULLY_QUEUED;
963 
964 	/*
965 	 * If we can't use interrupts, poll on completion
966 	 */
967 	if (ahb_poll(sc, xs, ecb->timeout)) {
968 		ahb_timeout(ecb);
969 		if (ahb_poll(sc, xs, ecb->timeout))
970 			ahb_timeout(ecb);
971 	}
972 	return COMPLETE;
973 
974 bad:
975 	xs->error = XS_DRIVER_STUFFUP;
976 	ahb_free_ecb(sc, ecb);
977 	return COMPLETE;
978 }
979 
980 /*
981  * Function to poll for command completion when in poll mode
982  */
983 int
984 ahb_poll(sc, xs, count)
985 	struct ahb_softc *sc;
986 	struct scsi_xfer *xs;
987 	int count;
988 {				/* in msec  */
989 	bus_space_tag_t iot = sc->sc_iot;
990 	bus_space_handle_t ioh = sc->sc_ioh;
991 
992 	while (count) {
993 		/*
994 		 * If we had interrupts enabled, would we
995 		 * have got an interrupt?
996 		 */
997 		if (bus_space_read_1(iot, ioh, G2STAT) & G2STAT_INT_PEND)
998 			ahbintr(sc);
999 		if (xs->flags & ITSDONE)
1000 			return 0;
1001 		delay(1000);
1002 		count--;
1003 	}
1004 	return 1;
1005 }
1006 
1007 void
1008 ahb_timeout(arg)
1009 	void *arg;
1010 {
1011 	struct ahb_ecb *ecb = arg;
1012 	struct scsi_xfer *xs = ecb->xs;
1013 	struct scsi_link *sc_link = xs->sc_link;
1014 	struct ahb_softc *sc = sc_link->adapter_softc;
1015 	int s;
1016 
1017 	sc_print_addr(sc_link);
1018 	printf("timed out");
1019 
1020 	s = splbio();
1021 
1022 	if (ecb->flags & ECB_IMMED) {
1023 		printf("\n");
1024 		ecb->flags |= ECB_IMMED_FAIL;
1025 		/* XXX Must reset! */
1026 	} else
1027 
1028 	/*
1029 	 * If it has been through before, then
1030 	 * a previous abort has failed, don't
1031 	 * try abort again
1032 	 */
1033 	if (ecb->flags & ECB_ABORT) {
1034 		/* abort timed out */
1035 		printf(" AGAIN\n");
1036 		/* XXX Must reset! */
1037 	} else {
1038 		/* abort the operation that has timed out */
1039 		printf("\n");
1040 		ecb->xs->error = XS_TIMEOUT;
1041 		ecb->timeout = AHB_ABORT_TIMEOUT;
1042 		ecb->flags |= ECB_ABORT;
1043 		ahb_send_mbox(sc, OP_ABORT_ECB, ecb);
1044 	}
1045 
1046 	splx(s);
1047 }
1048