1 /* $NetBSD: if_le_dec.c,v 1.11 2001/05/30 11:46:34 mrg Exp $ */ 2 3 /*- 4 * Copyright (c) 1997 Jonathan Stone. All rights reserved. 5 * Copyright (c) 1995 Charles M. Hannum. All rights reserved. 6 * Copyright (c) 1992, 1993 7 * The Regents of the University of California. All rights reserved. 8 * 9 * This code is derived from software contributed to Berkeley by 10 * Ralph Campbell and Rick Macklem. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the University of 23 * California, Berkeley and its contributors. 24 * 4. Neither the name of the University nor the names of its contributors 25 * may be used to endorse or promote products derived from this software 26 * without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 38 * SUCH DAMAGE. 39 * 40 * @(#)if_le.c 8.2 (Berkeley) 11/16/93 41 */ 42 43 #include "opt_inet.h" 44 #include "bpfilter.h" 45 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/mbuf.h> 49 #include <sys/syslog.h> 50 #include <sys/socket.h> 51 #include <sys/device.h> 52 53 #include <net/if.h> 54 #include <net/if_ether.h> 55 #include <net/if_media.h> 56 57 #ifdef INET 58 #include <netinet/in.h> 59 #include <netinet/if_inarp.h> 60 #endif 61 62 #include <dev/ic/lancereg.h> 63 #include <dev/ic/lancevar.h> 64 #include <dev/ic/am7990reg.h> 65 #include <dev/ic/am7990var.h> 66 67 #include <dev/tc/if_levar.h> 68 #include <dev/tc/tcvar.h> 69 70 #include <machine/bus.h> 71 72 /* access LANCE registers */ 73 void le_dec_writereg __P((volatile u_short *regptr, u_short val)); 74 #define LERDWR(cntl, src, dst) { (dst) = (src); tc_mb(); } 75 #define LEWREG(src, dst) le_dec_writereg(&(dst), (src)) 76 77 #if defined(_KERNEL_OPT) 78 #include "opt_ddb.h" 79 #endif 80 81 #ifdef DDB 82 #define integrate 83 #define hide 84 #else 85 #define integrate static __inline 86 #define hide static 87 #endif 88 89 hide void le_dec_wrcsr __P((struct lance_softc *, u_int16_t, u_int16_t)); 90 hide u_int16_t le_dec_rdcsr __P((struct lance_softc *, u_int16_t)); 91 92 void 93 dec_le_common_attach(sc, eap) 94 struct am7990_softc *sc; 95 u_char *eap; 96 { 97 int i; 98 99 sc->lsc.sc_rdcsr = le_dec_rdcsr; 100 sc->lsc.sc_wrcsr = le_dec_wrcsr; 101 sc->lsc.sc_hwinit = NULL; 102 103 sc->lsc.sc_conf3 = 0; 104 sc->lsc.sc_addr = 0; 105 sc->lsc.sc_memsize = 65536; 106 107 /* 108 * Get the ethernet address out of rom 109 */ 110 for (i = 0; i < sizeof(sc->lsc.sc_enaddr); i++) { 111 sc->lsc.sc_enaddr[i] = *eap; 112 eap += 4; 113 } 114 115 am7990_config(sc); 116 } 117 118 hide void 119 le_dec_wrcsr(sc, port, val) 120 struct lance_softc *sc; 121 u_int16_t port, val; 122 { 123 struct lereg1 *ler1 = ((struct le_softc *)sc)->sc_r1; 124 125 LEWREG(port, ler1->ler1_rap); 126 LERDWR(port, val, ler1->ler1_rdp); 127 } 128 129 hide u_int16_t 130 le_dec_rdcsr(sc, port) 131 struct lance_softc *sc; 132 u_int16_t port; 133 { 134 struct lereg1 *ler1 = ((struct le_softc *)sc)->sc_r1; 135 u_int16_t val; 136 137 LEWREG(port, ler1->ler1_rap); 138 LERDWR(0, ler1->ler1_rdp, val); 139 return (val); 140 } 141 142 /* 143 * Write a lance register port, reading it back to ensure success. This seems 144 * to be necessary during initialization, since the chip appears to be a bit 145 * pokey sometimes. 146 */ 147 void 148 le_dec_writereg(regptr, val) 149 register volatile u_short *regptr; 150 register u_short val; 151 { 152 register int i = 0; 153 154 while (*regptr != val) { 155 *regptr = val; 156 tc_mb(); 157 if (++i > 10000) { 158 printf("le: Reg did not settle (to x%x): x%x\n", val, 159 *regptr); 160 return; 161 } 162 DELAY(100); 163 } 164 } 165 166 /* 167 * Routines for accessing the transmit and receive buffers are provided 168 * by am7990.c, because of the LE_NEED_BUF_* macros defined above. 169 * Unfortunately, CPU addressing of these buffers is done in one of 170 * 3 ways: 171 * - contiguous (for the 3max and turbochannel option card) 172 * - gap2, which means shorts (2 bytes) interspersed with short (2 byte) 173 * spaces (for the pmax, vax 3400, and ioasic LANCE descriptors) 174 * - gap16, which means 16bytes interspersed with 16byte spaces 175 * for buffers which must begin on a 32byte boundary (for 3min, maxine, 176 * and alpha) 177 * The buffer offset is the logical byte offset, assuming contiguous storage. 178 */ 179