1 /* $NetBSD: dz.c,v 1.17 2005/09/06 21:40:39 kleink Exp $ */ 2 /* 3 * Copyright (c) 1992, 1993 4 * The Regents of the University of California. All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * Ralph Campbell and Rick Macklem. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. Neither the name of the University nor the names of its contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 */ 33 34 /* 35 * Copyright (c) 1996 Ken C. Wellsch. All rights reserved. 36 * 37 * This code is derived from software contributed to Berkeley by 38 * Ralph Campbell and Rick Macklem. 39 * 40 * Redistribution and use in source and binary forms, with or without 41 * modification, are permitted provided that the following conditions 42 * are met: 43 * 1. Redistributions of source code must retain the above copyright 44 * notice, this list of conditions and the following disclaimer. 45 * 2. Redistributions in binary form must reproduce the above copyright 46 * notice, this list of conditions and the following disclaimer in the 47 * documentation and/or other materials provided with the distribution. 48 * 3. All advertising materials mentioning features or use of this software 49 * must display the following acknowledgement: 50 * This product includes software developed by the University of 51 * California, Berkeley and its contributors. 52 * 4. Neither the name of the University nor the names of its contributors 53 * may be used to endorse or promote products derived from this software 54 * without specific prior written permission. 55 * 56 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 57 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 58 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 59 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 60 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 61 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 62 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 63 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 64 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 65 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 66 * SUCH DAMAGE. 67 */ 68 69 #include <sys/cdefs.h> 70 __KERNEL_RCSID(0, "$NetBSD: dz.c,v 1.17 2005/09/06 21:40:39 kleink Exp $"); 71 72 #include <sys/param.h> 73 #include <sys/systm.h> 74 #include <sys/callout.h> 75 #include <sys/ioctl.h> 76 #include <sys/tty.h> 77 #include <sys/proc.h> 78 #include <sys/buf.h> 79 #include <sys/conf.h> 80 #include <sys/file.h> 81 #include <sys/uio.h> 82 #include <sys/kernel.h> 83 #include <sys/syslog.h> 84 #include <sys/device.h> 85 86 #include <machine/bus.h> 87 88 #include <dev/dec/dzreg.h> 89 #include <dev/dec/dzvar.h> 90 91 #include <dev/cons.h> 92 93 #define DZ_READ_BYTE(adr) \ 94 bus_space_read_1(sc->sc_iot, sc->sc_ioh, sc->sc_dr.adr) 95 #define DZ_READ_WORD(adr) \ 96 bus_space_read_2(sc->sc_iot, sc->sc_ioh, sc->sc_dr.adr) 97 #define DZ_WRITE_BYTE(adr, val) \ 98 bus_space_write_1(sc->sc_iot, sc->sc_ioh, sc->sc_dr.adr, val) 99 #define DZ_WRITE_WORD(adr, val) \ 100 bus_space_write_2(sc->sc_iot, sc->sc_ioh, sc->sc_dr.adr, val) 101 #define DZ_BARRIER() \ 102 bus_space_barrier(sc->sc_iot, sc->sc_ioh, sc->sc_dr.dr_firstreg, \ 103 sc->sc_dr.dr_winsize, \ 104 BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ) 105 106 #include "ioconf.h" 107 108 /* Flags used to monitor modem bits, make them understood outside driver */ 109 110 #define DML_DTR TIOCM_DTR 111 #define DML_DCD TIOCM_CD 112 #define DML_RI TIOCM_RI 113 #define DML_BRK 0100000 /* no equivalent, we will mask */ 114 115 static const struct speedtab dzspeedtab[] = 116 { 117 { 0, 0 }, 118 { 50, DZ_LPR_B50 }, 119 { 75, DZ_LPR_B75 }, 120 { 110, DZ_LPR_B110 }, 121 { 134, DZ_LPR_B134 }, 122 { 150, DZ_LPR_B150 }, 123 { 300, DZ_LPR_B300 }, 124 { 600, DZ_LPR_B600 }, 125 { 1200, DZ_LPR_B1200 }, 126 { 1800, DZ_LPR_B1800 }, 127 { 2000, DZ_LPR_B2000 }, 128 { 2400, DZ_LPR_B2400 }, 129 { 3600, DZ_LPR_B3600 }, 130 { 4800, DZ_LPR_B4800 }, 131 { 7200, DZ_LPR_B7200 }, 132 { 9600, DZ_LPR_B9600 }, 133 { 19200, DZ_LPR_B19200 }, 134 { -1, -1 } 135 }; 136 137 static void dzstart(struct tty *); 138 static int dzparam(struct tty *, struct termios *); 139 static unsigned dzmctl(struct dz_softc *, int, int, int); 140 static void dzscan(void *); 141 142 dev_type_open(dzopen); 143 dev_type_close(dzclose); 144 dev_type_read(dzread); 145 dev_type_write(dzwrite); 146 dev_type_ioctl(dzioctl); 147 dev_type_stop(dzstop); 148 dev_type_tty(dztty); 149 dev_type_poll(dzpoll); 150 151 const struct cdevsw dz_cdevsw = { 152 dzopen, dzclose, dzread, dzwrite, dzioctl, 153 dzstop, dztty, dzpoll, nommap, ttykqfilter, D_TTY 154 }; 155 156 /* 157 * The DZ series doesn't interrupt on carrier transitions, 158 * so we have to use a timer to watch it. 159 */ 160 int dz_timer; /* true if timer started */ 161 struct callout dzscan_ch; 162 static struct cnm_state dz_cnm_state; 163 164 void 165 dzattach(struct dz_softc *sc, struct evcnt *parent_evcnt, int consline) 166 { 167 int n; 168 169 sc->sc_rxint = sc->sc_brk = 0; 170 sc->sc_consline = consline; 171 172 sc->sc_dr.dr_tcrw = sc->sc_dr.dr_tcr; 173 DZ_WRITE_WORD(dr_csr, DZ_CSR_MSE | DZ_CSR_RXIE | DZ_CSR_TXIE); 174 DZ_WRITE_BYTE(dr_dtr, 0); 175 DZ_WRITE_BYTE(dr_break, 0); 176 DZ_BARRIER(); 177 178 /* Initialize our softc structure. Should be done in open? */ 179 180 for (n = 0; n < sc->sc_type; n++) { 181 sc->sc_dz[n].dz_sc = sc; 182 sc->sc_dz[n].dz_line = n; 183 sc->sc_dz[n].dz_tty = ttymalloc(); 184 } 185 186 evcnt_attach_dynamic(&sc->sc_rintrcnt, EVCNT_TYPE_INTR, parent_evcnt, 187 sc->sc_dev.dv_xname, "rintr"); 188 evcnt_attach_dynamic(&sc->sc_tintrcnt, EVCNT_TYPE_INTR, parent_evcnt, 189 sc->sc_dev.dv_xname, "tintr"); 190 191 /* Console magic keys */ 192 cn_init_magic(&dz_cnm_state); 193 cn_set_magic("\047\001"); /* default magic is BREAK */ 194 /* VAX will change it in MD code */ 195 196 /* Alas no interrupt on modem bit changes, so we manually scan */ 197 198 if (dz_timer == 0) { 199 dz_timer = 1; 200 callout_init(&dzscan_ch); 201 callout_reset(&dzscan_ch, hz, dzscan, NULL); 202 } 203 printf("\n"); 204 } 205 206 /* Receiver Interrupt */ 207 208 void 209 dzrint(void *arg) 210 { 211 struct dz_softc *sc = arg; 212 struct tty *tp; 213 int cc, mcc, line; 214 unsigned c; 215 int overrun = 0; 216 217 sc->sc_rxint++; 218 219 while ((c = DZ_READ_WORD(dr_rbuf)) & DZ_RBUF_DATA_VALID) { 220 cc = c & 0xFF; 221 line = DZ_PORT(c>>8); 222 tp = sc->sc_dz[line].dz_tty; 223 224 /* Must be caught early */ 225 if (sc->sc_dz[line].dz_catch && 226 (*sc->sc_dz[line].dz_catch)(sc->sc_dz[line].dz_private, cc)) 227 continue; 228 229 if ((c & (DZ_RBUF_FRAMING_ERR | 0xff)) == DZ_RBUF_FRAMING_ERR) 230 mcc = CNC_BREAK; 231 else 232 mcc = cc; 233 234 cn_check_magic(tp->t_dev, mcc, dz_cnm_state); 235 236 if (!(tp->t_state & TS_ISOPEN)) { 237 wakeup((caddr_t)&tp->t_rawq); 238 continue; 239 } 240 241 if ((c & DZ_RBUF_OVERRUN_ERR) && overrun == 0) { 242 log(LOG_WARNING, "%s: silo overflow, line %d\n", 243 sc->sc_dev.dv_xname, line); 244 overrun = 1; 245 } 246 247 if (c & DZ_RBUF_FRAMING_ERR) 248 cc |= TTY_FE; 249 if (c & DZ_RBUF_PARITY_ERR) 250 cc |= TTY_PE; 251 252 (*tp->t_linesw->l_rint)(cc, tp); 253 } 254 } 255 256 /* Transmitter Interrupt */ 257 258 void 259 dzxint(void *arg) 260 { 261 struct dz_softc *sc = arg; 262 struct tty *tp; 263 struct clist *cl; 264 int line, ch, csr; 265 u_char tcr; 266 267 /* 268 * Switch to POLLED mode. 269 * Some simple measurements indicated that even on 270 * one port, by freeing the scanner in the controller 271 * by either providing a character or turning off 272 * the port when output is complete, the transmitter 273 * was ready to accept more output when polled again. 274 * With just two ports running the game "worms," 275 * almost every interrupt serviced both transmitters! 276 * Each UART is double buffered, so if the scanner 277 * is quick enough and timing works out, we can even 278 * feed the same port twice. 279 * 280 * Ragge 980517: 281 * Do not need to turn off interrupts, already at interrupt level. 282 * Remove the pdma stuff; no great need of it right now. 283 */ 284 285 while (((csr = DZ_READ_WORD(dr_csr)) & DZ_CSR_TX_READY) != 0) { 286 287 line = DZ_PORT(csr>>8); 288 289 tp = sc->sc_dz[line].dz_tty; 290 cl = &tp->t_outq; 291 tp->t_state &= ~TS_BUSY; 292 293 /* Just send out a char if we have one */ 294 /* As long as we can fill the chip buffer, we just loop here */ 295 if (cl->c_cc) { 296 tp->t_state |= TS_BUSY; 297 ch = getc(cl); 298 DZ_WRITE_BYTE(dr_tbuf, ch); 299 DZ_BARRIER(); 300 continue; 301 } 302 /* Nothing to send; clear the scan bit */ 303 /* Clear xmit scanner bit; dzstart may set it again */ 304 tcr = DZ_READ_WORD(dr_tcrw); 305 tcr &= 255; 306 tcr &= ~(1 << line); 307 DZ_WRITE_BYTE(dr_tcr, tcr); 308 DZ_BARRIER(); 309 if (sc->sc_dz[line].dz_catch) 310 continue; 311 312 if (tp->t_state & TS_FLUSH) 313 tp->t_state &= ~TS_FLUSH; 314 else 315 ndflush (&tp->t_outq, cl->c_cc); 316 317 (*tp->t_linesw->l_start)(tp); 318 } 319 } 320 321 int 322 dzopen(dev_t dev, int flag, int mode, struct proc *p) 323 { 324 struct tty *tp; 325 int unit, line; 326 struct dz_softc *sc; 327 int s, error = 0; 328 329 unit = DZ_I2C(minor(dev)); 330 line = DZ_PORT(minor(dev)); 331 if (unit >= dz_cd.cd_ndevs || dz_cd.cd_devs[unit] == NULL) 332 return (ENXIO); 333 334 sc = dz_cd.cd_devs[unit]; 335 336 if (line >= sc->sc_type) 337 return ENXIO; 338 339 /* if some other device is using the line, it's busy */ 340 if (sc->sc_dz[line].dz_catch) 341 return EBUSY; 342 343 tp = sc->sc_dz[line].dz_tty; 344 if (tp == NULL) 345 return (ENODEV); 346 tp->t_oproc = dzstart; 347 tp->t_param = dzparam; 348 tp->t_dev = dev; 349 if ((tp->t_state & TS_ISOPEN) == 0) { 350 ttychars(tp); 351 if (tp->t_ispeed == 0) { 352 tp->t_iflag = TTYDEF_IFLAG; 353 tp->t_oflag = TTYDEF_OFLAG; 354 tp->t_cflag = TTYDEF_CFLAG; 355 tp->t_lflag = TTYDEF_LFLAG; 356 tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED; 357 } 358 (void) dzparam(tp, &tp->t_termios); 359 ttsetwater(tp); 360 } else if ((tp->t_state & TS_XCLUDE) && 361 suser(p->p_ucred, &p->p_acflag) != 0) 362 return (EBUSY); 363 /* Use DMBIS and *not* DMSET or else we clobber incoming bits */ 364 if (dzmctl(sc, line, DML_DTR, DMBIS) & DML_DCD) 365 tp->t_state |= TS_CARR_ON; 366 s = spltty(); 367 while (!(flag & O_NONBLOCK) && !(tp->t_cflag & CLOCAL) && 368 !(tp->t_state & TS_CARR_ON)) { 369 tp->t_wopen++; 370 error = ttysleep(tp, (caddr_t)&tp->t_rawq, 371 TTIPRI | PCATCH, ttopen, 0); 372 tp->t_wopen--; 373 if (error) 374 break; 375 } 376 (void) splx(s); 377 if (error) 378 return (error); 379 return ((*tp->t_linesw->l_open)(dev, tp)); 380 } 381 382 /*ARGSUSED*/ 383 int 384 dzclose(dev_t dev, int flag, int mode, struct proc *p) 385 { 386 struct dz_softc *sc; 387 struct tty *tp; 388 int unit, line; 389 390 391 unit = DZ_I2C(minor(dev)); 392 line = DZ_PORT(minor(dev)); 393 sc = dz_cd.cd_devs[unit]; 394 395 tp = sc->sc_dz[line].dz_tty; 396 397 (*tp->t_linesw->l_close)(tp, flag); 398 399 /* Make sure a BREAK state is not left enabled. */ 400 (void) dzmctl(sc, line, DML_BRK, DMBIC); 401 402 /* Do a hangup if so required. */ 403 if ((tp->t_cflag & HUPCL) || tp->t_wopen || !(tp->t_state & TS_ISOPEN)) 404 (void) dzmctl(sc, line, 0, DMSET); 405 406 return (ttyclose(tp)); 407 } 408 409 int 410 dzread(dev_t dev, struct uio *uio, int flag) 411 { 412 struct tty *tp; 413 struct dz_softc *sc; 414 415 sc = dz_cd.cd_devs[DZ_I2C(minor(dev))]; 416 417 tp = sc->sc_dz[DZ_PORT(minor(dev))].dz_tty; 418 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 419 } 420 421 int 422 dzwrite(dev_t dev, struct uio *uio, int flag) 423 { 424 struct tty *tp; 425 struct dz_softc *sc; 426 427 sc = dz_cd.cd_devs[DZ_I2C(minor(dev))]; 428 429 tp = sc->sc_dz[DZ_PORT(minor(dev))].dz_tty; 430 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 431 } 432 433 int 434 dzpoll(dev, events, p) 435 dev_t dev; 436 int events; 437 struct proc *p; 438 { 439 struct tty *tp; 440 struct dz_softc *sc; 441 442 sc = dz_cd.cd_devs[DZ_I2C(minor(dev))]; 443 444 tp = sc->sc_dz[DZ_PORT(minor(dev))].dz_tty; 445 return ((*tp->t_linesw->l_poll)(tp, events, p)); 446 } 447 448 /*ARGSUSED*/ 449 int 450 dzioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p) 451 { 452 struct dz_softc *sc; 453 struct tty *tp; 454 int unit, line; 455 int error; 456 457 unit = DZ_I2C(minor(dev)); 458 line = DZ_PORT(minor(dev)); 459 sc = dz_cd.cd_devs[unit]; 460 tp = sc->sc_dz[line].dz_tty; 461 462 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p); 463 if (error >= 0) 464 return (error); 465 466 error = ttioctl(tp, cmd, data, flag, p); 467 if (error >= 0) 468 return (error); 469 470 switch (cmd) { 471 472 case TIOCSBRK: 473 (void) dzmctl(sc, line, DML_BRK, DMBIS); 474 break; 475 476 case TIOCCBRK: 477 (void) dzmctl(sc, line, DML_BRK, DMBIC); 478 break; 479 480 case TIOCSDTR: 481 (void) dzmctl(sc, line, DML_DTR, DMBIS); 482 break; 483 484 case TIOCCDTR: 485 (void) dzmctl(sc, line, DML_DTR, DMBIC); 486 break; 487 488 case TIOCMSET: 489 (void) dzmctl(sc, line, *(int *)data, DMSET); 490 break; 491 492 case TIOCMBIS: 493 (void) dzmctl(sc, line, *(int *)data, DMBIS); 494 break; 495 496 case TIOCMBIC: 497 (void) dzmctl(sc, line, *(int *)data, DMBIC); 498 break; 499 500 case TIOCMGET: 501 *(int *)data = (dzmctl(sc, line, 0, DMGET) & ~DML_BRK); 502 break; 503 504 default: 505 return (EPASSTHROUGH); 506 } 507 return (0); 508 } 509 510 struct tty * 511 dztty(dev_t dev) 512 { 513 struct dz_softc *sc = dz_cd.cd_devs[DZ_I2C(minor(dev))]; 514 struct tty *tp = sc->sc_dz[DZ_PORT(minor(dev))].dz_tty; 515 516 return (tp); 517 } 518 519 /*ARGSUSED*/ 520 void 521 dzstop(struct tty *tp, int flag) 522 { 523 if (tp->t_state & TS_BUSY) 524 if (!(tp->t_state & TS_TTSTOP)) 525 tp->t_state |= TS_FLUSH; 526 } 527 528 void 529 dzstart(struct tty *tp) 530 { 531 struct dz_softc *sc; 532 struct clist *cl; 533 int unit, line, s; 534 char state; 535 536 unit = DZ_I2C(minor(tp->t_dev)); 537 line = DZ_PORT(minor(tp->t_dev)); 538 sc = dz_cd.cd_devs[unit]; 539 540 s = spltty(); 541 if (tp->t_state & (TS_TIMEOUT|TS_BUSY|TS_TTSTOP)) { 542 splx(s); 543 return; 544 } 545 cl = &tp->t_outq; 546 if (cl->c_cc <= tp->t_lowat) { 547 if (tp->t_state & TS_ASLEEP) { 548 tp->t_state &= ~TS_ASLEEP; 549 wakeup((caddr_t)cl); 550 } 551 selwakeup(&tp->t_wsel); 552 } 553 if (cl->c_cc == 0) { 554 splx(s); 555 return; 556 } 557 558 tp->t_state |= TS_BUSY; 559 560 state = DZ_READ_WORD(dr_tcrw) & 255; 561 if ((state & (1 << line)) == 0) { 562 DZ_WRITE_BYTE(dr_tcr, state | (1 << line)); 563 DZ_BARRIER(); 564 } 565 dzxint(sc); 566 splx(s); 567 } 568 569 static int 570 dzparam(struct tty *tp, struct termios *t) 571 { 572 struct dz_softc *sc; 573 int cflag = t->c_cflag; 574 int unit, line; 575 int ispeed = ttspeedtab(t->c_ispeed, dzspeedtab); 576 int ospeed = ttspeedtab(t->c_ospeed, dzspeedtab); 577 unsigned lpr; 578 int s; 579 580 unit = DZ_I2C(minor(tp->t_dev)); 581 line = DZ_PORT(minor(tp->t_dev)); 582 sc = dz_cd.cd_devs[unit]; 583 584 /* check requested parameters */ 585 if (ospeed < 0 || ispeed < 0 || ispeed != ospeed) 586 return (EINVAL); 587 588 tp->t_ispeed = t->c_ispeed; 589 tp->t_ospeed = t->c_ospeed; 590 tp->t_cflag = cflag; 591 592 if (ospeed == 0) { 593 (void) dzmctl(sc, line, 0, DMSET); /* hang up line */ 594 return (0); 595 } 596 597 s = spltty(); 598 599 lpr = DZ_LPR_RX_ENABLE | ((ispeed&0xF)<<8) | line; 600 601 switch (cflag & CSIZE) 602 { 603 case CS5: 604 lpr |= DZ_LPR_5_BIT_CHAR; 605 break; 606 case CS6: 607 lpr |= DZ_LPR_6_BIT_CHAR; 608 break; 609 case CS7: 610 lpr |= DZ_LPR_7_BIT_CHAR; 611 break; 612 default: 613 lpr |= DZ_LPR_8_BIT_CHAR; 614 break; 615 } 616 if (cflag & PARENB) 617 lpr |= DZ_LPR_PARENB; 618 if (cflag & PARODD) 619 lpr |= DZ_LPR_OPAR; 620 if (cflag & CSTOPB) 621 lpr |= DZ_LPR_2_STOP; 622 623 DZ_WRITE_WORD(dr_lpr, lpr); 624 DZ_BARRIER(); 625 626 (void) splx(s); 627 return (0); 628 } 629 630 static unsigned 631 dzmctl(struct dz_softc *sc, int line, int bits, int how) 632 { 633 unsigned status; 634 unsigned mbits; 635 unsigned bit; 636 int s; 637 638 s = spltty(); 639 640 mbits = 0; 641 642 bit = (1 << line); 643 644 /* external signals as seen from the port */ 645 646 status = DZ_READ_BYTE(dr_dcd) | sc->sc_dsr; 647 648 if (status & bit) 649 mbits |= DML_DCD; 650 651 status = DZ_READ_BYTE(dr_ring); 652 653 if (status & bit) 654 mbits |= DML_RI; 655 656 /* internal signals/state delivered to port */ 657 658 status = DZ_READ_BYTE(dr_dtr); 659 660 if (status & bit) 661 mbits |= DML_DTR; 662 663 if (sc->sc_brk & bit) 664 mbits |= DML_BRK; 665 666 switch (how) 667 { 668 case DMSET: 669 mbits = bits; 670 break; 671 672 case DMBIS: 673 mbits |= bits; 674 break; 675 676 case DMBIC: 677 mbits &= ~bits; 678 break; 679 680 case DMGET: 681 (void) splx(s); 682 return (mbits); 683 } 684 685 if (mbits & DML_DTR) { 686 DZ_WRITE_BYTE(dr_dtr, DZ_READ_BYTE(dr_dtr) | bit); 687 } else { 688 DZ_WRITE_BYTE(dr_dtr, DZ_READ_BYTE(dr_dtr) & ~bit); 689 } 690 691 if (mbits & DML_BRK) { 692 sc->sc_brk |= bit; 693 DZ_WRITE_BYTE(dr_break, sc->sc_brk); 694 } else { 695 sc->sc_brk &= ~bit; 696 DZ_WRITE_BYTE(dr_break, sc->sc_brk); 697 } 698 699 DZ_BARRIER(); 700 (void) splx(s); 701 return (mbits); 702 } 703 704 /* 705 * This is called by timeout() periodically. 706 * Check to see if modem status bits have changed. 707 */ 708 static void 709 dzscan(void *arg) 710 { 711 struct dz_softc *sc; 712 struct tty *tp; 713 int n, bit, port; 714 unsigned csr; 715 int s; 716 717 s = spltty(); 718 719 for (n = 0; n < dz_cd.cd_ndevs; n++) { 720 721 if (dz_cd.cd_devs[n] == NULL) 722 continue; 723 724 sc = dz_cd.cd_devs[n]; 725 726 for (port = 0; port < sc->sc_type; port++) { 727 728 tp = sc->sc_dz[port].dz_tty; 729 bit = (1 << port); 730 731 if ((DZ_READ_BYTE(dr_dcd) | sc->sc_dsr) & bit) { 732 if (!(tp->t_state & TS_CARR_ON)) 733 (*tp->t_linesw->l_modem) (tp, 1); 734 } else if ((tp->t_state & TS_CARR_ON) && 735 (*tp->t_linesw->l_modem)(tp, 0) == 0) { 736 DZ_WRITE_BYTE(dr_tcr, 737 (DZ_READ_WORD(dr_tcrw) & 255) & ~bit); 738 DZ_BARRIER(); 739 } 740 } 741 742 /* 743 * If the RX interrupt rate is this high, switch 744 * the controller to Silo Alarm - which means don't 745 * interrupt until the RX silo has 16 characters in 746 * it (the silo is 64 characters in all). 747 * Avoid oscillating SA on and off by not turning 748 * if off unless the rate is appropriately low. 749 */ 750 751 csr = DZ_READ_WORD(dr_csr); 752 753 if (sc->sc_rxint > (16*10)) { 754 if ((csr & DZ_CSR_SAE) == 0) 755 DZ_WRITE_WORD(dr_csr, csr | DZ_CSR_SAE); 756 } else if ((csr & DZ_CSR_SAE) != 0) 757 if (sc->sc_rxint < 10) 758 DZ_WRITE_WORD(dr_csr, csr & ~(DZ_CSR_SAE)); 759 760 DZ_BARRIER(); 761 sc->sc_rxint = 0; 762 } 763 (void) splx(s); 764 callout_reset(&dzscan_ch, hz, dzscan, NULL); 765 } 766 767 /* 768 * Called after an ubareset. The DZ card is reset, but the only thing 769 * that must be done is to start the receiver and transmitter again. 770 * No DMA setup to care about. 771 */ 772 void 773 dzreset(struct device *dev) 774 { 775 struct dz_softc *sc = (void *)dev; 776 struct tty *tp; 777 int i; 778 779 for (i = 0; i < sc->sc_type; i++) { 780 tp = sc->sc_dz[i].dz_tty; 781 782 if (((tp->t_state & TS_ISOPEN) == 0) || (tp->t_wopen == 0)) 783 continue; 784 785 dzparam(tp, &tp->t_termios); 786 dzmctl(sc, i, DML_DTR, DMSET); 787 tp->t_state &= ~TS_BUSY; 788 dzstart(tp); /* Kick off transmitter again */ 789 } 790 } 791