1 /* $NetBSD: siisata_cardbus.c,v 1.12 2010/03/18 20:54:56 dyoung Exp $ */ 2 /* Id: siisata_pci.c,v 1.11 2008/05/21 16:20:11 jakllsch Exp */ 3 4 /* 5 * Copyright (c) 2006 Manuel Bouyer. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 * 27 */ 28 29 /* 30 * Copyright (c) 2007, 2008 Jonathan A. Kollasch. 31 * All rights reserved. 32 * 33 * Redistribution and use in source and binary forms, with or without 34 * modification, are permitted provided that the following conditions 35 * are met: 36 * 1. Redistributions of source code must retain the above copyright 37 * notice, this list of conditions and the following disclaimer. 38 * 2. Redistributions in binary form must reproduce the above copyright 39 * notice, this list of conditions and the following disclaimer in the 40 * documentation and/or other materials provided with the distribution. 41 * 42 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 43 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 44 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 45 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 46 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 47 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 48 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 49 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 50 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 51 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 52 */ 53 54 #include <sys/cdefs.h> 55 __KERNEL_RCSID(0, "$NetBSD: siisata_cardbus.c,v 1.12 2010/03/18 20:54:56 dyoung Exp $"); 56 57 #include <sys/types.h> 58 #include <sys/malloc.h> 59 #include <sys/param.h> 60 #include <sys/kernel.h> 61 #include <sys/systm.h> 62 63 #include <uvm/uvm_extern.h> 64 65 #include <dev/cardbus/cardbusvar.h> 66 #include <dev/pci/pcidevs.h> 67 #include <dev/ic/siisatavar.h> 68 69 struct siisata_cardbus_softc { 70 struct siisata_softc si_sc; 71 cardbus_chipset_tag_t sc_cc; 72 cardbus_function_tag_t sc_cf; 73 cardbus_devfunc_t sc_ct; 74 pcitag_t sc_tag; 75 bus_space_tag_t sc_iot; /* CardBus I/O space tag */ 76 bus_space_tag_t sc_memt; /* CardBus MEM space tag */ 77 rbus_tag_t sc_rbus_iot; /* CardBus i/o rbus tag */ 78 rbus_tag_t sc_rbus_memt; /* CardBus mem rbus tag */ 79 80 bus_size_t sc_grsize; 81 bus_size_t sc_prsize; 82 void *sc_ih; 83 }; 84 85 static int siisata_cardbus_match(device_t, cfdata_t, void *); 86 static void siisata_cardbus_attach(device_t, device_t, void *); 87 static int siisata_cardbus_detach(device_t, int); 88 static bool siisata_cardbus_resume(device_t, const pmf_qual_t *); 89 90 static const struct siisata_cardbus_product { 91 pci_vendor_id_t scp_vendor; 92 pci_product_id_t scp_product; 93 int scp_ports; 94 int scp_chip; 95 96 } siisata_cardbus_products[] = { 97 { 98 PCI_VENDOR_CMDTECH, PCI_PRODUCT_CMDTECH_3124, 99 4, 3124 100 }, 101 { 102 0, 0, 103 0, 0 104 }, 105 }; 106 107 CFATTACH_DECL_NEW(siisata_cardbus, sizeof(struct siisata_cardbus_softc), 108 siisata_cardbus_match, siisata_cardbus_attach, siisata_cardbus_detach, 109 NULL); 110 111 static const struct siisata_cardbus_product * 112 siisata_cardbus_lookup(const struct cardbus_attach_args *ca) 113 { 114 const struct siisata_cardbus_product *scp; 115 116 for (scp = siisata_cardbus_products; scp->scp_ports > 0; scp++) { 117 if (PCI_VENDOR(ca->ca_id) == scp->scp_vendor && 118 PCI_PRODUCT(ca->ca_id) == scp->scp_product) 119 return scp; 120 } 121 return NULL; 122 } 123 124 static int 125 siisata_cardbus_match(device_t parent, cfdata_t match, void *aux) 126 { 127 struct cardbus_attach_args *ca = aux; 128 129 if (siisata_cardbus_lookup(ca) != NULL) 130 return 3; 131 132 return 0; 133 } 134 135 static void 136 siisata_cardbus_attach(device_t parent, device_t self, void *aux) 137 { 138 struct cardbus_attach_args *ca = aux; 139 struct siisata_cardbus_softc *csc = device_private(self); 140 struct siisata_softc *sc = &csc->si_sc; 141 cardbus_devfunc_t ct = ca->ca_ct; 142 cardbus_chipset_tag_t cc = ct->ct_cc; 143 cardbus_function_tag_t cf = ct->ct_cf; 144 pcireg_t csr; 145 const struct siisata_cardbus_product *scp; 146 bus_space_tag_t memt; 147 bus_space_handle_t memh; 148 bus_addr_t base; 149 bus_size_t grsize, prsize; 150 uint32_t gcreg; 151 char devinfo[256]; 152 153 sc->sc_atac.atac_dev = self; 154 155 csc->sc_cc = cc; 156 csc->sc_cf = cf; 157 csc->sc_ct = ct; 158 csc->sc_tag = ca->ca_tag; 159 160 csc->sc_iot = ca->ca_iot; 161 csc->sc_memt = ca->ca_memt; 162 csc->sc_rbus_iot = ca->ca_rbus_iot; 163 csc->sc_rbus_memt = ca->ca_rbus_memt; 164 165 pci_devinfo(ca->ca_id, ca->ca_class, 0, devinfo, sizeof(devinfo)); 166 aprint_naive(": SATA-II HBA\n"); 167 aprint_normal(": %s\n", devinfo); 168 169 /* 170 * XXXX 171 * Our BAR0/BAR1 type is 64bit Memory. Cardbus_mapreg_map() don't 172 * support 64bit Memory. We map ourself... 173 */ 174 /* map bar0 */ 175 { 176 #define SIISATA_BAR0_SIZE 128 177 grsize = SIISATA_BAR0_SIZE; 178 csr = 179 Cardbus_conf_read(ct, ca->ca_tag, SIISATA_CARDBUS_BAR0); 180 base = PCI_MAPREG_MEM_ADDR(csr); 181 memt = csc->sc_memt; 182 if ((*cf->cardbus_space_alloc)(cc, csc->sc_rbus_memt, base, 183 grsize, grsize - 1, grsize, 0, &base, &memh)) { 184 aprint_error( 185 "%s: unable to map device global registers\n", 186 SIISATANAME(sc)); 187 return; 188 } 189 Cardbus_conf_write(ct, ca->ca_tag, SIISATA_CARDBUS_BAR0, 190 base); 191 } 192 sc->sc_grt = memt; 193 sc->sc_grh = memh; 194 csc->sc_grsize = grsize; 195 196 /* map bar1 */ 197 { 198 #define SIISATA_BAR1_SIZE (32 * 1024) 199 prsize = SIISATA_BAR1_SIZE; 200 base = PCI_MAPREG_MEM_ADDR(Cardbus_conf_read(ct, ca->ca_tag, 201 SIISATA_CARDBUS_BAR1)); 202 memt = csc->sc_memt; 203 if ((*cf->cardbus_space_alloc)(cc, csc->sc_rbus_memt, base, 204 prsize, prsize - 1, prsize, 0, &base, &memh)) { 205 Cardbus_conf_write(ct, ca->ca_tag, 206 SIISATA_CARDBUS_BAR0, 0); 207 (*cf->cardbus_space_free)(cc, csc->sc_rbus_memt, 208 sc->sc_grh, grsize); 209 aprint_error( 210 "%s: unable to map device port registers\n", 211 SIISATANAME(sc)); 212 return; 213 } 214 Cardbus_conf_write(ct, ca->ca_tag, SIISATA_CARDBUS_BAR1, 215 base); 216 } 217 sc->sc_prt = memt; 218 sc->sc_prh = memh; 219 csc->sc_prsize = prsize; 220 221 sc->sc_dmat = ca->ca_dmat; 222 223 /* map interrupt */ 224 csc->sc_ih = Cardbus_intr_establish(ct, ca->ca_intrline, IPL_BIO, 225 siisata_intr, sc); 226 if (csc->sc_ih == NULL) { 227 Cardbus_conf_write(ct, ca->ca_tag, SIISATA_CARDBUS_BAR0, 0); 228 (*cf->cardbus_space_free)(cc, csc->sc_rbus_memt, sc->sc_grh, 229 grsize); 230 Cardbus_conf_write(ct, ca->ca_tag, SIISATA_CARDBUS_BAR1, 0); 231 (*cf->cardbus_space_free)(cc, csc->sc_rbus_memt, sc->sc_prh, 232 prsize); 233 aprint_error("%s: couldn't establish interrupt\n", 234 SIISATANAME(sc)); 235 return; 236 } 237 238 /* fill in number of ports on this device */ 239 scp = siisata_cardbus_lookup(ca); 240 if (scp != NULL) 241 sc->sc_atac.atac_nchannels = scp->scp_ports; 242 else 243 /* _match() should prevent us from getting here */ 244 panic("siisata: the universe might be falling apart!\n"); 245 246 /* enable bus mastering in case the firmware didn't */ 247 csr = Cardbus_conf_read(ct, ca->ca_tag, PCI_COMMAND_STATUS_REG); 248 csr |= PCI_COMMAND_MASTER_ENABLE; 249 csr |= PCI_COMMAND_MEM_ENABLE; 250 Cardbus_conf_write(ct, ca->ca_tag, PCI_COMMAND_STATUS_REG, csr); 251 252 gcreg = GRREAD(sc, GR_GC); 253 254 /* CardBus supports only 32-bit 33MHz */ 255 KASSERT(!(gcreg & 256 (GR_GC_REQ64|GR_GC_DEVSEL|GR_GC_STOP|GR_GC_TRDY|GR_GC_M66EN))); 257 258 aprint_normal("%s: SiI%d on 32-bit, 33MHz PCI (CardBus).", 259 SIISATANAME(sc), scp->scp_chip); 260 if (gcreg & GR_GC_3GBPS) 261 aprint_normal(" 3.0Gb/s capable.\n"); 262 else 263 aprint_normal("\n"); 264 265 siisata_attach(sc); 266 267 if (!pmf_device_register(self, NULL, siisata_cardbus_resume)) 268 aprint_error_dev(self, "couldn't establish power handler\n"); 269 } 270 271 static int 272 siisata_cardbus_detach(device_t self, int flags) 273 { 274 struct siisata_cardbus_softc *csc = device_private(self); 275 struct siisata_softc *sc = &csc->si_sc; 276 struct cardbus_devfunc *ct = csc->sc_ct; 277 cardbus_chipset_tag_t cc = ct->ct_cc; 278 cardbus_function_tag_t cf = ct->ct_cf; 279 pcitag_t ctag = csc->sc_tag; 280 int rv; 281 282 rv = siisata_detach(sc, flags); 283 if (rv) 284 return (rv); 285 if (csc->sc_ih != NULL) { 286 Cardbus_intr_disestablish(ct, csc->sc_ih); 287 csc->sc_ih = NULL; 288 } 289 if (csc->sc_grsize) { 290 Cardbus_conf_write(ct, ctag, SIISATA_CARDBUS_BAR0, 0); 291 (*cf->cardbus_space_free)(cc, csc->sc_rbus_memt, sc->sc_grh, 292 csc->sc_grsize); 293 csc->sc_grsize = 0; 294 } 295 if (csc->sc_prsize) { 296 Cardbus_conf_write(ct, ctag, SIISATA_CARDBUS_BAR1, 0); 297 (*cf->cardbus_space_free)(cc, csc->sc_rbus_memt, sc->sc_prh, 298 csc->sc_prsize); 299 csc->sc_prsize = 0; 300 } 301 return 0; 302 } 303 304 static bool 305 siisata_cardbus_resume(device_t dv, const pmf_qual_t *qual) 306 { 307 struct siisata_cardbus_softc *csc = device_private(dv); 308 struct siisata_softc *sc = &csc->si_sc; 309 int s; 310 311 s = splbio(); 312 siisata_resume(sc); 313 splx(s); 314 315 return true; 316 } 317