xref: /netbsd-src/sys/dev/cardbus/if_ex_cardbus.c (revision c2f76ff004a2cb67efe5b12d97bd3ef7fe89e18d)
1 /*	$NetBSD: if_ex_cardbus.c,v 1.54 2010/03/22 23:03:30 dyoung Exp $	*/
2 
3 /*
4  * Copyright (c) 1998 and 1999
5  *       HAYAKAWA Koichi.  All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY HAYAKAWA KOICHI ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL TAKESHI OHASHI OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 /*
30  * CardBus specific routines for 3Com 3C575-family CardBus ethernet adapter
31  */
32 
33 #include <sys/cdefs.h>
34 __KERNEL_RCSID(0, "$NetBSD: if_ex_cardbus.c,v 1.54 2010/03/22 23:03:30 dyoung Exp $");
35 
36 /* #define EX_DEBUG 4 */	/* define to report information for debugging */
37 
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/mbuf.h>
41 #include <sys/socket.h>
42 #include <sys/ioctl.h>
43 #include <sys/errno.h>
44 #include <sys/syslog.h>
45 #include <sys/select.h>
46 #include <sys/device.h>
47 
48 #include <net/if.h>
49 #include <net/if_dl.h>
50 #include <net/if_ether.h>
51 #include <net/if_media.h>
52 
53 #include <sys/cpu.h>
54 #include <sys/bus.h>
55 
56 #include <dev/cardbus/cardbusvar.h>
57 #include <dev/pci/pcidevs.h>
58 
59 #include <dev/mii/miivar.h>
60 
61 #include <dev/ic/elink3var.h>
62 #include <dev/ic/elink3reg.h>
63 #include <dev/ic/elinkxlreg.h>
64 #include <dev/ic/elinkxlvar.h>
65 
66 #if defined DEBUG && !defined EX_DEBUG
67 #define EX_DEBUG
68 #endif
69 
70 #if defined EX_DEBUG
71 #define DPRINTF(a) printf a
72 #else
73 #define DPRINTF(a)
74 #endif
75 
76 #define CARDBUS_3C575BTX_FUNCSTAT_PCIREG  PCI_BAR2  /* means 0x18 */
77 #define EX_CB_INTR 4		/* intr acknowledge reg. CardBus only */
78 #define EX_CB_INTR_ACK 0x8000 /* intr acknowledge bit */
79 
80 int ex_cardbus_match(device_t, cfdata_t, void *);
81 void ex_cardbus_attach(device_t, device_t, void *);
82 int ex_cardbus_detach(device_t, int);
83 void ex_cardbus_intr_ack(struct ex_softc *);
84 
85 int ex_cardbus_enable(struct ex_softc *);
86 void ex_cardbus_disable(struct ex_softc *);
87 
88 struct ex_cardbus_softc {
89 	struct ex_softc sc_softc;
90 
91 	cardbus_devfunc_t sc_ct;
92 	cardbus_intr_line_t sc_intrline;
93 	uint8_t sc_cardbus_flags;
94 #define EX_REATTACH		0x01
95 #define EX_ABSENT		0x02
96 	uint8_t sc_cardtype;
97 #define EX_CB_BOOMERANG		1
98 #define EX_CB_CYCLONE		2
99 
100 	/* CardBus function status space.  575B requests it. */
101 	bus_space_tag_t sc_funct;
102 	bus_space_handle_t sc_funch;
103 	bus_size_t sc_funcsize;
104 
105 	bus_size_t sc_mapsize;		/* the size of mapped bus space region */
106 
107 	pcitag_t sc_tag;
108 
109 	pcireg_t	sc_csr;
110 	int	sc_bar_reg;		/* which BAR to use */
111 	pcireg_t sc_bar_val;		/* value of the BAR */
112 	int	sc_bar_reg1;		/* which BAR to use */
113 	pcireg_t sc_bar_val1;		/* value of the BAR */
114 
115 };
116 
117 CFATTACH_DECL3_NEW(ex_cardbus, sizeof(struct ex_cardbus_softc),
118     ex_cardbus_match, ex_cardbus_attach, ex_cardbus_detach, ex_activate,
119     NULL, NULL, DVF_DETACH_SHUTDOWN);
120 
121 const struct ex_cardbus_product {
122 	uint32_t	ecp_prodid;	/* CardBus product ID */
123 	int		ecp_flags;	/* initial softc flags */
124 	pcireg_t	ecp_csr;	/* PCI CSR flags */
125 	int		ecp_cardtype;	/* card type */
126 	const char	*ecp_name;	/* device name */
127 } ex_cardbus_products[] = {
128 	{ PCI_PRODUCT_3COM_3C575TX,
129 	  EX_CONF_MII | EX_CONF_EEPROM_OFF | EX_CONF_EEPROM_8BIT,
130 	  PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MASTER_ENABLE,
131 	  EX_CB_BOOMERANG,
132 	  "3c575-TX Ethernet" },
133 
134 	{ PCI_PRODUCT_3COM_3C575BTX,
135 	  EX_CONF_90XB|EX_CONF_MII|EX_CONF_INV_LED_POLARITY |
136 	    EX_CONF_EEPROM_OFF | EX_CONF_EEPROM_8BIT,
137 	  PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
138 	      PCI_COMMAND_MASTER_ENABLE,
139 	  EX_CB_CYCLONE,
140 	  "3c575B-TX Ethernet" },
141 
142 	{ PCI_PRODUCT_3COM_3C575CTX,
143 	  EX_CONF_90XB | EX_CONF_PHY_POWER | EX_CONF_EEPROM_OFF |
144 	    EX_CONF_EEPROM_8BIT,
145 	  PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
146 	      PCI_COMMAND_MASTER_ENABLE,
147 	  EX_CB_CYCLONE,
148 	  "3c575CT Ethernet" },
149 
150 	{ PCI_PRODUCT_3COM_3C656_E,
151 	  EX_CONF_90XB | EX_CONF_PHY_POWER | EX_CONF_EEPROM_OFF |
152 	    EX_CONF_EEPROM_8BIT | EX_CONF_INV_LED_POLARITY,
153 	  PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
154 	      PCI_COMMAND_MASTER_ENABLE,
155 	  EX_CB_CYCLONE,
156 	  "3c656-TX Ethernet" },
157 
158 	{ PCI_PRODUCT_3COM_3C656B_E,
159 	  EX_CONF_90XB | EX_CONF_PHY_POWER | EX_CONF_EEPROM_OFF |
160 	    EX_CONF_EEPROM_8BIT | EX_CONF_INV_LED_POLARITY,
161 	  PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
162 	      PCI_COMMAND_MASTER_ENABLE,
163 	  EX_CB_CYCLONE,
164 	  "3c656B-TX Ethernet" },
165 
166 	{ PCI_PRODUCT_3COM_3C656C_E,
167 	  EX_CONF_90XB | EX_CONF_PHY_POWER | EX_CONF_EEPROM_OFF |
168 	    EX_CONF_EEPROM_8BIT,
169 	  PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
170 	      PCI_COMMAND_MASTER_ENABLE,
171 	  EX_CB_CYCLONE,
172 	  "3c656C-TX Ethernet" },
173 
174 	{ 0,
175 	  0,
176 	  0,
177 	  0,
178 	  NULL },
179 };
180 
181 
182 void ex_cardbus_setup(struct ex_cardbus_softc *);
183 
184 const struct ex_cardbus_product *ex_cardbus_lookup
185    (const struct cardbus_attach_args *);
186 
187 const struct ex_cardbus_product *
188 ex_cardbus_lookup(const struct cardbus_attach_args *ca)
189 {
190 	const struct ex_cardbus_product *ecp;
191 
192 	if (PCI_VENDOR(ca->ca_id) != PCI_VENDOR_3COM)
193 		return (NULL);
194 
195 	for (ecp = ex_cardbus_products; ecp->ecp_name != NULL; ecp++)
196 		if (PCI_PRODUCT(ca->ca_id) == ecp->ecp_prodid)
197 			return (ecp);
198 	return (NULL);
199 }
200 
201 int
202 ex_cardbus_match(device_t parent, cfdata_t cf, void *aux)
203 {
204 	struct cardbus_attach_args *ca = aux;
205 
206 	if (ex_cardbus_lookup(ca) != NULL)
207 		return (1);
208 
209 	return (0);
210 }
211 
212 void
213 ex_cardbus_attach(device_t parent, device_t self, void *aux)
214 {
215 	struct ex_cardbus_softc *csc = device_private(self);
216 	struct ex_softc *sc = &csc->sc_softc;
217 	struct cardbus_attach_args *ca = aux;
218 	cardbus_devfunc_t ct = ca->ca_ct;
219 	const struct ex_cardbus_product *ecp;
220 	bus_addr_t adr, adr1;
221 
222 	sc->sc_dev = self;
223 
224 	sc->sc_dmat = ca->ca_dmat;
225 	csc->sc_ct = ca->ca_ct;
226 	csc->sc_intrline = ca->ca_intrline;
227 	csc->sc_tag = ca->ca_tag;
228 
229 	ecp = ex_cardbus_lookup(ca);
230 	if (ecp == NULL) {
231 		printf("\n");
232 		panic("ex_cardbus_attach: impossible");
233 	}
234 
235 	aprint_normal(": 3Com %s\n", ecp->ecp_name);
236 
237 	sc->ex_conf = ecp->ecp_flags;
238 	csc->sc_cardtype = ecp->ecp_cardtype;
239 	csc->sc_csr = ecp->ecp_csr;
240 
241 	if (Cardbus_mapreg_map(ct, PCI_BAR0, PCI_MAPREG_TYPE_IO, 0,
242 		&sc->sc_iot, &sc->sc_ioh, &adr, &csc->sc_mapsize) == 0) {
243 		csc->sc_bar_reg = PCI_BAR0;
244 		csc->sc_bar_val = adr | PCI_MAPREG_TYPE_IO;
245 
246 		if (csc->sc_cardtype == EX_CB_CYCLONE) {
247 			/* Map CardBus function status window. */
248 			if (Cardbus_mapreg_map(ct,
249 				CARDBUS_3C575BTX_FUNCSTAT_PCIREG,
250 		    		PCI_MAPREG_TYPE_MEM, 0,
251 				 &csc->sc_funct, &csc->sc_funch,
252 				 &adr1, &csc->sc_funcsize) == 0) {
253 
254 				csc->sc_bar_reg1 =
255 					CARDBUS_3C575BTX_FUNCSTAT_PCIREG;
256 				csc->sc_bar_val1 =
257 					adr1 | PCI_MAPREG_TYPE_MEM;
258 
259 			} else {
260 				aprint_error_dev(self, "unable to map function "
261 					"status window\n");
262 				return;
263 			}
264 
265 			/* Setup interrupt acknowledge hook */
266 			sc->intr_ack = ex_cardbus_intr_ack;
267 		}
268 	}
269 	else {
270 		aprint_naive(": can't map i/o space\n");
271 		return;
272 	}
273 
274 	/* Power management hooks. */
275 	sc->enable = ex_cardbus_enable;
276 	sc->disable = ex_cardbus_disable;
277 
278 	/*
279 	 *  Handle power management nonsense and
280 	 * initialize the configuration registers.
281 	 */
282 	ex_cardbus_setup(csc);
283 
284 	ex_config(sc);
285 
286 	if (csc->sc_cardtype == EX_CB_CYCLONE)
287 		bus_space_write_4(csc->sc_funct, csc->sc_funch,
288 		    EX_CB_INTR, EX_CB_INTR_ACK);
289 
290 	Cardbus_function_disable(csc->sc_ct);
291 }
292 
293 void
294 ex_cardbus_intr_ack(struct ex_softc *sc)
295 {
296 	struct ex_cardbus_softc *csc = (struct ex_cardbus_softc *)sc;
297 
298 	bus_space_write_4(csc->sc_funct, csc->sc_funch, EX_CB_INTR,
299 	    EX_CB_INTR_ACK);
300 }
301 
302 int
303 ex_cardbus_detach(device_t self, int flags)
304 {
305 	struct ex_cardbus_softc *csc = device_private(self);
306 	struct ex_softc *sc = &csc->sc_softc;
307 	struct cardbus_devfunc *ct = csc->sc_ct;
308 	int rv;
309 
310 #if defined(DIAGNOSTIC)
311 	if (ct == NULL) {
312 		panic("%s: data structure lacks", device_xname(self));
313 	}
314 #endif
315 
316 	if ((rv = ex_detach(sc)) != 0)
317 		return rv;
318 
319 	/*
320 	 * Unhook the interrupt handler.
321 	 */
322 	Cardbus_intr_disestablish(ct, sc->sc_ih);
323 
324 	if (csc->sc_cardtype == EX_CB_CYCLONE) {
325 		Cardbus_mapreg_unmap(ct,
326 		    CARDBUS_3C575BTX_FUNCSTAT_PCIREG,
327 		    csc->sc_funct, csc->sc_funch, csc->sc_funcsize);
328 	}
329 
330 	Cardbus_mapreg_unmap(ct, PCI_BAR0, sc->sc_iot,
331 	    sc->sc_ioh, csc->sc_mapsize);
332 	return 0;
333 }
334 
335 int
336 ex_cardbus_enable(struct ex_softc *sc)
337 {
338 	struct ex_cardbus_softc *csc = (struct ex_cardbus_softc *)sc;
339 
340 	Cardbus_function_enable(csc->sc_ct);
341 	ex_cardbus_setup(csc);
342 
343 	sc->sc_ih = Cardbus_intr_establish(csc->sc_ct, csc->sc_intrline,
344 	    IPL_NET, ex_intr, sc);
345 	if (NULL == sc->sc_ih) {
346 		aprint_error_dev(sc->sc_dev, "couldn't establish interrupt\n");
347 		return (1);
348 	}
349 
350 	return (0);
351 }
352 
353 void
354 ex_cardbus_disable(struct ex_softc *sc)
355 {
356 	struct ex_cardbus_softc *csc = (struct ex_cardbus_softc *)sc;
357 
358 	if (sc->sc_ih != NULL) {
359 		Cardbus_intr_disestablish(csc->sc_ct, sc->sc_ih);
360 		sc->sc_ih = NULL;
361 	}
362 
363  	Cardbus_function_disable(csc->sc_ct);
364 
365 }
366 
367 void
368 ex_cardbus_setup(struct ex_cardbus_softc *csc)
369 {
370 	cardbus_devfunc_t ct = csc->sc_ct;
371 	pcireg_t reg;
372 
373 	(void)cardbus_set_powerstate(ct, csc->sc_tag, PCI_PWR_D0);
374 
375 	/* Program the BAR */
376 	Cardbus_conf_write(ct, csc->sc_tag, csc->sc_bar_reg, csc->sc_bar_val);
377 	/* Make sure the right access type is on the CardBus bridge. */
378 	if (csc->sc_cardtype == EX_CB_CYCLONE) {
379 		/* Program the BAR */
380 		Cardbus_conf_write(ct, csc->sc_tag,
381 			csc->sc_bar_reg1, csc->sc_bar_val1);
382 		/*
383 		 * Make sure CardBus brigde can access memory space.  Usually
384 		 * memory access is enabled by BIOS, but some BIOSes do not
385 		 * enable it.
386 		 */
387 	}
388 
389 	/* Enable the appropriate bits in the CARDBUS CSR. */
390 	reg = Cardbus_conf_read(ct, csc->sc_tag, PCI_COMMAND_STATUS_REG);
391 	reg |= csc->sc_csr;
392 	Cardbus_conf_write(ct, csc->sc_tag, PCI_COMMAND_STATUS_REG, reg);
393 
394  	/*
395 	 * set latency timer
396 	 */
397 	reg = Cardbus_conf_read(ct, csc->sc_tag, PCI_BHLC_REG);
398 	if (PCI_LATTIMER(reg) < 0x20) {
399 		/* at least the value of latency timer should 0x20. */
400 		DPRINTF(("if_ex_cardbus: lattimer 0x%x -> 0x20\n",
401 		    PCI_LATTIMER(reg)));
402 		reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
403 		reg |= (0x20 << PCI_LATTIMER_SHIFT);
404 		Cardbus_conf_write(ct, csc->sc_tag, PCI_BHLC_REG, reg);
405 	}
406 }
407