1 /* $NetBSD: ata.c,v 1.74 2006/03/29 04:16:48 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: ata.c,v 1.74 2006/03/29 04:16:48 thorpej Exp $"); 34 35 #ifndef ATADEBUG 36 #define ATADEBUG 37 #endif /* ATADEBUG */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/kernel.h> 42 #include <sys/malloc.h> 43 #include <sys/device.h> 44 #include <sys/conf.h> 45 #include <sys/fcntl.h> 46 #include <sys/proc.h> 47 #include <sys/pool.h> 48 #include <sys/kthread.h> 49 #include <sys/errno.h> 50 #include <sys/ataio.h> 51 52 #include <machine/intr.h> 53 #include <machine/bus.h> 54 55 #include <dev/ata/atareg.h> 56 #include <dev/ata/atavar.h> 57 58 #include "locators.h" 59 60 #include "atapibus.h" 61 #include "ataraid.h" 62 63 #if NATARAID > 0 64 #include <dev/ata/ata_raidvar.h> 65 #endif 66 67 #define DEBUG_FUNCS 0x08 68 #define DEBUG_PROBE 0x10 69 #define DEBUG_DETACH 0x20 70 #define DEBUG_XFERS 0x40 71 #ifdef ATADEBUG 72 int atadebug_mask = 0; 73 #define ATADEBUG_PRINT(args, level) \ 74 if (atadebug_mask & (level)) \ 75 printf args 76 #else 77 #define ATADEBUG_PRINT(args, level) 78 #endif 79 80 POOL_INIT(ata_xfer_pool, sizeof(struct ata_xfer), 0, 0, 0, "ataspl", NULL); 81 82 /* 83 * A queue of atabus instances, used to ensure the same bus probe order 84 * for a given hardware configuration at each boot. 85 */ 86 struct atabus_initq_head atabus_initq_head = 87 TAILQ_HEAD_INITIALIZER(atabus_initq_head); 88 struct simplelock atabus_interlock = SIMPLELOCK_INITIALIZER; 89 90 /***************************************************************************** 91 * ATA bus layer. 92 * 93 * ATA controllers attach an atabus instance, which handles probing the bus 94 * for drives, etc. 95 *****************************************************************************/ 96 97 dev_type_open(atabusopen); 98 dev_type_close(atabusclose); 99 dev_type_ioctl(atabusioctl); 100 101 const struct cdevsw atabus_cdevsw = { 102 atabusopen, atabusclose, noread, nowrite, atabusioctl, 103 nostop, notty, nopoll, nommap, nokqfilter, 104 }; 105 106 extern struct cfdriver atabus_cd; 107 108 static void atabus_powerhook(int, void *); 109 110 /* 111 * atabusprint: 112 * 113 * Autoconfiguration print routine used by ATA controllers when 114 * attaching an atabus instance. 115 */ 116 int 117 atabusprint(void *aux, const char *pnp) 118 { 119 struct ata_channel *chan = aux; 120 121 if (pnp) 122 aprint_normal("atabus at %s", pnp); 123 aprint_normal(" channel %d", chan->ch_channel); 124 125 return (UNCONF); 126 } 127 128 /* 129 * ataprint: 130 * 131 * Autoconfiguration print routine. 132 */ 133 int 134 ataprint(void *aux, const char *pnp) 135 { 136 struct ata_device *adev = aux; 137 138 if (pnp) 139 aprint_normal("wd at %s", pnp); 140 aprint_normal(" drive %d", adev->adev_drv_data->drive); 141 142 return (UNCONF); 143 } 144 145 /* 146 * ata_channel_attach: 147 * 148 * Common parts of attaching an atabus to an ATA controller channel. 149 */ 150 void 151 ata_channel_attach(struct ata_channel *chp) 152 { 153 154 if (chp->ch_flags & ATACH_DISABLED) 155 return; 156 157 callout_init(&chp->ch_callout); 158 159 TAILQ_INIT(&chp->ch_queue->queue_xfer); 160 chp->ch_queue->queue_freeze = 0; 161 chp->ch_queue->queue_flags = 0; 162 chp->ch_queue->active_xfer = NULL; 163 164 chp->atabus = config_found_ia(&chp->ch_atac->atac_dev, "ata", chp, 165 atabusprint); 166 } 167 168 static void 169 atabusconfig(struct atabus_softc *atabus_sc) 170 { 171 struct ata_channel *chp = atabus_sc->sc_chan; 172 struct atac_softc *atac = chp->ch_atac; 173 int i, s; 174 struct atabus_initq *atabus_initq = NULL; 175 176 /* Probe for the drives. */ 177 (*atac->atac_probe)(chp); 178 179 ATADEBUG_PRINT(("atabusattach: ch_drive_flags 0x%x 0x%x\n", 180 chp->ch_drive[0].drive_flags, chp->ch_drive[1].drive_flags), 181 DEBUG_PROBE); 182 183 /* If no drives, abort here */ 184 for (i = 0; i < chp->ch_ndrive; i++) 185 if ((chp->ch_drive[i].drive_flags & DRIVE) != 0) 186 break; 187 if (i == chp->ch_ndrive) 188 goto out; 189 190 /* Shortcut in case we've been shutdown */ 191 if (chp->ch_flags & ATACH_SHUTDOWN) 192 goto out; 193 194 /* Make sure the devices probe in atabus order to avoid jitter. */ 195 simple_lock(&atabus_interlock); 196 while(1) { 197 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 198 if (atabus_initq->atabus_sc == atabus_sc) 199 break; 200 ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0, 201 &atabus_interlock); 202 } 203 simple_unlock(&atabus_interlock); 204 205 /* 206 * Attach an ATAPI bus, if needed. 207 */ 208 for (i = 0; i < chp->ch_ndrive; i++) { 209 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) { 210 #if NATAPIBUS > 0 211 (*atac->atac_atapibus_attach)(atabus_sc); 212 #else 213 /* 214 * Fake the autoconfig "not configured" message 215 */ 216 aprint_normal("atapibus at %s not configured\n", 217 atac->atac_dev.dv_xname); 218 chp->atapibus = NULL; 219 s = splbio(); 220 for (i = 0; i < chp->ch_ndrive; i++) 221 chp->ch_drive[i].drive_flags &= ~DRIVE_ATAPI; 222 splx(s); 223 #endif 224 break; 225 } 226 } 227 228 for (i = 0; i < chp->ch_ndrive; i++) { 229 struct ata_device adev; 230 if ((chp->ch_drive[i].drive_flags & 231 (DRIVE_ATA | DRIVE_OLD)) == 0) { 232 continue; 233 } 234 memset(&adev, 0, sizeof(struct ata_device)); 235 adev.adev_bustype = atac->atac_bustype_ata; 236 adev.adev_channel = chp->ch_channel; 237 adev.adev_openings = 1; 238 adev.adev_drv_data = &chp->ch_drive[i]; 239 chp->ata_drives[i] = config_found_ia(&atabus_sc->sc_dev, 240 "ata_hl", &adev, ataprint); 241 if (chp->ata_drives[i] != NULL) 242 ata_probe_caps(&chp->ch_drive[i]); 243 else { 244 s = splbio(); 245 chp->ch_drive[i].drive_flags &= 246 ~(DRIVE_ATA | DRIVE_OLD); 247 splx(s); 248 } 249 } 250 251 /* now that we know the drives, the controller can set its modes */ 252 if (atac->atac_set_modes) { 253 (*atac->atac_set_modes)(chp); 254 ata_print_modes(chp); 255 } 256 #if NATARAID > 0 257 if (atac->atac_cap & ATAC_CAP_RAID) 258 for (i = 0; i < chp->ch_ndrive; i++) 259 if (chp->ata_drives[i] != NULL) 260 ata_raid_check_component(chp->ata_drives[i]); 261 #endif /* NATARAID > 0 */ 262 263 /* 264 * reset drive_flags for unattached devices, reset state for attached 265 * ones 266 */ 267 s = splbio(); 268 for (i = 0; i < chp->ch_ndrive; i++) { 269 if (chp->ch_drive[i].drv_softc == NULL) 270 chp->ch_drive[i].drive_flags = 0; 271 else 272 chp->ch_drive[i].state = 0; 273 } 274 splx(s); 275 276 out: 277 if (atabus_initq == NULL) { 278 simple_lock(&atabus_interlock); 279 while(1) { 280 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 281 if (atabus_initq->atabus_sc == atabus_sc) 282 break; 283 ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0, 284 &atabus_interlock); 285 } 286 simple_unlock(&atabus_interlock); 287 } 288 simple_lock(&atabus_interlock); 289 TAILQ_REMOVE(&atabus_initq_head, atabus_initq, atabus_initq); 290 simple_unlock(&atabus_interlock); 291 292 free(atabus_initq, M_DEVBUF); 293 wakeup(&atabus_initq_head); 294 295 ata_delref(chp); 296 297 config_pending_decr(); 298 } 299 300 /* 301 * atabus_thread: 302 * 303 * Worker thread for the ATA bus. 304 */ 305 static void 306 atabus_thread(void *arg) 307 { 308 struct atabus_softc *sc = arg; 309 struct ata_channel *chp = sc->sc_chan; 310 struct ata_xfer *xfer; 311 int i, s; 312 313 s = splbio(); 314 chp->ch_flags |= ATACH_TH_RUN; 315 316 /* 317 * Probe the drives. Reset all flags to 0 to indicate to controllers 318 * that can re-probe that all drives must be probed.. 319 * 320 * Note: ch_ndrive may be changed during the probe. 321 */ 322 for (i = 0; i < ATA_MAXDRIVES; i++) 323 chp->ch_drive[i].drive_flags = 0; 324 splx(s); 325 326 /* Configure the devices on the bus. */ 327 atabusconfig(sc); 328 329 s = splbio(); 330 for (;;) { 331 if ((chp->ch_flags & (ATACH_TH_RESET | ATACH_SHUTDOWN)) == 0 && 332 (chp->ch_queue->active_xfer == NULL || 333 chp->ch_queue->queue_freeze == 0)) { 334 chp->ch_flags &= ~ATACH_TH_RUN; 335 (void) tsleep(&chp->ch_thread, PRIBIO, "atath", 0); 336 chp->ch_flags |= ATACH_TH_RUN; 337 } 338 if (chp->ch_flags & ATACH_SHUTDOWN) { 339 break; 340 } 341 if (chp->ch_flags & ATACH_TH_RESET) { 342 /* 343 * ata_reset_channel() will freeze 2 times, so 344 * unfreeze one time. Not a problem as we're at splbio 345 */ 346 chp->ch_queue->queue_freeze--; 347 ata_reset_channel(chp, AT_WAIT | chp->ch_reset_flags); 348 } else if (chp->ch_queue->active_xfer != NULL && 349 chp->ch_queue->queue_freeze == 1) { 350 /* 351 * Caller has bumped queue_freeze, decrease it. 352 */ 353 chp->ch_queue->queue_freeze--; 354 xfer = chp->ch_queue->active_xfer; 355 KASSERT(xfer != NULL); 356 (*xfer->c_start)(xfer->c_chp, xfer); 357 } else if (chp->ch_queue->queue_freeze > 1) 358 panic("ata_thread: queue_freeze"); 359 } 360 splx(s); 361 chp->ch_thread = NULL; 362 wakeup(&chp->ch_flags); 363 kthread_exit(0); 364 } 365 366 /* 367 * atabus_create_thread: 368 * 369 * Helper routine to create the ATA bus worker thread. 370 */ 371 static void 372 atabus_create_thread(void *arg) 373 { 374 struct atabus_softc *sc = arg; 375 struct ata_channel *chp = sc->sc_chan; 376 int error; 377 378 if ((error = kthread_create1(atabus_thread, sc, &chp->ch_thread, 379 "%s", sc->sc_dev.dv_xname)) != 0) 380 aprint_error("%s: unable to create kernel thread: error %d\n", 381 sc->sc_dev.dv_xname, error); 382 } 383 384 /* 385 * atabus_match: 386 * 387 * Autoconfiguration match routine. 388 */ 389 static int 390 atabus_match(struct device *parent, struct cfdata *cf, void *aux) 391 { 392 struct ata_channel *chp = aux; 393 394 if (chp == NULL) 395 return (0); 396 397 if (cf->cf_loc[ATACF_CHANNEL] != chp->ch_channel && 398 cf->cf_loc[ATACF_CHANNEL] != ATACF_CHANNEL_DEFAULT) 399 return (0); 400 401 return (1); 402 } 403 404 /* 405 * atabus_attach: 406 * 407 * Autoconfiguration attach routine. 408 */ 409 static void 410 atabus_attach(struct device *parent, struct device *self, void *aux) 411 { 412 struct atabus_softc *sc = (void *) self; 413 struct ata_channel *chp = aux; 414 struct atabus_initq *initq; 415 416 sc->sc_chan = chp; 417 418 aprint_normal("\n"); 419 aprint_naive("\n"); 420 421 if (ata_addref(chp)) 422 return; 423 424 initq = malloc(sizeof(*initq), M_DEVBUF, M_WAITOK); 425 initq->atabus_sc = sc; 426 TAILQ_INSERT_TAIL(&atabus_initq_head, initq, atabus_initq); 427 config_pending_incr(); 428 kthread_create(atabus_create_thread, sc); 429 430 sc->sc_powerhook = powerhook_establish(atabus_powerhook, sc); 431 if (sc->sc_powerhook == NULL) 432 printf("%s: WARNING: unable to establish power hook\n", 433 sc->sc_dev.dv_xname); 434 } 435 436 /* 437 * atabus_activate: 438 * 439 * Autoconfiguration activation routine. 440 */ 441 static int 442 atabus_activate(struct device *self, enum devact act) 443 { 444 struct atabus_softc *sc = (void *) self; 445 struct ata_channel *chp = sc->sc_chan; 446 struct device *dev = NULL; 447 int s, i, error = 0; 448 449 s = splbio(); 450 switch (act) { 451 case DVACT_ACTIVATE: 452 error = EOPNOTSUPP; 453 break; 454 455 case DVACT_DEACTIVATE: 456 /* 457 * We might deactivate the children of atapibus twice 458 * (once bia atapibus, once directly), but since the 459 * generic autoconfiguration code maintains the DVF_ACTIVE 460 * flag, it's safe. 461 */ 462 if ((dev = chp->atapibus) != NULL) { 463 error = config_deactivate(dev); 464 if (error) 465 goto out; 466 } 467 468 for (i = 0; i < chp->ch_ndrive; i++) { 469 if ((dev = chp->ch_drive[i].drv_softc) != NULL) { 470 ATADEBUG_PRINT(("atabus_activate: %s: " 471 "deactivating %s\n", sc->sc_dev.dv_xname, 472 dev->dv_xname), 473 DEBUG_DETACH); 474 error = config_deactivate(dev); 475 if (error) 476 goto out; 477 } 478 } 479 break; 480 } 481 out: 482 splx(s); 483 484 #ifdef ATADEBUG 485 if (dev != NULL && error != 0) 486 ATADEBUG_PRINT(("atabus_activate: %s: " 487 "error %d deactivating %s\n", sc->sc_dev.dv_xname, 488 error, dev->dv_xname), DEBUG_DETACH); 489 #endif /* ATADEBUG */ 490 491 return (error); 492 } 493 494 /* 495 * atabus_detach: 496 * 497 * Autoconfiguration detach routine. 498 */ 499 static int 500 atabus_detach(struct device *self, int flags) 501 { 502 struct atabus_softc *sc = (void *) self; 503 struct ata_channel *chp = sc->sc_chan; 504 struct device *dev = NULL; 505 int s, i, error = 0; 506 507 /* Shutdown the channel. */ 508 s = splbio(); /* XXX ALSO NEED AN INTERLOCK HERE. */ 509 chp->ch_flags |= ATACH_SHUTDOWN; 510 splx(s); 511 wakeup(&chp->ch_thread); 512 while (chp->ch_thread != NULL) 513 (void) tsleep(&chp->ch_flags, PRIBIO, "atadown", 0); 514 515 /* power hook */ 516 if (sc->sc_powerhook) 517 powerhook_disestablish(sc->sc_powerhook); 518 519 /* 520 * Detach atapibus and its children. 521 */ 522 if ((dev = chp->atapibus) != NULL) { 523 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n", 524 sc->sc_dev.dv_xname, dev->dv_xname), DEBUG_DETACH); 525 error = config_detach(dev, flags); 526 if (error) 527 goto out; 528 } 529 530 /* 531 * Detach our other children. 532 */ 533 for (i = 0; i < chp->ch_ndrive; i++) { 534 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) 535 continue; 536 if ((dev = chp->ch_drive[i].drv_softc) != NULL) { 537 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n", 538 sc->sc_dev.dv_xname, dev->dv_xname), 539 DEBUG_DETACH); 540 error = config_detach(dev, flags); 541 if (error) 542 goto out; 543 } 544 } 545 546 out: 547 #ifdef ATADEBUG 548 if (dev != NULL && error != 0) 549 ATADEBUG_PRINT(("atabus_detach: %s: error %d detaching %s\n", 550 sc->sc_dev.dv_xname, error, dev->dv_xname), 551 DEBUG_DETACH); 552 #endif /* ATADEBUG */ 553 554 return (error); 555 } 556 557 CFATTACH_DECL(atabus, sizeof(struct atabus_softc), 558 atabus_match, atabus_attach, atabus_detach, atabus_activate); 559 560 /***************************************************************************** 561 * Common ATA bus operations. 562 *****************************************************************************/ 563 564 /* Get the disk's parameters */ 565 int 566 ata_get_params(struct ata_drive_datas *drvp, u_int8_t flags, 567 struct ataparams *prms) 568 { 569 char tb[DEV_BSIZE]; 570 struct ata_command ata_c; 571 struct ata_channel *chp = drvp->chnl_softc; 572 struct atac_softc *atac = chp->ch_atac; 573 574 #if BYTE_ORDER == LITTLE_ENDIAN 575 int i; 576 u_int16_t *p; 577 #endif 578 579 ATADEBUG_PRINT(("ata_get_parms\n"), DEBUG_FUNCS); 580 581 memset(tb, 0, DEV_BSIZE); 582 memset(prms, 0, sizeof(struct ataparams)); 583 memset(&ata_c, 0, sizeof(struct ata_command)); 584 585 if (drvp->drive_flags & DRIVE_ATA) { 586 ata_c.r_command = WDCC_IDENTIFY; 587 ata_c.r_st_bmask = WDCS_DRDY; 588 ata_c.r_st_pmask = WDCS_DRQ; 589 ata_c.timeout = 3000; /* 3s */ 590 } else if (drvp->drive_flags & DRIVE_ATAPI) { 591 ata_c.r_command = ATAPI_IDENTIFY_DEVICE; 592 ata_c.r_st_bmask = 0; 593 ata_c.r_st_pmask = WDCS_DRQ; 594 ata_c.timeout = 10000; /* 10s */ 595 } else { 596 ATADEBUG_PRINT(("ata_get_parms: no disks\n"), 597 DEBUG_FUNCS|DEBUG_PROBE); 598 return CMD_ERR; 599 } 600 ata_c.flags = AT_READ | flags; 601 ata_c.data = tb; 602 ata_c.bcount = DEV_BSIZE; 603 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 604 &ata_c) != ATACMD_COMPLETE) { 605 ATADEBUG_PRINT(("ata_get_parms: wdc_exec_command failed\n"), 606 DEBUG_FUNCS|DEBUG_PROBE); 607 return CMD_AGAIN; 608 } 609 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 610 ATADEBUG_PRINT(("ata_get_parms: ata_c.flags=0x%x\n", 611 ata_c.flags), DEBUG_FUNCS|DEBUG_PROBE); 612 return CMD_ERR; 613 } else { 614 /* if we didn't read any data something is wrong */ 615 if ((ata_c.flags & AT_XFDONE) == 0) 616 return CMD_ERR; 617 /* Read in parameter block. */ 618 memcpy(prms, tb, sizeof(struct ataparams)); 619 #if BYTE_ORDER == LITTLE_ENDIAN 620 /* 621 * Shuffle string byte order. 622 * ATAPI Mitsumi and NEC drives don't need this. 623 */ 624 if ((prms->atap_config & WDC_CFG_ATAPI_MASK) == 625 WDC_CFG_ATAPI && 626 ((prms->atap_model[0] == 'N' && 627 prms->atap_model[1] == 'E') || 628 (prms->atap_model[0] == 'F' && 629 prms->atap_model[1] == 'X'))) 630 return 0; 631 for (i = 0; i < sizeof(prms->atap_model); i += 2) { 632 p = (u_short *)(prms->atap_model + i); 633 *p = ntohs(*p); 634 } 635 for (i = 0; i < sizeof(prms->atap_serial); i += 2) { 636 p = (u_short *)(prms->atap_serial + i); 637 *p = ntohs(*p); 638 } 639 for (i = 0; i < sizeof(prms->atap_revision); i += 2) { 640 p = (u_short *)(prms->atap_revision + i); 641 *p = ntohs(*p); 642 } 643 #endif 644 return CMD_OK; 645 } 646 } 647 648 int 649 ata_set_mode(struct ata_drive_datas *drvp, u_int8_t mode, u_int8_t flags) 650 { 651 struct ata_command ata_c; 652 struct ata_channel *chp = drvp->chnl_softc; 653 struct atac_softc *atac = chp->ch_atac; 654 655 ATADEBUG_PRINT(("ata_set_mode=0x%x\n", mode), DEBUG_FUNCS); 656 memset(&ata_c, 0, sizeof(struct ata_command)); 657 658 ata_c.r_command = SET_FEATURES; 659 ata_c.r_st_bmask = 0; 660 ata_c.r_st_pmask = 0; 661 ata_c.r_features = WDSF_SET_MODE; 662 ata_c.r_count = mode; 663 ata_c.flags = flags; 664 ata_c.timeout = 1000; /* 1s */ 665 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 666 &ata_c) != ATACMD_COMPLETE) 667 return CMD_AGAIN; 668 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 669 return CMD_ERR; 670 } 671 return CMD_OK; 672 } 673 674 void 675 ata_dmaerr(struct ata_drive_datas *drvp, int flags) 676 { 677 /* 678 * Downgrade decision: if we get NERRS_MAX in NXFER. 679 * We start with n_dmaerrs set to NERRS_MAX-1 so that the 680 * first error within the first NXFER ops will immediatly trigger 681 * a downgrade. 682 * If we got an error and n_xfers is bigger than NXFER reset counters. 683 */ 684 drvp->n_dmaerrs++; 685 if (drvp->n_dmaerrs >= NERRS_MAX && drvp->n_xfers <= NXFER) { 686 ata_downgrade_mode(drvp, flags); 687 drvp->n_dmaerrs = NERRS_MAX-1; 688 drvp->n_xfers = 0; 689 return; 690 } 691 if (drvp->n_xfers > NXFER) { 692 drvp->n_dmaerrs = 1; /* just got an error */ 693 drvp->n_xfers = 1; /* restart counting from this error */ 694 } 695 } 696 697 /* 698 * freeze the queue and wait for the controller to be idle. Caller has to 699 * unfreeze/restart the queue 700 */ 701 void 702 ata_queue_idle(struct ata_queue *queue) 703 { 704 int s = splbio(); 705 queue->queue_freeze++; 706 while (queue->active_xfer != NULL) { 707 queue->queue_flags |= QF_IDLE_WAIT; 708 tsleep(&queue->queue_flags, PRIBIO, "qidl", 0); 709 } 710 splx(s); 711 } 712 713 /* 714 * Add a command to the queue and start controller. 715 * 716 * MUST BE CALLED AT splbio()! 717 */ 718 void 719 ata_exec_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 720 { 721 722 ATADEBUG_PRINT(("ata_exec_xfer %p channel %d drive %d\n", xfer, 723 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 724 725 /* complete xfer setup */ 726 xfer->c_chp = chp; 727 728 /* insert at the end of command list */ 729 TAILQ_INSERT_TAIL(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 730 ATADEBUG_PRINT(("atastart from ata_exec_xfer, flags 0x%x\n", 731 chp->ch_flags), DEBUG_XFERS); 732 /* 733 * if polling and can sleep, wait for the xfer to be at head of queue 734 */ 735 if ((xfer->c_flags & (C_POLL | C_WAIT)) == (C_POLL | C_WAIT)) { 736 while (chp->ch_queue->active_xfer != NULL || 737 TAILQ_FIRST(&chp->ch_queue->queue_xfer) != xfer) { 738 xfer->c_flags |= C_WAITACT; 739 tsleep(xfer, PRIBIO, "ataact", 0); 740 xfer->c_flags &= ~C_WAITACT; 741 if (xfer->c_flags & C_FREE) { 742 ata_free_xfer(chp, xfer); 743 return; 744 } 745 } 746 } 747 atastart(chp); 748 } 749 750 /* 751 * Start I/O on a controller, for the given channel. 752 * The first xfer may be not for our channel if the channel queues 753 * are shared. 754 * 755 * MUST BE CALLED AT splbio()! 756 */ 757 void 758 atastart(struct ata_channel *chp) 759 { 760 struct atac_softc *atac = chp->ch_atac; 761 struct ata_xfer *xfer; 762 763 #ifdef ATA_DEBUG 764 int spl1, spl2; 765 766 spl1 = splbio(); 767 spl2 = splbio(); 768 if (spl2 != spl1) { 769 printf("atastart: not at splbio()\n"); 770 panic("atastart"); 771 } 772 splx(spl2); 773 splx(spl1); 774 #endif /* ATA_DEBUG */ 775 776 /* is there a xfer ? */ 777 if ((xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer)) == NULL) 778 return; 779 780 /* adjust chp, in case we have a shared queue */ 781 chp = xfer->c_chp; 782 783 if (chp->ch_queue->active_xfer != NULL) { 784 return; /* channel aleady active */ 785 } 786 if (__predict_false(chp->ch_queue->queue_freeze > 0)) { 787 if (chp->ch_queue->queue_flags & QF_IDLE_WAIT) { 788 chp->ch_queue->queue_flags &= ~QF_IDLE_WAIT; 789 wakeup(&chp->ch_queue->queue_flags); 790 } 791 return; /* queue frozen */ 792 } 793 /* 794 * if someone is waiting for the command to be active, wake it up 795 * and let it process the command 796 */ 797 if (xfer->c_flags & C_WAITACT) { 798 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d " 799 "wait active\n", xfer, chp->ch_channel, xfer->c_drive), 800 DEBUG_XFERS); 801 wakeup(xfer); 802 return; 803 } 804 #ifdef DIAGNOSTIC 805 if ((chp->ch_flags & ATACH_IRQ_WAIT) != 0) 806 panic("atastart: channel waiting for irq"); 807 #endif 808 if (atac->atac_claim_hw) 809 if (!(*atac->atac_claim_hw)(chp, 0)) 810 return; 811 812 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d\n", xfer, 813 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 814 if (chp->ch_drive[xfer->c_drive].drive_flags & DRIVE_RESET) { 815 chp->ch_drive[xfer->c_drive].drive_flags &= ~DRIVE_RESET; 816 chp->ch_drive[xfer->c_drive].state = 0; 817 } 818 chp->ch_queue->active_xfer = xfer; 819 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 820 821 if (atac->atac_cap & ATAC_CAP_NOIRQ) 822 KASSERT(xfer->c_flags & C_POLL); 823 824 xfer->c_start(chp, xfer); 825 } 826 827 struct ata_xfer * 828 ata_get_xfer(int flags) 829 { 830 struct ata_xfer *xfer; 831 int s; 832 833 s = splbio(); 834 xfer = pool_get(&ata_xfer_pool, 835 ((flags & ATAXF_NOSLEEP) != 0 ? PR_NOWAIT : PR_WAITOK)); 836 splx(s); 837 if (xfer != NULL) { 838 memset(xfer, 0, sizeof(struct ata_xfer)); 839 } 840 return xfer; 841 } 842 843 void 844 ata_free_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 845 { 846 struct atac_softc *atac = chp->ch_atac; 847 int s; 848 849 if (xfer->c_flags & C_WAITACT) { 850 /* Someone is waiting for this xfer, so we can't free now */ 851 xfer->c_flags |= C_FREE; 852 wakeup(xfer); 853 return; 854 } 855 856 if (atac->atac_free_hw) 857 (*atac->atac_free_hw)(chp); 858 s = splbio(); 859 pool_put(&ata_xfer_pool, xfer); 860 splx(s); 861 } 862 863 /* 864 * Kill off all pending xfers for a ata_channel. 865 * 866 * Must be called at splbio(). 867 */ 868 void 869 ata_kill_pending(struct ata_drive_datas *drvp) 870 { 871 struct ata_channel *chp = drvp->chnl_softc; 872 struct ata_xfer *xfer, *next_xfer; 873 int s = splbio(); 874 875 for (xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer); 876 xfer != NULL; xfer = next_xfer) { 877 next_xfer = TAILQ_NEXT(xfer, c_xferchain); 878 if (xfer->c_chp != chp || xfer->c_drive != drvp->drive) 879 continue; 880 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 881 (*xfer->c_kill_xfer)(chp, xfer, KILL_GONE); 882 } 883 884 while ((xfer = chp->ch_queue->active_xfer) != NULL) { 885 if (xfer->c_chp == chp && xfer->c_drive == drvp->drive) { 886 drvp->drive_flags |= DRIVE_WAITDRAIN; 887 (void) tsleep(&chp->ch_queue->active_xfer, 888 PRIBIO, "atdrn", 0); 889 } else { 890 /* no more xfer for us */ 891 break; 892 } 893 } 894 splx(s); 895 } 896 897 /* 898 * ata_reset_channel: 899 * 900 * Reset and ATA channel. 901 * 902 * MUST BE CALLED AT splbio()! 903 */ 904 void 905 ata_reset_channel(struct ata_channel *chp, int flags) 906 { 907 struct atac_softc *atac = chp->ch_atac; 908 int drive; 909 910 #ifdef ATA_DEBUG 911 int spl1, spl2; 912 913 spl1 = splbio(); 914 spl2 = splbio(); 915 if (spl2 != spl1) { 916 printf("ata_reset_channel: not at splbio()\n"); 917 panic("ata_reset_channel"); 918 } 919 splx(spl2); 920 splx(spl1); 921 #endif /* ATA_DEBUG */ 922 923 chp->ch_queue->queue_freeze++; 924 925 /* 926 * If we can poll or wait it's OK, otherwise wake up the 927 * kernel thread to do it for us. 928 */ 929 if ((flags & (AT_POLL | AT_WAIT)) == 0) { 930 if (chp->ch_flags & ATACH_TH_RESET) { 931 /* No need to schedule a reset more than one time. */ 932 chp->ch_queue->queue_freeze--; 933 return; 934 } 935 chp->ch_flags |= ATACH_TH_RESET; 936 chp->ch_reset_flags = flags & (AT_RST_EMERG | AT_RST_NOCMD); 937 wakeup(&chp->ch_thread); 938 return; 939 } 940 941 (*atac->atac_bustype_ata->ata_reset_channel)(chp, flags); 942 943 for (drive = 0; drive < chp->ch_ndrive; drive++) 944 chp->ch_drive[drive].state = 0; 945 946 chp->ch_flags &= ~ATACH_TH_RESET; 947 if ((flags & AT_RST_EMERG) == 0) { 948 chp->ch_queue->queue_freeze--; 949 atastart(chp); 950 } else { 951 /* make sure that we can use polled commands */ 952 TAILQ_INIT(&chp->ch_queue->queue_xfer); 953 chp->ch_queue->queue_freeze = 0; 954 chp->ch_queue->active_xfer = NULL; 955 } 956 } 957 958 int 959 ata_addref(struct ata_channel *chp) 960 { 961 struct atac_softc *atac = chp->ch_atac; 962 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 963 int s, error = 0; 964 965 s = splbio(); 966 if (adapt->adapt_refcnt++ == 0 && 967 adapt->adapt_enable != NULL) { 968 error = (*adapt->adapt_enable)(&atac->atac_dev, 1); 969 if (error) 970 adapt->adapt_refcnt--; 971 } 972 splx(s); 973 return (error); 974 } 975 976 void 977 ata_delref(struct ata_channel *chp) 978 { 979 struct atac_softc *atac = chp->ch_atac; 980 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 981 int s; 982 983 s = splbio(); 984 if (adapt->adapt_refcnt-- == 1 && 985 adapt->adapt_enable != NULL) 986 (void) (*adapt->adapt_enable)(&atac->atac_dev, 0); 987 splx(s); 988 } 989 990 void 991 ata_print_modes(struct ata_channel *chp) 992 { 993 struct atac_softc *atac = chp->ch_atac; 994 int drive; 995 struct ata_drive_datas *drvp; 996 997 for (drive = 0; drive < chp->ch_ndrive; drive++) { 998 drvp = &chp->ch_drive[drive]; 999 if ((drvp->drive_flags & DRIVE) == 0 || drvp->drv_softc == NULL) 1000 continue; 1001 aprint_normal("%s(%s:%d:%d): using PIO mode %d", 1002 drvp->drv_softc->dv_xname, 1003 atac->atac_dev.dv_xname, 1004 chp->ch_channel, drvp->drive, drvp->PIO_mode); 1005 if (drvp->drive_flags & DRIVE_DMA) 1006 aprint_normal(", DMA mode %d", drvp->DMA_mode); 1007 if (drvp->drive_flags & DRIVE_UDMA) { 1008 aprint_normal(", Ultra-DMA mode %d", drvp->UDMA_mode); 1009 if (drvp->UDMA_mode == 2) 1010 aprint_normal(" (Ultra/33)"); 1011 else if (drvp->UDMA_mode == 4) 1012 aprint_normal(" (Ultra/66)"); 1013 else if (drvp->UDMA_mode == 5) 1014 aprint_normal(" (Ultra/100)"); 1015 else if (drvp->UDMA_mode == 6) 1016 aprint_normal(" (Ultra/133)"); 1017 } 1018 if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) 1019 aprint_normal(" (using DMA)"); 1020 aprint_normal("\n"); 1021 } 1022 } 1023 1024 /* 1025 * downgrade the transfer mode of a drive after an error. return 1 if 1026 * downgrade was possible, 0 otherwise. 1027 * 1028 * MUST BE CALLED AT splbio()! 1029 */ 1030 int 1031 ata_downgrade_mode(struct ata_drive_datas *drvp, int flags) 1032 { 1033 struct ata_channel *chp = drvp->chnl_softc; 1034 struct atac_softc *atac = chp->ch_atac; 1035 struct device *drv_dev = drvp->drv_softc; 1036 int cf_flags = device_cfdata(drv_dev)->cf_flags; 1037 1038 /* if drive or controller don't know its mode, we can't do much */ 1039 if ((drvp->drive_flags & DRIVE_MODE) == 0 || 1040 (atac->atac_set_modes == NULL)) 1041 return 0; 1042 /* current drive mode was set by a config flag, let it this way */ 1043 if ((cf_flags & ATA_CONFIG_PIO_SET) || 1044 (cf_flags & ATA_CONFIG_DMA_SET) || 1045 (cf_flags & ATA_CONFIG_UDMA_SET)) 1046 return 0; 1047 1048 /* 1049 * If we were using Ultra-DMA mode, downgrade to the next lower mode. 1050 */ 1051 if ((drvp->drive_flags & DRIVE_UDMA) && drvp->UDMA_mode >= 2) { 1052 drvp->UDMA_mode--; 1053 printf("%s: transfer error, downgrading to Ultra-DMA mode %d\n", 1054 drv_dev->dv_xname, drvp->UDMA_mode); 1055 } 1056 1057 /* 1058 * If we were using ultra-DMA, don't downgrade to multiword DMA. 1059 */ 1060 else if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) { 1061 drvp->drive_flags &= ~(DRIVE_DMA | DRIVE_UDMA); 1062 drvp->PIO_mode = drvp->PIO_cap; 1063 printf("%s: transfer error, downgrading to PIO mode %d\n", 1064 drv_dev->dv_xname, drvp->PIO_mode); 1065 } else /* already using PIO, can't downgrade */ 1066 return 0; 1067 1068 (*atac->atac_set_modes)(chp); 1069 ata_print_modes(chp); 1070 /* reset the channel, which will shedule all drives for setup */ 1071 ata_reset_channel(chp, flags | AT_RST_NOCMD); 1072 return 1; 1073 } 1074 1075 /* 1076 * Probe drive's capabilities, for use by the controller later 1077 * Assumes drvp points to an existing drive. 1078 */ 1079 void 1080 ata_probe_caps(struct ata_drive_datas *drvp) 1081 { 1082 struct ataparams params, params2; 1083 struct ata_channel *chp = drvp->chnl_softc; 1084 struct atac_softc *atac = chp->ch_atac; 1085 struct device *drv_dev = drvp->drv_softc; 1086 int i, printed, s; 1087 const char *sep = ""; 1088 int cf_flags; 1089 1090 if (ata_get_params(drvp, AT_WAIT, ¶ms) != CMD_OK) { 1091 /* IDENTIFY failed. Can't tell more about the device */ 1092 return; 1093 } 1094 if ((atac->atac_cap & (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) == 1095 (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) { 1096 /* 1097 * Controller claims 16 and 32 bit transfers. 1098 * Re-do an IDENTIFY with 32-bit transfers, 1099 * and compare results. 1100 */ 1101 s = splbio(); 1102 drvp->drive_flags |= DRIVE_CAP32; 1103 splx(s); 1104 ata_get_params(drvp, AT_WAIT, ¶ms2); 1105 if (memcmp(¶ms, ¶ms2, sizeof(struct ataparams)) != 0) { 1106 /* Not good. fall back to 16bits */ 1107 s = splbio(); 1108 drvp->drive_flags &= ~DRIVE_CAP32; 1109 splx(s); 1110 } else { 1111 aprint_normal("%s: 32-bit data port\n", 1112 drv_dev->dv_xname); 1113 } 1114 } 1115 #if 0 /* Some ultra-DMA drives claims to only support ATA-3. sigh */ 1116 if (params.atap_ata_major > 0x01 && 1117 params.atap_ata_major != 0xffff) { 1118 for (i = 14; i > 0; i--) { 1119 if (params.atap_ata_major & (1 << i)) { 1120 aprint_normal("%s: ATA version %d\n", 1121 drv_dev->dv_xname, i); 1122 drvp->ata_vers = i; 1123 break; 1124 } 1125 } 1126 } 1127 #endif 1128 1129 /* An ATAPI device is at last PIO mode 3 */ 1130 if (drvp->drive_flags & DRIVE_ATAPI) 1131 drvp->PIO_mode = 3; 1132 1133 /* 1134 * It's not in the specs, but it seems that some drive 1135 * returns 0xffff in atap_extensions when this field is invalid 1136 */ 1137 if (params.atap_extensions != 0xffff && 1138 (params.atap_extensions & WDC_EXT_MODES)) { 1139 printed = 0; 1140 /* 1141 * XXX some drives report something wrong here (they claim to 1142 * support PIO mode 8 !). As mode is coded on 3 bits in 1143 * SET FEATURE, limit it to 7 (so limit i to 4). 1144 * If higher mode than 7 is found, abort. 1145 */ 1146 for (i = 7; i >= 0; i--) { 1147 if ((params.atap_piomode_supp & (1 << i)) == 0) 1148 continue; 1149 if (i > 4) 1150 return; 1151 /* 1152 * See if mode is accepted. 1153 * If the controller can't set its PIO mode, 1154 * assume the defaults are good, so don't try 1155 * to set it 1156 */ 1157 if (atac->atac_set_modes) 1158 /* 1159 * It's OK to pool here, it's fast enouth 1160 * to not bother waiting for interrupt 1161 */ 1162 if (ata_set_mode(drvp, 0x08 | (i + 3), 1163 AT_WAIT) != CMD_OK) 1164 continue; 1165 if (!printed) { 1166 aprint_normal("%s: drive supports PIO mode %d", 1167 drv_dev->dv_xname, i + 3); 1168 sep = ","; 1169 printed = 1; 1170 } 1171 /* 1172 * If controller's driver can't set its PIO mode, 1173 * get the highter one for the drive. 1174 */ 1175 if (atac->atac_set_modes == NULL || 1176 atac->atac_pio_cap >= i + 3) { 1177 drvp->PIO_mode = i + 3; 1178 drvp->PIO_cap = i + 3; 1179 break; 1180 } 1181 } 1182 if (!printed) { 1183 /* 1184 * We didn't find a valid PIO mode. 1185 * Assume the values returned for DMA are buggy too 1186 */ 1187 return; 1188 } 1189 s = splbio(); 1190 drvp->drive_flags |= DRIVE_MODE; 1191 splx(s); 1192 printed = 0; 1193 for (i = 7; i >= 0; i--) { 1194 if ((params.atap_dmamode_supp & (1 << i)) == 0) 1195 continue; 1196 if ((atac->atac_cap & ATAC_CAP_DMA) && 1197 atac->atac_set_modes != NULL) 1198 if (ata_set_mode(drvp, 0x20 | i, AT_WAIT) 1199 != CMD_OK) 1200 continue; 1201 if (!printed) { 1202 aprint_normal("%s DMA mode %d", sep, i); 1203 sep = ","; 1204 printed = 1; 1205 } 1206 if (atac->atac_cap & ATAC_CAP_DMA) { 1207 if (atac->atac_set_modes != NULL && 1208 atac->atac_dma_cap < i) 1209 continue; 1210 drvp->DMA_mode = i; 1211 drvp->DMA_cap = i; 1212 s = splbio(); 1213 drvp->drive_flags |= DRIVE_DMA; 1214 splx(s); 1215 } 1216 break; 1217 } 1218 if (params.atap_extensions & WDC_EXT_UDMA_MODES) { 1219 printed = 0; 1220 for (i = 7; i >= 0; i--) { 1221 if ((params.atap_udmamode_supp & (1 << i)) 1222 == 0) 1223 continue; 1224 if (atac->atac_set_modes != NULL && 1225 (atac->atac_cap & ATAC_CAP_UDMA)) 1226 if (ata_set_mode(drvp, 0x40 | i, 1227 AT_WAIT) != CMD_OK) 1228 continue; 1229 if (!printed) { 1230 aprint_normal("%s Ultra-DMA mode %d", 1231 sep, i); 1232 if (i == 2) 1233 aprint_normal(" (Ultra/33)"); 1234 else if (i == 4) 1235 aprint_normal(" (Ultra/66)"); 1236 else if (i == 5) 1237 aprint_normal(" (Ultra/100)"); 1238 else if (i == 6) 1239 aprint_normal(" (Ultra/133)"); 1240 sep = ","; 1241 printed = 1; 1242 } 1243 if (atac->atac_cap & ATAC_CAP_UDMA) { 1244 if (atac->atac_set_modes != NULL && 1245 atac->atac_udma_cap < i) 1246 continue; 1247 drvp->UDMA_mode = i; 1248 drvp->UDMA_cap = i; 1249 s = splbio(); 1250 drvp->drive_flags |= DRIVE_UDMA; 1251 splx(s); 1252 } 1253 break; 1254 } 1255 } 1256 aprint_normal("\n"); 1257 } 1258 1259 s = splbio(); 1260 drvp->drive_flags &= ~DRIVE_NOSTREAM; 1261 if (drvp->drive_flags & DRIVE_ATAPI) { 1262 if (atac->atac_cap & ATAC_CAP_ATAPI_NOSTREAM) 1263 drvp->drive_flags |= DRIVE_NOSTREAM; 1264 } else { 1265 if (atac->atac_cap & ATAC_CAP_ATA_NOSTREAM) 1266 drvp->drive_flags |= DRIVE_NOSTREAM; 1267 } 1268 splx(s); 1269 1270 /* Try to guess ATA version here, if it didn't get reported */ 1271 if (drvp->ata_vers == 0) { 1272 if (drvp->drive_flags & DRIVE_UDMA) 1273 drvp->ata_vers = 4; /* should be at last ATA-4 */ 1274 else if (drvp->PIO_cap > 2) 1275 drvp->ata_vers = 2; /* should be at last ATA-2 */ 1276 } 1277 cf_flags = device_cfdata(drv_dev)->cf_flags; 1278 if (cf_flags & ATA_CONFIG_PIO_SET) { 1279 s = splbio(); 1280 drvp->PIO_mode = 1281 (cf_flags & ATA_CONFIG_PIO_MODES) >> ATA_CONFIG_PIO_OFF; 1282 drvp->drive_flags |= DRIVE_MODE; 1283 splx(s); 1284 } 1285 if ((atac->atac_cap & ATAC_CAP_DMA) == 0) { 1286 /* don't care about DMA modes */ 1287 return; 1288 } 1289 if (cf_flags & ATA_CONFIG_DMA_SET) { 1290 s = splbio(); 1291 if ((cf_flags & ATA_CONFIG_DMA_MODES) == 1292 ATA_CONFIG_DMA_DISABLE) { 1293 drvp->drive_flags &= ~DRIVE_DMA; 1294 } else { 1295 drvp->DMA_mode = (cf_flags & ATA_CONFIG_DMA_MODES) >> 1296 ATA_CONFIG_DMA_OFF; 1297 drvp->drive_flags |= DRIVE_DMA | DRIVE_MODE; 1298 } 1299 splx(s); 1300 } 1301 if ((atac->atac_cap & ATAC_CAP_UDMA) == 0) { 1302 /* don't care about UDMA modes */ 1303 return; 1304 } 1305 if (cf_flags & ATA_CONFIG_UDMA_SET) { 1306 s = splbio(); 1307 if ((cf_flags & ATA_CONFIG_UDMA_MODES) == 1308 ATA_CONFIG_UDMA_DISABLE) { 1309 drvp->drive_flags &= ~DRIVE_UDMA; 1310 } else { 1311 drvp->UDMA_mode = (cf_flags & ATA_CONFIG_UDMA_MODES) >> 1312 ATA_CONFIG_UDMA_OFF; 1313 drvp->drive_flags |= DRIVE_UDMA | DRIVE_MODE; 1314 } 1315 splx(s); 1316 } 1317 } 1318 1319 /* management of the /dev/atabus* devices */ 1320 int 1321 atabusopen(dev_t dev, int flag, int fmt, struct lwp *l) 1322 { 1323 struct atabus_softc *sc; 1324 int error, unit = minor(dev); 1325 1326 if (unit >= atabus_cd.cd_ndevs || 1327 (sc = atabus_cd.cd_devs[unit]) == NULL) 1328 return (ENXIO); 1329 1330 if (sc->sc_flags & ATABUSCF_OPEN) 1331 return (EBUSY); 1332 1333 if ((error = ata_addref(sc->sc_chan)) != 0) 1334 return (error); 1335 1336 sc->sc_flags |= ATABUSCF_OPEN; 1337 1338 return (0); 1339 } 1340 1341 1342 int 1343 atabusclose(dev_t dev, int flag, int fmt, struct lwp *l) 1344 { 1345 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)]; 1346 1347 ata_delref(sc->sc_chan); 1348 1349 sc->sc_flags &= ~ATABUSCF_OPEN; 1350 1351 return (0); 1352 } 1353 1354 int 1355 atabusioctl(dev_t dev, u_long cmd, caddr_t addr, int flag, struct lwp *l) 1356 { 1357 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)]; 1358 struct ata_channel *chp = sc->sc_chan; 1359 int min_drive, max_drive, drive; 1360 int error; 1361 int s; 1362 1363 /* 1364 * Enforce write permission for ioctls that change the 1365 * state of the bus. Host adapter specific ioctls must 1366 * be checked by the adapter driver. 1367 */ 1368 switch (cmd) { 1369 case ATABUSIOSCAN: 1370 case ATABUSIODETACH: 1371 case ATABUSIORESET: 1372 if ((flag & FWRITE) == 0) 1373 return (EBADF); 1374 } 1375 1376 switch (cmd) { 1377 case ATABUSIORESET: 1378 s = splbio(); 1379 ata_reset_channel(sc->sc_chan, AT_WAIT | AT_POLL); 1380 splx(s); 1381 error = 0; 1382 break; 1383 case ATABUSIOSCAN: 1384 { 1385 #if 0 1386 struct atabusioscan_args *a= 1387 (struct atabusioscan_args *)addr; 1388 #endif 1389 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) || 1390 (chp->ch_drive[1].drive_flags & DRIVE_OLD)) 1391 return (EOPNOTSUPP); 1392 return (EOPNOTSUPP); 1393 } 1394 case ATABUSIODETACH: 1395 { 1396 struct atabusioscan_args *a= 1397 (struct atabusioscan_args *)addr; 1398 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) || 1399 (chp->ch_drive[1].drive_flags & DRIVE_OLD)) 1400 return (EOPNOTSUPP); 1401 switch (a->at_dev) { 1402 case -1: 1403 min_drive = 0; 1404 max_drive = 1; 1405 break; 1406 case 0: 1407 case 1: 1408 min_drive = max_drive = a->at_dev; 1409 break; 1410 default: 1411 return (EINVAL); 1412 } 1413 for (drive = min_drive; drive <= max_drive; drive++) { 1414 if (chp->ch_drive[drive].drv_softc != NULL) { 1415 error = config_detach( 1416 chp->ch_drive[drive].drv_softc, 0); 1417 if (error) 1418 return (error); 1419 chp->ch_drive[drive].drv_softc = NULL; 1420 } 1421 } 1422 error = 0; 1423 break; 1424 } 1425 default: 1426 error = ENOTTY; 1427 } 1428 return (error); 1429 }; 1430 1431 static void 1432 atabus_powerhook(int why, void *hdl) 1433 { 1434 struct atabus_softc *sc = (struct atabus_softc *)hdl; 1435 struct ata_channel *chp = sc->sc_chan; 1436 int s; 1437 1438 switch (why) { 1439 case PWR_SOFTSUSPEND: 1440 case PWR_SOFTSTANDBY: 1441 /* freeze the queue and wait for the controller to be idle */ 1442 ata_queue_idle(chp->ch_queue); 1443 break; 1444 case PWR_RESUME: 1445 printf("%s: resuming...\n", sc->sc_dev.dv_xname); 1446 s = splbio(); 1447 KASSERT(chp->ch_queue->queue_freeze > 0); 1448 /* unfreeze the queue and reset drives (to wake them up) */ 1449 chp->ch_queue->queue_freeze--; 1450 ata_reset_channel(chp, AT_WAIT); 1451 splx(s); 1452 break; 1453 case PWR_SUSPEND: 1454 case PWR_STANDBY: 1455 case PWR_SOFTRESUME: 1456 break; 1457 } 1458 1459 return; 1460 } 1461