1 /* $NetBSD: ata.c,v 1.60 2004/09/11 18:01:58 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: ata.c,v 1.60 2004/09/11 18:01:58 bouyer Exp $"); 34 35 #ifndef ATADEBUG 36 #define ATADEBUG 37 #endif /* ATADEBUG */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/kernel.h> 42 #include <sys/malloc.h> 43 #include <sys/device.h> 44 #include <sys/conf.h> 45 #include <sys/fcntl.h> 46 #include <sys/proc.h> 47 #include <sys/pool.h> 48 #include <sys/kthread.h> 49 #include <sys/errno.h> 50 #include <sys/ataio.h> 51 52 #include <machine/intr.h> 53 #include <machine/bus.h> 54 55 #include <dev/ata/atareg.h> 56 #include <dev/ata/atavar.h> 57 58 #include "locators.h" 59 60 #include "atapibus.h" 61 #include "ataraid.h" 62 63 #if NATARAID > 0 64 #include <dev/ata/ata_raidvar.h> 65 #endif 66 67 #define DEBUG_FUNCS 0x08 68 #define DEBUG_PROBE 0x10 69 #define DEBUG_DETACH 0x20 70 #define DEBUG_XFERS 0x40 71 #ifdef ATADEBUG 72 int atadebug_mask = 0; 73 #define ATADEBUG_PRINT(args, level) \ 74 if (atadebug_mask & (level)) \ 75 printf args 76 #else 77 #define ATADEBUG_PRINT(args, level) 78 #endif 79 80 POOL_INIT(ata_xfer_pool, sizeof(struct ata_xfer), 0, 0, 0, "ataspl", NULL); 81 82 /* 83 * A queue of atabus instances, used to ensure the same bus probe order 84 * for a given hardware configuration at each boot. 85 */ 86 struct atabus_initq_head atabus_initq_head = 87 TAILQ_HEAD_INITIALIZER(atabus_initq_head); 88 struct simplelock atabus_interlock = SIMPLELOCK_INITIALIZER; 89 90 /***************************************************************************** 91 * ATA bus layer. 92 * 93 * ATA controllers attach an atabus instance, which handles probing the bus 94 * for drives, etc. 95 *****************************************************************************/ 96 97 dev_type_open(atabusopen); 98 dev_type_close(atabusclose); 99 dev_type_ioctl(atabusioctl); 100 101 const struct cdevsw atabus_cdevsw = { 102 atabusopen, atabusclose, noread, nowrite, atabusioctl, 103 nostop, notty, nopoll, nommap, nokqfilter, 104 }; 105 106 extern struct cfdriver atabus_cd; 107 108 109 /* 110 * atabusprint: 111 * 112 * Autoconfiguration print routine used by ATA controllers when 113 * attaching an atabus instance. 114 */ 115 int 116 atabusprint(void *aux, const char *pnp) 117 { 118 struct ata_channel *chan = aux; 119 120 if (pnp) 121 aprint_normal("atabus at %s", pnp); 122 aprint_normal(" channel %d", chan->ch_channel); 123 124 return (UNCONF); 125 } 126 127 /* 128 * ataprint: 129 * 130 * Autoconfiguration print routine. 131 */ 132 int 133 ataprint(void *aux, const char *pnp) 134 { 135 struct ata_device *adev = aux; 136 137 if (pnp) 138 aprint_normal("wd at %s", pnp); 139 aprint_normal(" drive %d", adev->adev_drv_data->drive); 140 141 return (UNCONF); 142 } 143 144 /* 145 * ata_channel_attach: 146 * 147 * Common parts of attaching an atabus to an ATA controller channel. 148 */ 149 void 150 ata_channel_attach(struct ata_channel *chp) 151 { 152 153 if (chp->ch_flags & ATACH_DISABLED) 154 return; 155 156 callout_init(&chp->ch_callout); 157 158 TAILQ_INIT(&chp->ch_queue->queue_xfer); 159 chp->ch_queue->queue_freeze = 0; 160 chp->ch_queue->active_xfer = NULL; 161 162 chp->atabus = config_found(&chp->ch_atac->atac_dev, chp, atabusprint); 163 } 164 165 static void 166 atabusconfig(struct atabus_softc *atabus_sc) 167 { 168 struct ata_channel *chp = atabus_sc->sc_chan; 169 struct atac_softc *atac = chp->ch_atac; 170 int i, s; 171 struct atabus_initq *atabus_initq = NULL; 172 173 /* Probe for the drives. */ 174 (*atac->atac_probe)(chp); 175 176 ATADEBUG_PRINT(("atabusattach: ch_drive_flags 0x%x 0x%x\n", 177 chp->ch_drive[0].drive_flags, chp->ch_drive[1].drive_flags), 178 DEBUG_PROBE); 179 180 /* If no drives, abort here */ 181 for (i = 0; i < chp->ch_ndrive; i++) 182 if ((chp->ch_drive[i].drive_flags & DRIVE) != 0) 183 break; 184 if (i == chp->ch_ndrive) 185 goto out; 186 187 /* Shortcut in case we've been shutdown */ 188 if (chp->ch_flags & ATACH_SHUTDOWN) 189 goto out; 190 191 /* Make sure the devices probe in atabus order to avoid jitter. */ 192 simple_lock(&atabus_interlock); 193 while(1) { 194 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 195 if (atabus_initq->atabus_sc == atabus_sc) 196 break; 197 ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0, 198 &atabus_interlock); 199 } 200 simple_unlock(&atabus_interlock); 201 202 /* 203 * Attach an ATAPI bus, if needed. 204 */ 205 for (i = 0; i < chp->ch_ndrive; i++) { 206 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) { 207 #if NATAPIBUS > 0 208 (*atac->atac_atapibus_attach)(atabus_sc); 209 #else 210 /* 211 * Fake the autoconfig "not configured" message 212 */ 213 aprint_normal("atapibus at %s not configured\n", 214 atac->atac_dev.dv_xname); 215 chp->atapibus = NULL; 216 s = splbio(); 217 for (i = 0; i < chp->ch_ndrive; i++) 218 chp->ch_drive[i].drive_flags &= ~DRIVE_ATAPI; 219 splx(s); 220 #endif 221 break; 222 } 223 } 224 225 for (i = 0; i < chp->ch_ndrive; i++) { 226 struct ata_device adev; 227 if ((chp->ch_drive[i].drive_flags & 228 (DRIVE_ATA | DRIVE_OLD)) == 0) { 229 continue; 230 } 231 memset(&adev, 0, sizeof(struct ata_device)); 232 adev.adev_bustype = atac->atac_bustype_ata; 233 adev.adev_channel = chp->ch_channel; 234 adev.adev_openings = 1; 235 adev.adev_drv_data = &chp->ch_drive[i]; 236 chp->ata_drives[i] = config_found(&atabus_sc->sc_dev, 237 &adev, ataprint); 238 if (chp->ata_drives[i] != NULL) 239 ata_probe_caps(&chp->ch_drive[i]); 240 else { 241 s = splbio(); 242 chp->ch_drive[i].drive_flags &= 243 ~(DRIVE_ATA | DRIVE_OLD); 244 splx(s); 245 } 246 } 247 248 /* now that we know the drives, the controller can set its modes */ 249 if (atac->atac_set_modes) { 250 (*atac->atac_set_modes)(chp); 251 ata_print_modes(chp); 252 } 253 #if NATARAID > 0 254 if (atac->atac_cap & ATAC_CAP_RAID) 255 for (i = 0; i < chp->ch_ndrive; i++) 256 if (chp->ata_drives[i] != NULL) 257 ata_raid_check_component(chp->ata_drives[i]); 258 #endif /* NATARAID > 0 */ 259 260 /* 261 * reset drive_flags for unattached devices, reset state for attached 262 * ones 263 */ 264 s = splbio(); 265 for (i = 0; i < chp->ch_ndrive; i++) { 266 if (chp->ch_drive[i].drv_softc == NULL) 267 chp->ch_drive[i].drive_flags = 0; 268 else 269 chp->ch_drive[i].state = 0; 270 } 271 splx(s); 272 273 out: 274 if (atabus_initq == NULL) { 275 simple_lock(&atabus_interlock); 276 while(1) { 277 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 278 if (atabus_initq->atabus_sc == atabus_sc) 279 break; 280 ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0, 281 &atabus_interlock); 282 } 283 simple_unlock(&atabus_interlock); 284 } 285 simple_lock(&atabus_interlock); 286 TAILQ_REMOVE(&atabus_initq_head, atabus_initq, atabus_initq); 287 simple_unlock(&atabus_interlock); 288 289 free(atabus_initq, M_DEVBUF); 290 wakeup(&atabus_initq_head); 291 292 ata_delref(chp); 293 294 config_pending_decr(); 295 } 296 297 /* 298 * atabus_thread: 299 * 300 * Worker thread for the ATA bus. 301 */ 302 static void 303 atabus_thread(void *arg) 304 { 305 struct atabus_softc *sc = arg; 306 struct ata_channel *chp = sc->sc_chan; 307 struct ata_xfer *xfer; 308 int i, s; 309 310 s = splbio(); 311 chp->ch_flags |= ATACH_TH_RUN; 312 313 /* 314 * Probe the drives. Reset all flags to 0 to indicate to controllers 315 * that can re-probe that all drives must be probed.. 316 * 317 * Note: ch_ndrive may be changed during the probe. 318 */ 319 for (i = 0; i < ATA_MAXDRIVES; i++) 320 chp->ch_drive[i].drive_flags = 0; 321 splx(s); 322 323 /* Configure the devices on the bus. */ 324 atabusconfig(sc); 325 326 for (;;) { 327 s = splbio(); 328 if ((chp->ch_flags & (ATACH_TH_RESET | ATACH_SHUTDOWN)) == 0 && 329 (chp->ch_queue->active_xfer == NULL || 330 chp->ch_queue->queue_freeze == 0)) { 331 chp->ch_flags &= ~ATACH_TH_RUN; 332 (void) tsleep(&chp->ch_thread, PRIBIO, "atath", 0); 333 chp->ch_flags |= ATACH_TH_RUN; 334 } 335 if (chp->ch_flags & ATACH_SHUTDOWN) { 336 splx(s); 337 break; 338 } 339 if (chp->ch_flags & ATACH_TH_RESET) { 340 /* 341 * ata_reset_channel() will freeze 2 times, so 342 * unfreeze one time. Not a problem as we're at splbio 343 */ 344 chp->ch_queue->queue_freeze--; 345 ata_reset_channel(chp, AT_WAIT | chp->ch_reset_flags); 346 } else if (chp->ch_queue->active_xfer != NULL && 347 chp->ch_queue->queue_freeze == 1) { 348 /* 349 * Caller has bumped queue_freeze, decrease it. 350 */ 351 chp->ch_queue->queue_freeze--; 352 xfer = chp->ch_queue->active_xfer; 353 KASSERT(xfer != NULL); 354 (*xfer->c_start)(chp, xfer); 355 } else if (chp->ch_queue->queue_freeze > 1) 356 panic("ata_thread: queue_freeze"); 357 splx(s); 358 } 359 chp->ch_thread = NULL; 360 wakeup((void *)&chp->ch_flags); 361 kthread_exit(0); 362 } 363 364 /* 365 * atabus_create_thread: 366 * 367 * Helper routine to create the ATA bus worker thread. 368 */ 369 static void 370 atabus_create_thread(void *arg) 371 { 372 struct atabus_softc *sc = arg; 373 struct ata_channel *chp = sc->sc_chan; 374 int error; 375 376 if ((error = kthread_create1(atabus_thread, sc, &chp->ch_thread, 377 "%s", sc->sc_dev.dv_xname)) != 0) 378 aprint_error("%s: unable to create kernel thread: error %d\n", 379 sc->sc_dev.dv_xname, error); 380 } 381 382 /* 383 * atabus_match: 384 * 385 * Autoconfiguration match routine. 386 */ 387 static int 388 atabus_match(struct device *parent, struct cfdata *cf, void *aux) 389 { 390 struct ata_channel *chp = aux; 391 392 if (chp == NULL) 393 return (0); 394 395 if (cf->cf_loc[ATACF_CHANNEL] != chp->ch_channel && 396 cf->cf_loc[ATACF_CHANNEL] != ATACF_CHANNEL_DEFAULT) 397 return (0); 398 399 return (1); 400 } 401 402 /* 403 * atabus_attach: 404 * 405 * Autoconfiguration attach routine. 406 */ 407 static void 408 atabus_attach(struct device *parent, struct device *self, void *aux) 409 { 410 struct atabus_softc *sc = (void *) self; 411 struct ata_channel *chp = aux; 412 struct atabus_initq *initq; 413 414 sc->sc_chan = chp; 415 416 aprint_normal("\n"); 417 aprint_naive("\n"); 418 419 if (ata_addref(chp)) 420 return; 421 422 initq = malloc(sizeof(*initq), M_DEVBUF, M_WAITOK); 423 initq->atabus_sc = sc; 424 TAILQ_INSERT_TAIL(&atabus_initq_head, initq, atabus_initq); 425 config_pending_incr(); 426 kthread_create(atabus_create_thread, sc); 427 } 428 429 /* 430 * atabus_activate: 431 * 432 * Autoconfiguration activation routine. 433 */ 434 static int 435 atabus_activate(struct device *self, enum devact act) 436 { 437 struct atabus_softc *sc = (void *) self; 438 struct ata_channel *chp = sc->sc_chan; 439 struct device *dev = NULL; 440 int s, i, error = 0; 441 442 s = splbio(); 443 switch (act) { 444 case DVACT_ACTIVATE: 445 error = EOPNOTSUPP; 446 break; 447 448 case DVACT_DEACTIVATE: 449 /* 450 * We might deactivate the children of atapibus twice 451 * (once bia atapibus, once directly), but since the 452 * generic autoconfiguration code maintains the DVF_ACTIVE 453 * flag, it's safe. 454 */ 455 if ((dev = chp->atapibus) != NULL) { 456 error = config_deactivate(dev); 457 if (error) 458 goto out; 459 } 460 461 for (i = 0; i < chp->ch_ndrive; i++) { 462 if ((dev = chp->ch_drive[i].drv_softc) != NULL) { 463 ATADEBUG_PRINT(("atabus_activate: %s: " 464 "deactivating %s\n", sc->sc_dev.dv_xname, 465 dev->dv_xname), 466 DEBUG_DETACH); 467 error = config_deactivate(dev); 468 if (error) 469 goto out; 470 } 471 } 472 break; 473 } 474 out: 475 splx(s); 476 477 #ifdef ATADEBUG 478 if (dev != NULL && error != 0) 479 ATADEBUG_PRINT(("atabus_activate: %s: " 480 "error %d deactivating %s\n", sc->sc_dev.dv_xname, 481 error, dev->dv_xname), DEBUG_DETACH); 482 #endif /* ATADEBUG */ 483 484 return (error); 485 } 486 487 /* 488 * atabus_detach: 489 * 490 * Autoconfiguration detach routine. 491 */ 492 static int 493 atabus_detach(struct device *self, int flags) 494 { 495 struct atabus_softc *sc = (void *) self; 496 struct ata_channel *chp = sc->sc_chan; 497 struct device *dev = NULL; 498 int s, i, error = 0; 499 500 /* Shutdown the channel. */ 501 s = splbio(); /* XXX ALSO NEED AN INTERLOCK HERE. */ 502 chp->ch_flags |= ATACH_SHUTDOWN; 503 splx(s); 504 wakeup(&chp->ch_thread); 505 while (chp->ch_thread != NULL) 506 (void) tsleep((void *)&chp->ch_flags, PRIBIO, "atadown", 0); 507 508 /* 509 * Detach atapibus and its children. 510 */ 511 if ((dev = chp->atapibus) != NULL) { 512 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n", 513 sc->sc_dev.dv_xname, dev->dv_xname), DEBUG_DETACH); 514 error = config_detach(dev, flags); 515 if (error) 516 goto out; 517 } 518 519 /* 520 * Detach our other children. 521 */ 522 for (i = 0; i < chp->ch_ndrive; i++) { 523 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) 524 continue; 525 if ((dev = chp->ch_drive[i].drv_softc) != NULL) { 526 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n", 527 sc->sc_dev.dv_xname, dev->dv_xname), 528 DEBUG_DETACH); 529 error = config_detach(dev, flags); 530 if (error) 531 goto out; 532 } 533 } 534 535 out: 536 #ifdef ATADEBUG 537 if (dev != NULL && error != 0) 538 ATADEBUG_PRINT(("atabus_detach: %s: error %d detaching %s\n", 539 sc->sc_dev.dv_xname, error, dev->dv_xname), 540 DEBUG_DETACH); 541 #endif /* ATADEBUG */ 542 543 return (error); 544 } 545 546 CFATTACH_DECL(atabus, sizeof(struct atabus_softc), 547 atabus_match, atabus_attach, atabus_detach, atabus_activate); 548 549 /***************************************************************************** 550 * Common ATA bus operations. 551 *****************************************************************************/ 552 553 /* Get the disk's parameters */ 554 int 555 ata_get_params(struct ata_drive_datas *drvp, u_int8_t flags, 556 struct ataparams *prms) 557 { 558 char tb[DEV_BSIZE]; 559 struct ata_command ata_c; 560 struct ata_channel *chp = drvp->chnl_softc; 561 struct atac_softc *atac = chp->ch_atac; 562 563 #if BYTE_ORDER == LITTLE_ENDIAN 564 int i; 565 u_int16_t *p; 566 #endif 567 568 ATADEBUG_PRINT(("ata_get_parms\n"), DEBUG_FUNCS); 569 570 memset(tb, 0, DEV_BSIZE); 571 memset(prms, 0, sizeof(struct ataparams)); 572 memset(&ata_c, 0, sizeof(struct ata_command)); 573 574 if (drvp->drive_flags & DRIVE_ATA) { 575 ata_c.r_command = WDCC_IDENTIFY; 576 ata_c.r_st_bmask = WDCS_DRDY; 577 ata_c.r_st_pmask = 0; 578 ata_c.timeout = 3000; /* 3s */ 579 } else if (drvp->drive_flags & DRIVE_ATAPI) { 580 ata_c.r_command = ATAPI_IDENTIFY_DEVICE; 581 ata_c.r_st_bmask = 0; 582 ata_c.r_st_pmask = 0; 583 ata_c.timeout = 10000; /* 10s */ 584 } else { 585 ATADEBUG_PRINT(("ata_get_parms: no disks\n"), 586 DEBUG_FUNCS|DEBUG_PROBE); 587 return CMD_ERR; 588 } 589 ata_c.flags = AT_READ | flags; 590 ata_c.data = tb; 591 ata_c.bcount = DEV_BSIZE; 592 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 593 &ata_c) != ATACMD_COMPLETE) { 594 ATADEBUG_PRINT(("ata_get_parms: wdc_exec_command failed\n"), 595 DEBUG_FUNCS|DEBUG_PROBE); 596 return CMD_AGAIN; 597 } 598 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 599 ATADEBUG_PRINT(("ata_get_parms: ata_c.flags=0x%x\n", 600 ata_c.flags), DEBUG_FUNCS|DEBUG_PROBE); 601 return CMD_ERR; 602 } else { 603 /* if we didn't read any data something is wrong */ 604 if ((ata_c.flags & AT_XFDONE) == 0) 605 return CMD_ERR; 606 /* Read in parameter block. */ 607 memcpy(prms, tb, sizeof(struct ataparams)); 608 #if BYTE_ORDER == LITTLE_ENDIAN 609 /* 610 * Shuffle string byte order. 611 * ATAPI Mitsumi and NEC drives don't need this. 612 */ 613 if ((prms->atap_config & WDC_CFG_ATAPI_MASK) == 614 WDC_CFG_ATAPI && 615 ((prms->atap_model[0] == 'N' && 616 prms->atap_model[1] == 'E') || 617 (prms->atap_model[0] == 'F' && 618 prms->atap_model[1] == 'X'))) 619 return 0; 620 for (i = 0; i < sizeof(prms->atap_model); i += 2) { 621 p = (u_short *)(prms->atap_model + i); 622 *p = ntohs(*p); 623 } 624 for (i = 0; i < sizeof(prms->atap_serial); i += 2) { 625 p = (u_short *)(prms->atap_serial + i); 626 *p = ntohs(*p); 627 } 628 for (i = 0; i < sizeof(prms->atap_revision); i += 2) { 629 p = (u_short *)(prms->atap_revision + i); 630 *p = ntohs(*p); 631 } 632 #endif 633 return CMD_OK; 634 } 635 } 636 637 int 638 ata_set_mode(struct ata_drive_datas *drvp, u_int8_t mode, u_int8_t flags) 639 { 640 struct ata_command ata_c; 641 struct ata_channel *chp = drvp->chnl_softc; 642 struct atac_softc *atac = chp->ch_atac; 643 644 ATADEBUG_PRINT(("ata_set_mode=0x%x\n", mode), DEBUG_FUNCS); 645 memset(&ata_c, 0, sizeof(struct ata_command)); 646 647 ata_c.r_command = SET_FEATURES; 648 ata_c.r_st_bmask = 0; 649 ata_c.r_st_pmask = 0; 650 ata_c.r_features = WDSF_SET_MODE; 651 ata_c.r_count = mode; 652 ata_c.flags = flags; 653 ata_c.timeout = 1000; /* 1s */ 654 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 655 &ata_c) != ATACMD_COMPLETE) 656 return CMD_AGAIN; 657 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 658 return CMD_ERR; 659 } 660 return CMD_OK; 661 } 662 663 void 664 ata_dmaerr(struct ata_drive_datas *drvp, int flags) 665 { 666 /* 667 * Downgrade decision: if we get NERRS_MAX in NXFER. 668 * We start with n_dmaerrs set to NERRS_MAX-1 so that the 669 * first error within the first NXFER ops will immediatly trigger 670 * a downgrade. 671 * If we got an error and n_xfers is bigger than NXFER reset counters. 672 */ 673 drvp->n_dmaerrs++; 674 if (drvp->n_dmaerrs >= NERRS_MAX && drvp->n_xfers <= NXFER) { 675 ata_downgrade_mode(drvp, flags); 676 drvp->n_dmaerrs = NERRS_MAX-1; 677 drvp->n_xfers = 0; 678 return; 679 } 680 if (drvp->n_xfers > NXFER) { 681 drvp->n_dmaerrs = 1; /* just got an error */ 682 drvp->n_xfers = 1; /* restart counting from this error */ 683 } 684 } 685 686 /* 687 * Add a command to the queue and start controller. 688 * 689 * MUST BE CALLED AT splbio()! 690 */ 691 void 692 ata_exec_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 693 { 694 695 ATADEBUG_PRINT(("ata_exec_xfer %p channel %d drive %d\n", xfer, 696 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 697 698 /* complete xfer setup */ 699 xfer->c_chp = chp; 700 701 /* insert at the end of command list */ 702 TAILQ_INSERT_TAIL(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 703 ATADEBUG_PRINT(("atastart from ata_exec_xfer, flags 0x%x\n", 704 chp->ch_flags), DEBUG_XFERS); 705 atastart(chp); 706 } 707 708 /* 709 * Start I/O on a controller, for the given channel. 710 * The first xfer may be not for our channel if the channel queues 711 * are shared. 712 * 713 * MUST BE CALLED AT splbio()! 714 */ 715 void 716 atastart(struct ata_channel *chp) 717 { 718 struct atac_softc *atac = chp->ch_atac; 719 struct ata_xfer *xfer; 720 721 #ifdef ATA_DEBUG 722 int spl1, spl2; 723 724 spl1 = splbio(); 725 spl2 = splbio(); 726 if (spl2 != spl1) { 727 printf("atastart: not at splbio()\n"); 728 panic("atastart"); 729 } 730 splx(spl2); 731 splx(spl1); 732 #endif /* ATA_DEBUG */ 733 734 /* is there a xfer ? */ 735 if ((xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer)) == NULL) 736 return; 737 738 /* adjust chp, in case we have a shared queue */ 739 chp = xfer->c_chp; 740 741 if (chp->ch_queue->active_xfer != NULL) { 742 return; /* channel aleady active */ 743 } 744 if (__predict_false(chp->ch_queue->queue_freeze > 0)) { 745 return; /* queue froozen */ 746 } 747 #ifdef DIAGNOSTIC 748 if ((chp->ch_flags & ATACH_IRQ_WAIT) != 0) 749 panic("atastart: channel waiting for irq"); 750 #endif 751 if (atac->atac_claim_hw) 752 if (!(*atac->atac_claim_hw)(chp, 0)) 753 return; 754 755 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d\n", xfer, 756 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 757 if (chp->ch_drive[xfer->c_drive].drive_flags & DRIVE_RESET) { 758 chp->ch_drive[xfer->c_drive].drive_flags &= ~DRIVE_RESET; 759 chp->ch_drive[xfer->c_drive].state = 0; 760 } 761 chp->ch_queue->active_xfer = xfer; 762 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 763 764 if (atac->atac_cap & ATAC_CAP_NOIRQ) 765 KASSERT(xfer->c_flags & C_POLL); 766 xfer->c_start(chp, xfer); 767 } 768 769 struct ata_xfer * 770 ata_get_xfer(int flags) 771 { 772 struct ata_xfer *xfer; 773 int s; 774 775 s = splbio(); 776 xfer = pool_get(&ata_xfer_pool, 777 ((flags & ATAXF_NOSLEEP) != 0 ? PR_NOWAIT : PR_WAITOK)); 778 splx(s); 779 if (xfer != NULL) { 780 memset(xfer, 0, sizeof(struct ata_xfer)); 781 } 782 return xfer; 783 } 784 785 void 786 ata_free_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 787 { 788 struct atac_softc *atac = chp->ch_atac; 789 int s; 790 791 if (atac->atac_free_hw) 792 (*atac->atac_free_hw)(chp); 793 s = splbio(); 794 pool_put(&ata_xfer_pool, xfer); 795 splx(s); 796 } 797 798 /* 799 * Kill off all pending xfers for a ata_channel. 800 * 801 * Must be called at splbio(). 802 */ 803 void 804 ata_kill_pending(struct ata_drive_datas *drvp) 805 { 806 struct ata_channel *chp = drvp->chnl_softc; 807 struct ata_xfer *xfer, *next_xfer; 808 int s = splbio(); 809 810 for (xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer); 811 xfer != NULL; xfer = next_xfer) { 812 next_xfer = TAILQ_NEXT(xfer, c_xferchain); 813 if (xfer->c_chp != chp || xfer->c_drive != drvp->drive) 814 continue; 815 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 816 (*xfer->c_kill_xfer)(chp, xfer, KILL_GONE); 817 } 818 819 while ((xfer = chp->ch_queue->active_xfer) != NULL) { 820 if (xfer->c_chp == chp && xfer->c_drive == drvp->drive) { 821 drvp->drive_flags |= DRIVE_WAITDRAIN; 822 (void) tsleep(&chp->ch_queue->active_xfer, 823 PRIBIO, "atdrn", 0); 824 } else { 825 /* no more xfer for us */ 826 break; 827 } 828 } 829 splx(s); 830 } 831 832 /* 833 * ata_reset_channel: 834 * 835 * Reset and ATA channel. 836 * 837 * MUST BE CALLED AT splbio()! 838 */ 839 void 840 ata_reset_channel(struct ata_channel *chp, int flags) 841 { 842 struct atac_softc *atac = chp->ch_atac; 843 int drive; 844 845 #ifdef ATA_DEBUG 846 int spl1, spl2; 847 848 spl1 = splbio(); 849 spl2 = splbio(); 850 if (spl2 != spl1) { 851 printf("ata_reset_channel: not at splbio()\n"); 852 panic("ata_reset_channel"); 853 } 854 splx(spl2); 855 splx(spl1); 856 #endif /* ATA_DEBUG */ 857 858 chp->ch_queue->queue_freeze++; 859 860 /* 861 * If we can poll or wait it's OK, otherwise wake up the 862 * kernel thread to do it for us. 863 */ 864 if ((flags & (AT_POLL | AT_WAIT)) == 0) { 865 if (chp->ch_flags & ATACH_TH_RESET) { 866 /* No need to schedule a reset more than one time. */ 867 chp->ch_queue->queue_freeze--; 868 return; 869 } 870 chp->ch_flags |= ATACH_TH_RESET; 871 chp->ch_reset_flags = flags & (AT_RST_EMERG | AT_RST_NOCMD); 872 wakeup(&chp->ch_thread); 873 return; 874 } 875 876 (*atac->atac_bustype_ata->ata_reset_channel)(chp, flags); 877 878 for (drive = 0; drive < chp->ch_ndrive; drive++) 879 chp->ch_drive[drive].state = 0; 880 881 chp->ch_flags &= ~ATACH_TH_RESET; 882 if ((flags & AT_RST_EMERG) == 0) { 883 chp->ch_queue->queue_freeze--; 884 atastart(chp); 885 } else { 886 /* make sure that we can use polled commands */ 887 TAILQ_INIT(&chp->ch_queue->queue_xfer); 888 chp->ch_queue->queue_freeze = 0; 889 chp->ch_queue->active_xfer = NULL; 890 } 891 } 892 893 int 894 ata_addref(struct ata_channel *chp) 895 { 896 struct atac_softc *atac = chp->ch_atac; 897 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 898 int s, error = 0; 899 900 s = splbio(); 901 if (adapt->adapt_refcnt++ == 0 && 902 adapt->adapt_enable != NULL) { 903 error = (*adapt->adapt_enable)(&atac->atac_dev, 1); 904 if (error) 905 adapt->adapt_refcnt--; 906 } 907 splx(s); 908 return (error); 909 } 910 911 void 912 ata_delref(struct ata_channel *chp) 913 { 914 struct atac_softc *atac = chp->ch_atac; 915 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 916 int s; 917 918 s = splbio(); 919 if (adapt->adapt_refcnt-- == 1 && 920 adapt->adapt_enable != NULL) 921 (void) (*adapt->adapt_enable)(&atac->atac_dev, 0); 922 splx(s); 923 } 924 925 void 926 ata_print_modes(struct ata_channel *chp) 927 { 928 struct atac_softc *atac = chp->ch_atac; 929 int drive; 930 struct ata_drive_datas *drvp; 931 932 for (drive = 0; drive < 2; drive++) { 933 drvp = &chp->ch_drive[drive]; 934 if ((drvp->drive_flags & DRIVE) == 0) 935 continue; 936 aprint_normal("%s(%s:%d:%d): using PIO mode %d", 937 drvp->drv_softc->dv_xname, 938 atac->atac_dev.dv_xname, 939 chp->ch_channel, drive, drvp->PIO_mode); 940 if (drvp->drive_flags & DRIVE_DMA) 941 aprint_normal(", DMA mode %d", drvp->DMA_mode); 942 if (drvp->drive_flags & DRIVE_UDMA) { 943 aprint_normal(", Ultra-DMA mode %d", drvp->UDMA_mode); 944 if (drvp->UDMA_mode == 2) 945 aprint_normal(" (Ultra/33)"); 946 else if (drvp->UDMA_mode == 4) 947 aprint_normal(" (Ultra/66)"); 948 else if (drvp->UDMA_mode == 5) 949 aprint_normal(" (Ultra/100)"); 950 else if (drvp->UDMA_mode == 6) 951 aprint_normal(" (Ultra/133)"); 952 } 953 if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) 954 aprint_normal(" (using DMA data transfers)"); 955 aprint_normal("\n"); 956 } 957 } 958 959 /* 960 * downgrade the transfer mode of a drive after an error. return 1 if 961 * downgrade was possible, 0 otherwise. 962 * 963 * MUST BE CALLED AT splbio()! 964 */ 965 int 966 ata_downgrade_mode(struct ata_drive_datas *drvp, int flags) 967 { 968 struct ata_channel *chp = drvp->chnl_softc; 969 struct atac_softc *atac = chp->ch_atac; 970 struct device *drv_dev = drvp->drv_softc; 971 int cf_flags = drv_dev->dv_cfdata->cf_flags; 972 973 /* if drive or controller don't know its mode, we can't do much */ 974 if ((drvp->drive_flags & DRIVE_MODE) == 0 || 975 (atac->atac_set_modes == NULL)) 976 return 0; 977 /* current drive mode was set by a config flag, let it this way */ 978 if ((cf_flags & ATA_CONFIG_PIO_SET) || 979 (cf_flags & ATA_CONFIG_DMA_SET) || 980 (cf_flags & ATA_CONFIG_UDMA_SET)) 981 return 0; 982 983 /* 984 * If we were using Ultra-DMA mode, downgrade to the next lower mode. 985 */ 986 if ((drvp->drive_flags & DRIVE_UDMA) && drvp->UDMA_mode >= 2) { 987 drvp->UDMA_mode--; 988 printf("%s: transfer error, downgrading to Ultra-DMA mode %d\n", 989 drv_dev->dv_xname, drvp->UDMA_mode); 990 } 991 992 /* 993 * If we were using ultra-DMA, don't downgrade to multiword DMA. 994 */ 995 else if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) { 996 drvp->drive_flags &= ~(DRIVE_DMA | DRIVE_UDMA); 997 drvp->PIO_mode = drvp->PIO_cap; 998 printf("%s: transfer error, downgrading to PIO mode %d\n", 999 drv_dev->dv_xname, drvp->PIO_mode); 1000 } else /* already using PIO, can't downgrade */ 1001 return 0; 1002 1003 (*atac->atac_set_modes)(chp); 1004 ata_print_modes(chp); 1005 /* reset the channel, which will shedule all drives for setup */ 1006 ata_reset_channel(chp, flags | AT_RST_NOCMD); 1007 return 1; 1008 } 1009 1010 /* 1011 * Probe drive's capabilities, for use by the controller later 1012 * Assumes drvp points to an existing drive. 1013 */ 1014 void 1015 ata_probe_caps(struct ata_drive_datas *drvp) 1016 { 1017 struct ataparams params, params2; 1018 struct ata_channel *chp = drvp->chnl_softc; 1019 struct atac_softc *atac = chp->ch_atac; 1020 struct device *drv_dev = drvp->drv_softc; 1021 int i, printed, s; 1022 char *sep = ""; 1023 int cf_flags; 1024 1025 if (ata_get_params(drvp, AT_WAIT, ¶ms) != CMD_OK) { 1026 /* IDENTIFY failed. Can't tell more about the device */ 1027 return; 1028 } 1029 if ((atac->atac_cap & (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) == 1030 (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) { 1031 /* 1032 * Controller claims 16 and 32 bit transfers. 1033 * Re-do an IDENTIFY with 32-bit transfers, 1034 * and compare results. 1035 */ 1036 s = splbio(); 1037 drvp->drive_flags |= DRIVE_CAP32; 1038 splx(s); 1039 ata_get_params(drvp, AT_WAIT, ¶ms2); 1040 if (memcmp(¶ms, ¶ms2, sizeof(struct ataparams)) != 0) { 1041 /* Not good. fall back to 16bits */ 1042 s = splbio(); 1043 drvp->drive_flags &= ~DRIVE_CAP32; 1044 splx(s); 1045 } else { 1046 aprint_normal("%s: 32-bit data port\n", 1047 drv_dev->dv_xname); 1048 } 1049 } 1050 #if 0 /* Some ultra-DMA drives claims to only support ATA-3. sigh */ 1051 if (params.atap_ata_major > 0x01 && 1052 params.atap_ata_major != 0xffff) { 1053 for (i = 14; i > 0; i--) { 1054 if (params.atap_ata_major & (1 << i)) { 1055 aprint_normal("%s: ATA version %d\n", 1056 drv_dev->dv_xname, i); 1057 drvp->ata_vers = i; 1058 break; 1059 } 1060 } 1061 } 1062 #endif 1063 1064 /* An ATAPI device is at last PIO mode 3 */ 1065 if (drvp->drive_flags & DRIVE_ATAPI) 1066 drvp->PIO_mode = 3; 1067 1068 /* 1069 * It's not in the specs, but it seems that some drive 1070 * returns 0xffff in atap_extensions when this field is invalid 1071 */ 1072 if (params.atap_extensions != 0xffff && 1073 (params.atap_extensions & WDC_EXT_MODES)) { 1074 printed = 0; 1075 /* 1076 * XXX some drives report something wrong here (they claim to 1077 * support PIO mode 8 !). As mode is coded on 3 bits in 1078 * SET FEATURE, limit it to 7 (so limit i to 4). 1079 * If higher mode than 7 is found, abort. 1080 */ 1081 for (i = 7; i >= 0; i--) { 1082 if ((params.atap_piomode_supp & (1 << i)) == 0) 1083 continue; 1084 if (i > 4) 1085 return; 1086 /* 1087 * See if mode is accepted. 1088 * If the controller can't set its PIO mode, 1089 * assume the defaults are good, so don't try 1090 * to set it 1091 */ 1092 if (atac->atac_set_modes) 1093 /* 1094 * It's OK to pool here, it's fast enouth 1095 * to not bother waiting for interrupt 1096 */ 1097 if (ata_set_mode(drvp, 0x08 | (i + 3), 1098 AT_WAIT) != CMD_OK) 1099 continue; 1100 if (!printed) { 1101 aprint_normal("%s: drive supports PIO mode %d", 1102 drv_dev->dv_xname, i + 3); 1103 sep = ","; 1104 printed = 1; 1105 } 1106 /* 1107 * If controller's driver can't set its PIO mode, 1108 * get the highter one for the drive. 1109 */ 1110 if (atac->atac_set_modes == NULL || 1111 atac->atac_pio_cap >= i + 3) { 1112 drvp->PIO_mode = i + 3; 1113 drvp->PIO_cap = i + 3; 1114 break; 1115 } 1116 } 1117 if (!printed) { 1118 /* 1119 * We didn't find a valid PIO mode. 1120 * Assume the values returned for DMA are buggy too 1121 */ 1122 return; 1123 } 1124 s = splbio(); 1125 drvp->drive_flags |= DRIVE_MODE; 1126 splx(s); 1127 printed = 0; 1128 for (i = 7; i >= 0; i--) { 1129 if ((params.atap_dmamode_supp & (1 << i)) == 0) 1130 continue; 1131 if ((atac->atac_cap & ATAC_CAP_DMA) && 1132 atac->atac_set_modes != NULL) 1133 if (ata_set_mode(drvp, 0x20 | i, AT_WAIT) 1134 != CMD_OK) 1135 continue; 1136 if (!printed) { 1137 aprint_normal("%s DMA mode %d", sep, i); 1138 sep = ","; 1139 printed = 1; 1140 } 1141 if (atac->atac_cap & ATAC_CAP_DMA) { 1142 if (atac->atac_set_modes != NULL && 1143 atac->atac_dma_cap < i) 1144 continue; 1145 drvp->DMA_mode = i; 1146 drvp->DMA_cap = i; 1147 s = splbio(); 1148 drvp->drive_flags |= DRIVE_DMA; 1149 splx(s); 1150 } 1151 break; 1152 } 1153 if (params.atap_extensions & WDC_EXT_UDMA_MODES) { 1154 printed = 0; 1155 for (i = 7; i >= 0; i--) { 1156 if ((params.atap_udmamode_supp & (1 << i)) 1157 == 0) 1158 continue; 1159 if (atac->atac_set_modes != NULL && 1160 (atac->atac_cap & ATAC_CAP_UDMA)) 1161 if (ata_set_mode(drvp, 0x40 | i, 1162 AT_WAIT) != CMD_OK) 1163 continue; 1164 if (!printed) { 1165 aprint_normal("%s Ultra-DMA mode %d", 1166 sep, i); 1167 if (i == 2) 1168 aprint_normal(" (Ultra/33)"); 1169 else if (i == 4) 1170 aprint_normal(" (Ultra/66)"); 1171 else if (i == 5) 1172 aprint_normal(" (Ultra/100)"); 1173 else if (i == 6) 1174 aprint_normal(" (Ultra/133)"); 1175 sep = ","; 1176 printed = 1; 1177 } 1178 if (atac->atac_cap & ATAC_CAP_UDMA) { 1179 if (atac->atac_set_modes != NULL && 1180 atac->atac_udma_cap < i) 1181 continue; 1182 drvp->UDMA_mode = i; 1183 drvp->UDMA_cap = i; 1184 s = splbio(); 1185 drvp->drive_flags |= DRIVE_UDMA; 1186 splx(s); 1187 } 1188 break; 1189 } 1190 } 1191 aprint_normal("\n"); 1192 } 1193 1194 s = splbio(); 1195 drvp->drive_flags &= ~DRIVE_NOSTREAM; 1196 if (drvp->drive_flags & DRIVE_ATAPI) { 1197 if (atac->atac_cap & ATAC_CAP_ATAPI_NOSTREAM) 1198 drvp->drive_flags |= DRIVE_NOSTREAM; 1199 } else { 1200 if (atac->atac_cap & ATAC_CAP_ATA_NOSTREAM) 1201 drvp->drive_flags |= DRIVE_NOSTREAM; 1202 } 1203 splx(s); 1204 1205 /* Try to guess ATA version here, if it didn't get reported */ 1206 if (drvp->ata_vers == 0) { 1207 if (drvp->drive_flags & DRIVE_UDMA) 1208 drvp->ata_vers = 4; /* should be at last ATA-4 */ 1209 else if (drvp->PIO_cap > 2) 1210 drvp->ata_vers = 2; /* should be at last ATA-2 */ 1211 } 1212 cf_flags = drv_dev->dv_cfdata->cf_flags; 1213 if (cf_flags & ATA_CONFIG_PIO_SET) { 1214 s = splbio(); 1215 drvp->PIO_mode = 1216 (cf_flags & ATA_CONFIG_PIO_MODES) >> ATA_CONFIG_PIO_OFF; 1217 drvp->drive_flags |= DRIVE_MODE; 1218 splx(s); 1219 } 1220 if ((atac->atac_cap & ATAC_CAP_DMA) == 0) { 1221 /* don't care about DMA modes */ 1222 return; 1223 } 1224 if (cf_flags & ATA_CONFIG_DMA_SET) { 1225 s = splbio(); 1226 if ((cf_flags & ATA_CONFIG_DMA_MODES) == 1227 ATA_CONFIG_DMA_DISABLE) { 1228 drvp->drive_flags &= ~DRIVE_DMA; 1229 } else { 1230 drvp->DMA_mode = (cf_flags & ATA_CONFIG_DMA_MODES) >> 1231 ATA_CONFIG_DMA_OFF; 1232 drvp->drive_flags |= DRIVE_DMA | DRIVE_MODE; 1233 } 1234 splx(s); 1235 } 1236 if ((atac->atac_cap & ATAC_CAP_UDMA) == 0) { 1237 /* don't care about UDMA modes */ 1238 return; 1239 } 1240 if (cf_flags & ATA_CONFIG_UDMA_SET) { 1241 s = splbio(); 1242 if ((cf_flags & ATA_CONFIG_UDMA_MODES) == 1243 ATA_CONFIG_UDMA_DISABLE) { 1244 drvp->drive_flags &= ~DRIVE_UDMA; 1245 } else { 1246 drvp->UDMA_mode = (cf_flags & ATA_CONFIG_UDMA_MODES) >> 1247 ATA_CONFIG_UDMA_OFF; 1248 drvp->drive_flags |= DRIVE_UDMA | DRIVE_MODE; 1249 } 1250 splx(s); 1251 } 1252 } 1253 1254 /* management of the /dev/atabus* devices */ 1255 int 1256 atabusopen(dev_t dev, int flag, int fmt, struct proc *p) 1257 { 1258 struct atabus_softc *sc; 1259 int error, unit = minor(dev); 1260 1261 if (unit >= atabus_cd.cd_ndevs || 1262 (sc = atabus_cd.cd_devs[unit]) == NULL) 1263 return (ENXIO); 1264 1265 if (sc->sc_flags & ATABUSCF_OPEN) 1266 return (EBUSY); 1267 1268 if ((error = ata_addref(sc->sc_chan)) != 0) 1269 return (error); 1270 1271 sc->sc_flags |= ATABUSCF_OPEN; 1272 1273 return (0); 1274 } 1275 1276 1277 int 1278 atabusclose(dev_t dev, int flag, int fmt, struct proc *p) 1279 { 1280 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)]; 1281 1282 ata_delref(sc->sc_chan); 1283 1284 sc->sc_flags &= ~ATABUSCF_OPEN; 1285 1286 return (0); 1287 } 1288 1289 int 1290 atabusioctl(dev_t dev, u_long cmd, caddr_t addr, int flag, struct proc *p) 1291 { 1292 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)]; 1293 struct ata_channel *chp = sc->sc_chan; 1294 int min_drive, max_drive, drive; 1295 int error; 1296 int s; 1297 1298 /* 1299 * Enforce write permission for ioctls that change the 1300 * state of the bus. Host adapter specific ioctls must 1301 * be checked by the adapter driver. 1302 */ 1303 switch (cmd) { 1304 case ATABUSIOSCAN: 1305 case ATABUSIODETACH: 1306 case ATABUSIORESET: 1307 if ((flag & FWRITE) == 0) 1308 return (EBADF); 1309 } 1310 1311 switch (cmd) { 1312 case ATABUSIORESET: 1313 s = splbio(); 1314 ata_reset_channel(sc->sc_chan, AT_WAIT | AT_POLL); 1315 splx(s); 1316 error = 0; 1317 break; 1318 case ATABUSIOSCAN: 1319 { 1320 #if 0 1321 struct atabusioscan_args *a= 1322 (struct atabusioscan_args *)addr; 1323 #endif 1324 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) || 1325 (chp->ch_drive[1].drive_flags & DRIVE_OLD)) 1326 return (EOPNOTSUPP); 1327 return (EOPNOTSUPP); 1328 } 1329 case ATABUSIODETACH: 1330 { 1331 struct atabusioscan_args *a= 1332 (struct atabusioscan_args *)addr; 1333 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) || 1334 (chp->ch_drive[1].drive_flags & DRIVE_OLD)) 1335 return (EOPNOTSUPP); 1336 switch (a->at_dev) { 1337 case -1: 1338 min_drive = 0; 1339 max_drive = 1; 1340 break; 1341 case 0: 1342 case 1: 1343 min_drive = max_drive = a->at_dev; 1344 break; 1345 default: 1346 return (EINVAL); 1347 } 1348 for (drive = min_drive; drive <= max_drive; drive++) { 1349 if (chp->ch_drive[drive].drv_softc != NULL) { 1350 error = config_detach( 1351 chp->ch_drive[drive].drv_softc, 0); 1352 if (error) 1353 return (error); 1354 chp->ch_drive[drive].drv_softc = NULL; 1355 } 1356 } 1357 error = 0; 1358 break; 1359 } 1360 default: 1361 error = ENOTTY; 1362 } 1363 return (error); 1364 }; 1365