1 /* $NetBSD: ata.c,v 1.130 2014/03/16 05:20:27 dholland Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __KERNEL_RCSID(0, "$NetBSD: ata.c,v 1.130 2014/03/16 05:20:27 dholland Exp $"); 29 30 #include "opt_ata.h" 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/kernel.h> 35 #include <sys/malloc.h> 36 #include <sys/device.h> 37 #include <sys/conf.h> 38 #include <sys/fcntl.h> 39 #include <sys/proc.h> 40 #include <sys/pool.h> 41 #include <sys/kthread.h> 42 #include <sys/errno.h> 43 #include <sys/ataio.h> 44 #include <sys/kmem.h> 45 #include <sys/intr.h> 46 #include <sys/bus.h> 47 #include <sys/once.h> 48 49 #include <dev/ata/ataconf.h> 50 #include <dev/ata/atareg.h> 51 #include <dev/ata/atavar.h> 52 #include <dev/ic/wdcvar.h> /* for PIOBM */ 53 54 #include "locators.h" 55 56 #include "atapibus.h" 57 #include "ataraid.h" 58 #include "sata_pmp.h" 59 60 #if NATARAID > 0 61 #include <dev/ata/ata_raidvar.h> 62 #endif 63 #if NSATA_PMP > 0 64 #include <dev/ata/satapmpvar.h> 65 #endif 66 #include <dev/ata/satapmpreg.h> 67 68 #define DEBUG_FUNCS 0x08 69 #define DEBUG_PROBE 0x10 70 #define DEBUG_DETACH 0x20 71 #define DEBUG_XFERS 0x40 72 #ifdef ATADEBUG 73 #ifndef ATADEBUG_MASK 74 #define ATADEBUG_MASK 0 75 #endif 76 int atadebug_mask = ATADEBUG_MASK; 77 #define ATADEBUG_PRINT(args, level) \ 78 if (atadebug_mask & (level)) \ 79 printf args 80 #else 81 #define ATADEBUG_PRINT(args, level) 82 #endif 83 84 static ONCE_DECL(ata_init_ctrl); 85 static struct pool ata_xfer_pool; 86 87 /* 88 * A queue of atabus instances, used to ensure the same bus probe order 89 * for a given hardware configuration at each boot. Kthread probing 90 * devices on a atabus. Only one probing at once. 91 */ 92 static TAILQ_HEAD(, atabus_initq) atabus_initq_head; 93 static kmutex_t atabus_qlock; 94 static kcondvar_t atabus_qcv; 95 static lwp_t * atabus_cfg_lwp; 96 97 /***************************************************************************** 98 * ATA bus layer. 99 * 100 * ATA controllers attach an atabus instance, which handles probing the bus 101 * for drives, etc. 102 *****************************************************************************/ 103 104 dev_type_open(atabusopen); 105 dev_type_close(atabusclose); 106 dev_type_ioctl(atabusioctl); 107 108 const struct cdevsw atabus_cdevsw = { 109 .d_open = atabusopen, 110 .d_close = atabusclose, 111 .d_read = noread, 112 .d_write = nowrite, 113 .d_ioctl = atabusioctl, 114 .d_stop = nostop, 115 .d_tty = notty, 116 .d_poll = nopoll, 117 .d_mmap = nommap, 118 .d_kqfilter = nokqfilter, 119 .d_flag = D_OTHER 120 }; 121 122 extern struct cfdriver atabus_cd; 123 124 static void atabus_childdetached(device_t, device_t); 125 static int atabus_rescan(device_t, const char *, const int *); 126 static bool atabus_resume(device_t, const pmf_qual_t *); 127 static bool atabus_suspend(device_t, const pmf_qual_t *); 128 static void atabusconfig_thread(void *); 129 130 /* 131 * atabus_init: 132 * 133 * Initialize ATA subsystem structures. 134 */ 135 static int 136 atabus_init(void) 137 { 138 139 pool_init(&ata_xfer_pool, sizeof(struct ata_xfer), 0, 0, 0, 140 "ataspl", NULL, IPL_BIO); 141 TAILQ_INIT(&atabus_initq_head); 142 mutex_init(&atabus_qlock, MUTEX_DEFAULT, IPL_NONE); 143 cv_init(&atabus_qcv, "atainitq"); 144 return 0; 145 } 146 147 /* 148 * atabusprint: 149 * 150 * Autoconfiguration print routine used by ATA controllers when 151 * attaching an atabus instance. 152 */ 153 int 154 atabusprint(void *aux, const char *pnp) 155 { 156 struct ata_channel *chan = aux; 157 158 if (pnp) 159 aprint_normal("atabus at %s", pnp); 160 aprint_normal(" channel %d", chan->ch_channel); 161 162 return (UNCONF); 163 } 164 165 /* 166 * ataprint: 167 * 168 * Autoconfiguration print routine. 169 */ 170 int 171 ataprint(void *aux, const char *pnp) 172 { 173 struct ata_device *adev = aux; 174 175 if (pnp) 176 aprint_normal("wd at %s", pnp); 177 aprint_normal(" drive %d", adev->adev_drv_data->drive); 178 179 return (UNCONF); 180 } 181 182 /* 183 * ata_channel_attach: 184 * 185 * Common parts of attaching an atabus to an ATA controller channel. 186 */ 187 void 188 ata_channel_attach(struct ata_channel *chp) 189 { 190 191 if (chp->ch_flags & ATACH_DISABLED) 192 return; 193 194 /* XXX callout_destroy */ 195 callout_init(&chp->ch_callout, 0); 196 197 TAILQ_INIT(&chp->ch_queue->queue_xfer); 198 chp->ch_queue->queue_freeze = 0; 199 chp->ch_queue->queue_flags = 0; 200 chp->ch_queue->active_xfer = NULL; 201 202 chp->atabus = config_found_ia(chp->ch_atac->atac_dev, "ata", chp, 203 atabusprint); 204 } 205 206 static void 207 atabusconfig(struct atabus_softc *atabus_sc) 208 { 209 struct ata_channel *chp = atabus_sc->sc_chan; 210 struct atac_softc *atac = chp->ch_atac; 211 struct atabus_initq *atabus_initq = NULL; 212 int i, s, error; 213 214 /* we are in the atabus's thread context */ 215 s = splbio(); 216 chp->ch_flags |= ATACH_TH_RUN; 217 splx(s); 218 219 /* 220 * Probe for the drives attached to controller, unless a PMP 221 * is already known 222 */ 223 /* XXX for SATA devices we will power up all drives at once */ 224 if (chp->ch_satapmp_nports == 0) 225 (*atac->atac_probe)(chp); 226 227 if (chp->ch_ndrives >= 2) { 228 ATADEBUG_PRINT(("atabusattach: ch_drive_type 0x%x 0x%x\n", 229 chp->ch_drive[0].drive_type, chp->ch_drive[1].drive_type), 230 DEBUG_PROBE); 231 } 232 233 /* next operations will occurs in a separate thread */ 234 s = splbio(); 235 chp->ch_flags &= ~ATACH_TH_RUN; 236 splx(s); 237 238 /* Make sure the devices probe in atabus order to avoid jitter. */ 239 mutex_enter(&atabus_qlock); 240 for (;;) { 241 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 242 if (atabus_initq->atabus_sc == atabus_sc) 243 break; 244 cv_wait(&atabus_qcv, &atabus_qlock); 245 } 246 mutex_exit(&atabus_qlock); 247 248 /* If no drives, abort here */ 249 if (chp->ch_drive == NULL) 250 goto out; 251 KASSERT(chp->ch_ndrives == 0 || chp->ch_drive != NULL); 252 for (i = 0; i < chp->ch_ndrives; i++) 253 if (chp->ch_drive[i].drive_type != ATA_DRIVET_NONE) 254 break; 255 if (i == chp->ch_ndrives) 256 goto out; 257 258 /* Shortcut in case we've been shutdown */ 259 if (chp->ch_flags & ATACH_SHUTDOWN) 260 goto out; 261 262 if ((error = kthread_create(PRI_NONE, 0, NULL, atabusconfig_thread, 263 atabus_sc, &atabus_cfg_lwp, 264 "%scnf", device_xname(atac->atac_dev))) != 0) 265 aprint_error_dev(atac->atac_dev, 266 "unable to create config thread: error %d\n", error); 267 return; 268 269 out: 270 mutex_enter(&atabus_qlock); 271 TAILQ_REMOVE(&atabus_initq_head, atabus_initq, atabus_initq); 272 cv_broadcast(&atabus_qcv); 273 mutex_exit(&atabus_qlock); 274 275 free(atabus_initq, M_DEVBUF); 276 277 ata_delref(chp); 278 279 config_pending_decr(atac->atac_dev); 280 } 281 282 /* 283 * atabus_configthread: finish attach of atabus's childrens, in a separate 284 * kernel thread. 285 */ 286 static void 287 atabusconfig_thread(void *arg) 288 { 289 struct atabus_softc *atabus_sc = arg; 290 struct ata_channel *chp = atabus_sc->sc_chan; 291 struct atac_softc *atac = chp->ch_atac; 292 struct atabus_initq *atabus_initq = NULL; 293 int i, s; 294 295 /* XXX seems wrong */ 296 mutex_enter(&atabus_qlock); 297 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 298 KASSERT(atabus_initq->atabus_sc == atabus_sc); 299 mutex_exit(&atabus_qlock); 300 301 /* 302 * First look for a port multiplier 303 */ 304 if (chp->ch_ndrives == PMP_MAX_DRIVES && 305 chp->ch_drive[PMP_PORT_CTL].drive_type == ATA_DRIVET_PM) { 306 #if NSATA_PMP > 0 307 satapmp_attach(chp); 308 #else 309 aprint_error_dev(atabus_sc->sc_dev, 310 "SATA port multiplier not supported\n"); 311 /* no problems going on, all drives are ATA_DRIVET_NONE */ 312 #endif 313 } 314 315 /* 316 * Attach an ATAPI bus, if needed. 317 */ 318 KASSERT(chp->ch_ndrives == 0 || chp->ch_drive != NULL); 319 for (i = 0; i < chp->ch_ndrives && chp->atapibus == NULL; i++) { 320 if (chp->ch_drive[i].drive_type == ATA_DRIVET_ATAPI) { 321 #if NATAPIBUS > 0 322 (*atac->atac_atapibus_attach)(atabus_sc); 323 #else 324 /* 325 * Fake the autoconfig "not configured" message 326 */ 327 aprint_normal("atapibus at %s not configured\n", 328 device_xname(atac->atac_dev)); 329 chp->atapibus = NULL; 330 s = splbio(); 331 for (i = 0; i < chp->ch_ndrives; i++) { 332 if (chp->ch_drive[i].drive_type == ATA_DRIVET_ATAPI) 333 chp->ch_drive[i].drive_type = ATA_DRIVET_NONE; 334 } 335 splx(s); 336 #endif 337 break; 338 } 339 } 340 341 for (i = 0; i < chp->ch_ndrives; i++) { 342 struct ata_device adev; 343 if (chp->ch_drive[i].drive_type != ATA_DRIVET_ATA && 344 chp->ch_drive[i].drive_type != ATA_DRIVET_OLD) { 345 continue; 346 } 347 if (chp->ch_drive[i].drv_softc != NULL) 348 continue; 349 memset(&adev, 0, sizeof(struct ata_device)); 350 adev.adev_bustype = atac->atac_bustype_ata; 351 adev.adev_channel = chp->ch_channel; 352 adev.adev_openings = 1; 353 adev.adev_drv_data = &chp->ch_drive[i]; 354 chp->ch_drive[i].drv_softc = config_found_ia(atabus_sc->sc_dev, 355 "ata_hl", &adev, ataprint); 356 if (chp->ch_drive[i].drv_softc != NULL) { 357 ata_probe_caps(&chp->ch_drive[i]); 358 } else { 359 s = splbio(); 360 chp->ch_drive[i].drive_type = ATA_DRIVET_NONE; 361 splx(s); 362 } 363 } 364 365 /* now that we know the drives, the controller can set its modes */ 366 if (atac->atac_set_modes) { 367 (*atac->atac_set_modes)(chp); 368 ata_print_modes(chp); 369 } 370 #if NATARAID > 0 371 if (atac->atac_cap & ATAC_CAP_RAID) { 372 for (i = 0; i < chp->ch_ndrives; i++) { 373 if (chp->ch_drive[i].drive_type == ATA_DRIVET_ATA) { 374 ata_raid_check_component( 375 chp->ch_drive[i].drv_softc); 376 } 377 } 378 } 379 #endif /* NATARAID > 0 */ 380 381 /* 382 * reset drive_flags for unattached devices, reset state for attached 383 * ones 384 */ 385 s = splbio(); 386 for (i = 0; i < chp->ch_ndrives; i++) { 387 if (chp->ch_drive[i].drive_type == ATA_DRIVET_PM) 388 continue; 389 if (chp->ch_drive[i].drv_softc == NULL) { 390 chp->ch_drive[i].drive_flags = 0; 391 chp->ch_drive[i].drive_type = ATA_DRIVET_NONE; 392 } else 393 chp->ch_drive[i].state = 0; 394 } 395 splx(s); 396 397 mutex_enter(&atabus_qlock); 398 TAILQ_REMOVE(&atabus_initq_head, atabus_initq, atabus_initq); 399 cv_broadcast(&atabus_qcv); 400 mutex_exit(&atabus_qlock); 401 402 free(atabus_initq, M_DEVBUF); 403 404 ata_delref(chp); 405 406 config_pending_decr(atac->atac_dev); 407 kthread_exit(0); 408 } 409 410 /* 411 * atabus_thread: 412 * 413 * Worker thread for the ATA bus. 414 */ 415 static void 416 atabus_thread(void *arg) 417 { 418 struct atabus_softc *sc = arg; 419 struct ata_channel *chp = sc->sc_chan; 420 struct ata_xfer *xfer; 421 int i, s; 422 423 s = splbio(); 424 chp->ch_flags |= ATACH_TH_RUN; 425 426 /* 427 * Probe the drives. Reset type to indicate to controllers 428 * that can re-probe that all drives must be probed.. 429 * 430 * Note: ch_ndrives may be changed during the probe. 431 */ 432 KASSERT(chp->ch_ndrives == 0 || chp->ch_drive != NULL); 433 for (i = 0; i < chp->ch_ndrives; i++) { 434 chp->ch_drive[i].drive_flags = 0; 435 chp->ch_drive[i].drive_type = ATA_DRIVET_NONE; 436 } 437 splx(s); 438 439 atabusconfig(sc); 440 441 s = splbio(); 442 for (;;) { 443 if ((chp->ch_flags & (ATACH_TH_RESET | ATACH_SHUTDOWN)) == 0 && 444 (chp->ch_queue->active_xfer == NULL || 445 chp->ch_queue->queue_freeze == 0)) { 446 chp->ch_flags &= ~ATACH_TH_RUN; 447 (void) tsleep(&chp->ch_thread, PRIBIO, "atath", 0); 448 chp->ch_flags |= ATACH_TH_RUN; 449 } 450 if (chp->ch_flags & ATACH_SHUTDOWN) { 451 break; 452 } 453 if (chp->ch_flags & ATACH_TH_RESCAN) { 454 atabusconfig(sc); 455 chp->ch_flags &= ~ATACH_TH_RESCAN; 456 } 457 if (chp->ch_flags & ATACH_TH_RESET) { 458 /* 459 * ata_reset_channel() will freeze 2 times, so 460 * unfreeze one time. Not a problem as we're at splbio 461 */ 462 chp->ch_queue->queue_freeze--; 463 ata_reset_channel(chp, AT_WAIT | chp->ch_reset_flags); 464 } else if (chp->ch_queue->active_xfer != NULL && 465 chp->ch_queue->queue_freeze == 1) { 466 /* 467 * Caller has bumped queue_freeze, decrease it. 468 */ 469 chp->ch_queue->queue_freeze--; 470 xfer = chp->ch_queue->active_xfer; 471 KASSERT(xfer != NULL); 472 (*xfer->c_start)(xfer->c_chp, xfer); 473 } else if (chp->ch_queue->queue_freeze > 1) 474 panic("ata_thread: queue_freeze"); 475 } 476 splx(s); 477 chp->ch_thread = NULL; 478 wakeup(&chp->ch_flags); 479 kthread_exit(0); 480 } 481 482 /* 483 * atabus_match: 484 * 485 * Autoconfiguration match routine. 486 */ 487 static int 488 atabus_match(device_t parent, cfdata_t cf, void *aux) 489 { 490 struct ata_channel *chp = aux; 491 492 if (chp == NULL) 493 return (0); 494 495 if (cf->cf_loc[ATACF_CHANNEL] != chp->ch_channel && 496 cf->cf_loc[ATACF_CHANNEL] != ATACF_CHANNEL_DEFAULT) 497 return (0); 498 499 return (1); 500 } 501 502 /* 503 * atabus_attach: 504 * 505 * Autoconfiguration attach routine. 506 */ 507 static void 508 atabus_attach(device_t parent, device_t self, void *aux) 509 { 510 struct atabus_softc *sc = device_private(self); 511 struct ata_channel *chp = aux; 512 struct atabus_initq *initq; 513 int error; 514 515 sc->sc_chan = chp; 516 517 aprint_normal("\n"); 518 aprint_naive("\n"); 519 520 sc->sc_dev = self; 521 522 if (ata_addref(chp)) 523 return; 524 525 RUN_ONCE(&ata_init_ctrl, atabus_init); 526 527 initq = malloc(sizeof(*initq), M_DEVBUF, M_WAITOK); 528 initq->atabus_sc = sc; 529 TAILQ_INSERT_TAIL(&atabus_initq_head, initq, atabus_initq); 530 config_pending_incr(sc->sc_dev); 531 532 if ((error = kthread_create(PRI_NONE, 0, NULL, atabus_thread, sc, 533 &chp->ch_thread, "%s", device_xname(self))) != 0) 534 aprint_error_dev(self, 535 "unable to create kernel thread: error %d\n", error); 536 537 if (!pmf_device_register(self, atabus_suspend, atabus_resume)) 538 aprint_error_dev(self, "couldn't establish power handler\n"); 539 } 540 541 /* 542 * atabus_detach: 543 * 544 * Autoconfiguration detach routine. 545 */ 546 static int 547 atabus_detach(device_t self, int flags) 548 { 549 struct atabus_softc *sc = device_private(self); 550 struct ata_channel *chp = sc->sc_chan; 551 device_t dev = NULL; 552 int s, i, error = 0; 553 554 /* Shutdown the channel. */ 555 s = splbio(); /* XXX ALSO NEED AN INTERLOCK HERE. */ 556 chp->ch_flags |= ATACH_SHUTDOWN; 557 splx(s); 558 559 wakeup(&chp->ch_thread); 560 561 while (chp->ch_thread != NULL) 562 (void) tsleep(&chp->ch_flags, PRIBIO, "atadown", 0); 563 564 565 /* 566 * Detach atapibus and its children. 567 */ 568 if ((dev = chp->atapibus) != NULL) { 569 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n", 570 device_xname(self), device_xname(dev)), DEBUG_DETACH); 571 572 error = config_detach(dev, flags); 573 if (error) 574 goto out; 575 KASSERT(chp->atapibus == NULL); 576 } 577 578 KASSERT(chp->ch_ndrives == 0 || chp->ch_drive != NULL); 579 580 /* 581 * Detach our other children. 582 */ 583 for (i = 0; i < chp->ch_ndrives; i++) { 584 if (chp->ch_drive[i].drive_type == ATA_DRIVET_ATAPI) 585 continue; 586 if (chp->ch_drive[i].drive_type == ATA_DRIVET_PM) 587 chp->ch_drive[i].drive_type = ATA_DRIVET_NONE; 588 if ((dev = chp->ch_drive[i].drv_softc) != NULL) { 589 ATADEBUG_PRINT(("%s.%d: %s: detaching %s\n", __func__, 590 __LINE__, device_xname(self), device_xname(dev)), 591 DEBUG_DETACH); 592 error = config_detach(dev, flags); 593 if (error) 594 goto out; 595 KASSERT(chp->ch_drive[i].drv_softc == NULL); 596 KASSERT(chp->ch_drive[i].drive_type == 0); 597 } 598 } 599 atabus_free_drives(chp); 600 601 out: 602 #ifdef ATADEBUG 603 if (dev != NULL && error != 0) 604 ATADEBUG_PRINT(("%s: %s: error %d detaching %s\n", __func__, 605 device_xname(self), error, device_xname(dev)), 606 DEBUG_DETACH); 607 #endif /* ATADEBUG */ 608 609 return (error); 610 } 611 612 void 613 atabus_childdetached(device_t self, device_t child) 614 { 615 bool found = false; 616 struct atabus_softc *sc = device_private(self); 617 struct ata_channel *chp = sc->sc_chan; 618 int i; 619 620 KASSERT(chp->ch_ndrives == 0 || chp->ch_drive != NULL); 621 /* 622 * atapibus detached. 623 */ 624 if (child == chp->atapibus) { 625 chp->atapibus = NULL; 626 found = true; 627 for (i = 0; i < chp->ch_ndrives; i++) { 628 if (chp->ch_drive[i].drive_type != ATA_DRIVET_ATAPI) 629 continue; 630 KASSERT(chp->ch_drive[i].drv_softc != NULL); 631 chp->ch_drive[i].drv_softc = NULL; 632 chp->ch_drive[i].drive_flags = 0; 633 chp->ch_drive[i].drive_type = ATA_DRIVET_NONE; 634 } 635 } 636 637 /* 638 * Detach our other children. 639 */ 640 for (i = 0; i < chp->ch_ndrives; i++) { 641 if (chp->ch_drive[i].drive_type == ATA_DRIVET_ATAPI) 642 continue; 643 if (child == chp->ch_drive[i].drv_softc) { 644 chp->ch_drive[i].drv_softc = NULL; 645 chp->ch_drive[i].drive_flags = 0; 646 if (chp->ch_drive[i].drive_type == ATA_DRIVET_PM) 647 chp->ch_satapmp_nports = 0; 648 chp->ch_drive[i].drive_type = ATA_DRIVET_NONE; 649 found = true; 650 } 651 } 652 653 if (!found) 654 panic("%s: unknown child %p", device_xname(self), 655 (const void *)child); 656 } 657 658 CFATTACH_DECL3_NEW(atabus, sizeof(struct atabus_softc), 659 atabus_match, atabus_attach, atabus_detach, NULL, atabus_rescan, 660 atabus_childdetached, DVF_DETACH_SHUTDOWN); 661 662 /***************************************************************************** 663 * Common ATA bus operations. 664 *****************************************************************************/ 665 666 /* allocate/free the channel's ch_drive[] array */ 667 int 668 atabus_alloc_drives(struct ata_channel *chp, int ndrives) 669 { 670 int i; 671 if (chp->ch_ndrives != ndrives) 672 atabus_free_drives(chp); 673 if (chp->ch_drive == NULL) { 674 chp->ch_drive = malloc( 675 sizeof(struct ata_drive_datas) * ndrives, 676 M_DEVBUF, M_NOWAIT | M_ZERO); 677 } 678 if (chp->ch_drive == NULL) { 679 aprint_error_dev(chp->ch_atac->atac_dev, 680 "can't alloc drive array\n"); 681 chp->ch_ndrives = 0; 682 return ENOMEM; 683 }; 684 for (i = 0; i < ndrives; i++) { 685 chp->ch_drive[i].chnl_softc = chp; 686 chp->ch_drive[i].drive = i; 687 } 688 chp->ch_ndrives = ndrives; 689 return 0; 690 } 691 692 void 693 atabus_free_drives(struct ata_channel *chp) 694 { 695 #ifdef DIAGNOSTIC 696 int i; 697 int dopanic = 0; 698 KASSERT(chp->ch_ndrives == 0 || chp->ch_drive != NULL); 699 for (i = 0; i < chp->ch_ndrives; i++) { 700 if (chp->ch_drive[i].drive_type != ATA_DRIVET_NONE) { 701 printf("%s: ch_drive[%d] type %d != ATA_DRIVET_NONE\n", 702 device_xname(chp->atabus), i, 703 chp->ch_drive[i].drive_type); 704 dopanic = 1; 705 } 706 if (chp->ch_drive[i].drv_softc != NULL) { 707 printf("%s: ch_drive[%d] attached to %s\n", 708 device_xname(chp->atabus), i, 709 device_xname(chp->ch_drive[i].drv_softc)); 710 dopanic = 1; 711 } 712 } 713 if (dopanic) 714 panic("atabus_free_drives"); 715 #endif 716 717 if (chp->ch_drive == NULL) 718 return; 719 chp->ch_ndrives = 0; 720 free(chp->ch_drive, M_DEVBUF); 721 chp->ch_drive = NULL; 722 } 723 724 /* Get the disk's parameters */ 725 int 726 ata_get_params(struct ata_drive_datas *drvp, u_int8_t flags, 727 struct ataparams *prms) 728 { 729 struct ata_command ata_c; 730 struct ata_channel *chp = drvp->chnl_softc; 731 struct atac_softc *atac = chp->ch_atac; 732 char *tb; 733 int i, rv; 734 u_int16_t *p; 735 736 ATADEBUG_PRINT(("%s\n", __func__), DEBUG_FUNCS); 737 738 tb = kmem_zalloc(DEV_BSIZE, KM_SLEEP); 739 memset(prms, 0, sizeof(struct ataparams)); 740 memset(&ata_c, 0, sizeof(struct ata_command)); 741 742 if (drvp->drive_type == ATA_DRIVET_ATA) { 743 ata_c.r_command = WDCC_IDENTIFY; 744 ata_c.r_st_bmask = WDCS_DRDY; 745 ata_c.r_st_pmask = WDCS_DRQ; 746 ata_c.timeout = 3000; /* 3s */ 747 } else if (drvp->drive_type == ATA_DRIVET_ATAPI) { 748 ata_c.r_command = ATAPI_IDENTIFY_DEVICE; 749 ata_c.r_st_bmask = 0; 750 ata_c.r_st_pmask = WDCS_DRQ; 751 ata_c.timeout = 10000; /* 10s */ 752 } else { 753 ATADEBUG_PRINT(("ata_get_parms: no disks\n"), 754 DEBUG_FUNCS|DEBUG_PROBE); 755 rv = CMD_ERR; 756 goto out; 757 } 758 ata_c.flags = AT_READ | flags; 759 ata_c.data = tb; 760 ata_c.bcount = DEV_BSIZE; 761 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 762 &ata_c) != ATACMD_COMPLETE) { 763 ATADEBUG_PRINT(("ata_get_parms: wdc_exec_command failed\n"), 764 DEBUG_FUNCS|DEBUG_PROBE); 765 rv = CMD_AGAIN; 766 goto out; 767 } 768 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 769 ATADEBUG_PRINT(("ata_get_parms: ata_c.flags=0x%x\n", 770 ata_c.flags), DEBUG_FUNCS|DEBUG_PROBE); 771 rv = CMD_ERR; 772 goto out; 773 } 774 /* if we didn't read any data something is wrong */ 775 if ((ata_c.flags & AT_XFDONE) == 0) { 776 rv = CMD_ERR; 777 goto out; 778 } 779 780 /* Read in parameter block. */ 781 memcpy(prms, tb, sizeof(struct ataparams)); 782 783 /* 784 * Shuffle string byte order. 785 * ATAPI NEC, Mitsumi and Pioneer drives and 786 * old ATA TDK CompactFlash cards 787 * have different byte order. 788 */ 789 #if BYTE_ORDER == BIG_ENDIAN 790 # define M(n) prms->atap_model[(n) ^ 1] 791 #else 792 # define M(n) prms->atap_model[n] 793 #endif 794 if ( 795 #if BYTE_ORDER == BIG_ENDIAN 796 ! 797 #endif 798 ((drvp->drive_type == ATA_DRIVET_ATAPI) ? 799 ((M(0) == 'N' && M(1) == 'E') || 800 (M(0) == 'F' && M(1) == 'X') || 801 (M(0) == 'P' && M(1) == 'i')) : 802 ((M(0) == 'T' && M(1) == 'D' && M(2) == 'K')))) { 803 rv = CMD_OK; 804 goto out; 805 } 806 #undef M 807 for (i = 0; i < sizeof(prms->atap_model); i += 2) { 808 p = (u_int16_t *)(prms->atap_model + i); 809 *p = bswap16(*p); 810 } 811 for (i = 0; i < sizeof(prms->atap_serial); i += 2) { 812 p = (u_int16_t *)(prms->atap_serial + i); 813 *p = bswap16(*p); 814 } 815 for (i = 0; i < sizeof(prms->atap_revision); i += 2) { 816 p = (u_int16_t *)(prms->atap_revision + i); 817 *p = bswap16(*p); 818 } 819 820 rv = CMD_OK; 821 out: 822 kmem_free(tb, DEV_BSIZE); 823 return rv; 824 } 825 826 int 827 ata_set_mode(struct ata_drive_datas *drvp, u_int8_t mode, u_int8_t flags) 828 { 829 struct ata_command ata_c; 830 struct ata_channel *chp = drvp->chnl_softc; 831 struct atac_softc *atac = chp->ch_atac; 832 833 ATADEBUG_PRINT(("ata_set_mode=0x%x\n", mode), DEBUG_FUNCS); 834 memset(&ata_c, 0, sizeof(struct ata_command)); 835 836 ata_c.r_command = SET_FEATURES; 837 ata_c.r_st_bmask = 0; 838 ata_c.r_st_pmask = 0; 839 ata_c.r_features = WDSF_SET_MODE; 840 ata_c.r_count = mode; 841 ata_c.flags = flags; 842 ata_c.timeout = 1000; /* 1s */ 843 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 844 &ata_c) != ATACMD_COMPLETE) 845 return CMD_AGAIN; 846 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 847 return CMD_ERR; 848 } 849 return CMD_OK; 850 } 851 852 #if NATA_DMA 853 void 854 ata_dmaerr(struct ata_drive_datas *drvp, int flags) 855 { 856 /* 857 * Downgrade decision: if we get NERRS_MAX in NXFER. 858 * We start with n_dmaerrs set to NERRS_MAX-1 so that the 859 * first error within the first NXFER ops will immediatly trigger 860 * a downgrade. 861 * If we got an error and n_xfers is bigger than NXFER reset counters. 862 */ 863 drvp->n_dmaerrs++; 864 if (drvp->n_dmaerrs >= NERRS_MAX && drvp->n_xfers <= NXFER) { 865 ata_downgrade_mode(drvp, flags); 866 drvp->n_dmaerrs = NERRS_MAX-1; 867 drvp->n_xfers = 0; 868 return; 869 } 870 if (drvp->n_xfers > NXFER) { 871 drvp->n_dmaerrs = 1; /* just got an error */ 872 drvp->n_xfers = 1; /* restart counting from this error */ 873 } 874 } 875 #endif /* NATA_DMA */ 876 877 /* 878 * freeze the queue and wait for the controller to be idle. Caller has to 879 * unfreeze/restart the queue 880 */ 881 void 882 ata_queue_idle(struct ata_queue *queue) 883 { 884 int s = splbio(); 885 queue->queue_freeze++; 886 while (queue->active_xfer != NULL) { 887 queue->queue_flags |= QF_IDLE_WAIT; 888 tsleep(&queue->queue_flags, PRIBIO, "qidl", 0); 889 } 890 splx(s); 891 } 892 893 /* 894 * Add a command to the queue and start controller. 895 * 896 * MUST BE CALLED AT splbio()! 897 */ 898 void 899 ata_exec_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 900 { 901 902 ATADEBUG_PRINT(("ata_exec_xfer %p channel %d drive %d\n", xfer, 903 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 904 905 /* complete xfer setup */ 906 xfer->c_chp = chp; 907 908 /* insert at the end of command list */ 909 TAILQ_INSERT_TAIL(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 910 ATADEBUG_PRINT(("atastart from ata_exec_xfer, flags 0x%x\n", 911 chp->ch_flags), DEBUG_XFERS); 912 /* 913 * if polling and can sleep, wait for the xfer to be at head of queue 914 */ 915 if ((xfer->c_flags & (C_POLL | C_WAIT)) == (C_POLL | C_WAIT)) { 916 while (chp->ch_queue->active_xfer != NULL || 917 TAILQ_FIRST(&chp->ch_queue->queue_xfer) != xfer) { 918 xfer->c_flags |= C_WAITACT; 919 tsleep(xfer, PRIBIO, "ataact", 0); 920 xfer->c_flags &= ~C_WAITACT; 921 if (xfer->c_flags & C_FREE) { 922 ata_free_xfer(chp, xfer); 923 return; 924 } 925 } 926 } 927 atastart(chp); 928 } 929 930 /* 931 * Start I/O on a controller, for the given channel. 932 * The first xfer may be not for our channel if the channel queues 933 * are shared. 934 * 935 * MUST BE CALLED AT splbio()! 936 */ 937 void 938 atastart(struct ata_channel *chp) 939 { 940 struct atac_softc *atac = chp->ch_atac; 941 struct ata_xfer *xfer; 942 943 #ifdef ATA_DEBUG 944 int spl1, spl2; 945 946 spl1 = splbio(); 947 spl2 = splbio(); 948 if (spl2 != spl1) { 949 printf("atastart: not at splbio()\n"); 950 panic("atastart"); 951 } 952 splx(spl2); 953 splx(spl1); 954 #endif /* ATA_DEBUG */ 955 956 /* is there a xfer ? */ 957 if ((xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer)) == NULL) 958 return; 959 960 /* adjust chp, in case we have a shared queue */ 961 chp = xfer->c_chp; 962 963 if (chp->ch_queue->active_xfer != NULL) { 964 return; /* channel aleady active */ 965 } 966 if (__predict_false(chp->ch_queue->queue_freeze > 0)) { 967 if (chp->ch_queue->queue_flags & QF_IDLE_WAIT) { 968 chp->ch_queue->queue_flags &= ~QF_IDLE_WAIT; 969 wakeup(&chp->ch_queue->queue_flags); 970 } 971 return; /* queue frozen */ 972 } 973 /* 974 * if someone is waiting for the command to be active, wake it up 975 * and let it process the command 976 */ 977 if (xfer->c_flags & C_WAITACT) { 978 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d " 979 "wait active\n", xfer, chp->ch_channel, xfer->c_drive), 980 DEBUG_XFERS); 981 wakeup(xfer); 982 return; 983 } 984 #ifdef DIAGNOSTIC 985 if ((chp->ch_flags & ATACH_IRQ_WAIT) != 0) 986 panic("atastart: channel waiting for irq"); 987 #endif 988 if (atac->atac_claim_hw) 989 if (!(*atac->atac_claim_hw)(chp, 0)) 990 return; 991 992 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d\n", xfer, 993 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 994 if (chp->ch_drive[xfer->c_drive].drive_flags & ATA_DRIVE_RESET) { 995 chp->ch_drive[xfer->c_drive].drive_flags &= ~ATA_DRIVE_RESET; 996 chp->ch_drive[xfer->c_drive].state = 0; 997 } 998 chp->ch_queue->active_xfer = xfer; 999 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 1000 1001 if (atac->atac_cap & ATAC_CAP_NOIRQ) 1002 KASSERT(xfer->c_flags & C_POLL); 1003 1004 xfer->c_start(chp, xfer); 1005 } 1006 1007 struct ata_xfer * 1008 ata_get_xfer(int flags) 1009 { 1010 struct ata_xfer *xfer; 1011 int s; 1012 1013 s = splbio(); 1014 xfer = pool_get(&ata_xfer_pool, 1015 ((flags & ATAXF_NOSLEEP) != 0 ? PR_NOWAIT : PR_WAITOK)); 1016 splx(s); 1017 if (xfer != NULL) { 1018 memset(xfer, 0, sizeof(struct ata_xfer)); 1019 } 1020 return xfer; 1021 } 1022 1023 void 1024 ata_free_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 1025 { 1026 struct atac_softc *atac = chp->ch_atac; 1027 int s; 1028 1029 if (xfer->c_flags & C_WAITACT) { 1030 /* Someone is waiting for this xfer, so we can't free now */ 1031 xfer->c_flags |= C_FREE; 1032 wakeup(xfer); 1033 return; 1034 } 1035 1036 #if NATA_PIOBM /* XXX wdc dependent code */ 1037 if (xfer->c_flags & C_PIOBM) { 1038 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 1039 1040 /* finish the busmastering PIO */ 1041 (*wdc->piobm_done)(wdc->dma_arg, 1042 chp->ch_channel, xfer->c_drive); 1043 chp->ch_flags &= ~(ATACH_DMA_WAIT | ATACH_PIOBM_WAIT | ATACH_IRQ_WAIT); 1044 } 1045 #endif 1046 1047 if (atac->atac_free_hw) 1048 (*atac->atac_free_hw)(chp); 1049 s = splbio(); 1050 pool_put(&ata_xfer_pool, xfer); 1051 splx(s); 1052 } 1053 1054 /* 1055 * Kill off all pending xfers for a ata_channel. 1056 * 1057 * Must be called at splbio(). 1058 */ 1059 void 1060 ata_kill_pending(struct ata_drive_datas *drvp) 1061 { 1062 struct ata_channel *chp = drvp->chnl_softc; 1063 struct ata_xfer *xfer, *next_xfer; 1064 int s = splbio(); 1065 1066 for (xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer); 1067 xfer != NULL; xfer = next_xfer) { 1068 next_xfer = TAILQ_NEXT(xfer, c_xferchain); 1069 if (xfer->c_chp != chp || xfer->c_drive != drvp->drive) 1070 continue; 1071 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 1072 (*xfer->c_kill_xfer)(chp, xfer, KILL_GONE); 1073 } 1074 1075 while ((xfer = chp->ch_queue->active_xfer) != NULL) { 1076 if (xfer->c_chp == chp && xfer->c_drive == drvp->drive) { 1077 drvp->drive_flags |= ATA_DRIVE_WAITDRAIN; 1078 (void) tsleep(&chp->ch_queue->active_xfer, 1079 PRIBIO, "atdrn", 0); 1080 } else { 1081 /* no more xfer for us */ 1082 break; 1083 } 1084 } 1085 splx(s); 1086 } 1087 1088 /* 1089 * ata_reset_channel: 1090 * 1091 * Reset and ATA channel. 1092 * 1093 * MUST BE CALLED AT splbio()! 1094 */ 1095 void 1096 ata_reset_channel(struct ata_channel *chp, int flags) 1097 { 1098 struct atac_softc *atac = chp->ch_atac; 1099 int drive; 1100 1101 #ifdef ATA_DEBUG 1102 int spl1, spl2; 1103 1104 spl1 = splbio(); 1105 spl2 = splbio(); 1106 if (spl2 != spl1) { 1107 printf("ata_reset_channel: not at splbio()\n"); 1108 panic("ata_reset_channel"); 1109 } 1110 splx(spl2); 1111 splx(spl1); 1112 #endif /* ATA_DEBUG */ 1113 1114 chp->ch_queue->queue_freeze++; 1115 1116 /* 1117 * If we can poll or wait it's OK, otherwise wake up the 1118 * kernel thread to do it for us. 1119 */ 1120 ATADEBUG_PRINT(("ata_reset_channel flags 0x%x ch_flags 0x%x\n", 1121 flags, chp->ch_flags), DEBUG_FUNCS | DEBUG_XFERS); 1122 if ((flags & (AT_POLL | AT_WAIT)) == 0) { 1123 if (chp->ch_flags & ATACH_TH_RESET) { 1124 /* No need to schedule a reset more than one time. */ 1125 chp->ch_queue->queue_freeze--; 1126 return; 1127 } 1128 chp->ch_flags |= ATACH_TH_RESET; 1129 chp->ch_reset_flags = flags & (AT_RST_EMERG | AT_RST_NOCMD); 1130 wakeup(&chp->ch_thread); 1131 return; 1132 } 1133 1134 (*atac->atac_bustype_ata->ata_reset_channel)(chp, flags); 1135 1136 KASSERT(chp->ch_ndrives == 0 || chp->ch_drive != NULL); 1137 for (drive = 0; drive < chp->ch_ndrives; drive++) 1138 chp->ch_drive[drive].state = 0; 1139 1140 chp->ch_flags &= ~ATACH_TH_RESET; 1141 if ((flags & AT_RST_EMERG) == 0) { 1142 chp->ch_queue->queue_freeze--; 1143 atastart(chp); 1144 } else { 1145 /* make sure that we can use polled commands */ 1146 TAILQ_INIT(&chp->ch_queue->queue_xfer); 1147 chp->ch_queue->queue_freeze = 0; 1148 chp->ch_queue->active_xfer = NULL; 1149 } 1150 } 1151 1152 int 1153 ata_addref(struct ata_channel *chp) 1154 { 1155 struct atac_softc *atac = chp->ch_atac; 1156 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 1157 int s, error = 0; 1158 1159 s = splbio(); 1160 if (adapt->adapt_refcnt++ == 0 && 1161 adapt->adapt_enable != NULL) { 1162 error = (*adapt->adapt_enable)(atac->atac_dev, 1); 1163 if (error) 1164 adapt->adapt_refcnt--; 1165 } 1166 splx(s); 1167 return (error); 1168 } 1169 1170 void 1171 ata_delref(struct ata_channel *chp) 1172 { 1173 struct atac_softc *atac = chp->ch_atac; 1174 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 1175 int s; 1176 1177 s = splbio(); 1178 if (adapt->adapt_refcnt-- == 1 && 1179 adapt->adapt_enable != NULL) 1180 (void) (*adapt->adapt_enable)(atac->atac_dev, 0); 1181 splx(s); 1182 } 1183 1184 void 1185 ata_print_modes(struct ata_channel *chp) 1186 { 1187 struct atac_softc *atac = chp->ch_atac; 1188 int drive; 1189 struct ata_drive_datas *drvp; 1190 1191 KASSERT(chp->ch_ndrives == 0 || chp->ch_drive != NULL); 1192 for (drive = 0; drive < chp->ch_ndrives; drive++) { 1193 drvp = &chp->ch_drive[drive]; 1194 if (drvp->drive_type == ATA_DRIVET_NONE || 1195 drvp->drv_softc == NULL) 1196 continue; 1197 aprint_verbose("%s(%s:%d:%d): using PIO mode %d", 1198 device_xname(drvp->drv_softc), 1199 device_xname(atac->atac_dev), 1200 chp->ch_channel, drvp->drive, drvp->PIO_mode); 1201 #if NATA_DMA 1202 if (drvp->drive_flags & ATA_DRIVE_DMA) 1203 aprint_verbose(", DMA mode %d", drvp->DMA_mode); 1204 #if NATA_UDMA 1205 if (drvp->drive_flags & ATA_DRIVE_UDMA) { 1206 aprint_verbose(", Ultra-DMA mode %d", drvp->UDMA_mode); 1207 if (drvp->UDMA_mode == 2) 1208 aprint_verbose(" (Ultra/33)"); 1209 else if (drvp->UDMA_mode == 4) 1210 aprint_verbose(" (Ultra/66)"); 1211 else if (drvp->UDMA_mode == 5) 1212 aprint_verbose(" (Ultra/100)"); 1213 else if (drvp->UDMA_mode == 6) 1214 aprint_verbose(" (Ultra/133)"); 1215 } 1216 #endif /* NATA_UDMA */ 1217 #endif /* NATA_DMA */ 1218 #if NATA_DMA || NATA_PIOBM 1219 if (0 1220 #if NATA_DMA 1221 || (drvp->drive_flags & (ATA_DRIVE_DMA | ATA_DRIVE_UDMA)) 1222 #endif 1223 #if NATA_PIOBM 1224 /* PIOBM capable controllers use DMA for PIO commands */ 1225 || (atac->atac_cap & ATAC_CAP_PIOBM) 1226 #endif 1227 ) 1228 aprint_verbose(" (using DMA)"); 1229 #endif /* NATA_DMA || NATA_PIOBM */ 1230 aprint_verbose("\n"); 1231 } 1232 } 1233 1234 #if NATA_DMA 1235 /* 1236 * downgrade the transfer mode of a drive after an error. return 1 if 1237 * downgrade was possible, 0 otherwise. 1238 * 1239 * MUST BE CALLED AT splbio()! 1240 */ 1241 int 1242 ata_downgrade_mode(struct ata_drive_datas *drvp, int flags) 1243 { 1244 struct ata_channel *chp = drvp->chnl_softc; 1245 struct atac_softc *atac = chp->ch_atac; 1246 device_t drv_dev = drvp->drv_softc; 1247 int cf_flags = device_cfdata(drv_dev)->cf_flags; 1248 1249 /* if drive or controller don't know its mode, we can't do much */ 1250 if ((drvp->drive_flags & ATA_DRIVE_MODE) == 0 || 1251 (atac->atac_set_modes == NULL)) 1252 return 0; 1253 /* current drive mode was set by a config flag, let it this way */ 1254 if ((cf_flags & ATA_CONFIG_PIO_SET) || 1255 (cf_flags & ATA_CONFIG_DMA_SET) || 1256 (cf_flags & ATA_CONFIG_UDMA_SET)) 1257 return 0; 1258 1259 #if NATA_UDMA 1260 /* 1261 * If we were using Ultra-DMA mode, downgrade to the next lower mode. 1262 */ 1263 if ((drvp->drive_flags & ATA_DRIVE_UDMA) && drvp->UDMA_mode >= 2) { 1264 drvp->UDMA_mode--; 1265 aprint_error_dev(drv_dev, 1266 "transfer error, downgrading to Ultra-DMA mode %d\n", 1267 drvp->UDMA_mode); 1268 } 1269 #endif 1270 1271 /* 1272 * If we were using ultra-DMA, don't downgrade to multiword DMA. 1273 */ 1274 else if (drvp->drive_flags & (ATA_DRIVE_DMA | ATA_DRIVE_UDMA)) { 1275 drvp->drive_flags &= ~(ATA_DRIVE_DMA | ATA_DRIVE_UDMA); 1276 drvp->PIO_mode = drvp->PIO_cap; 1277 aprint_error_dev(drv_dev, 1278 "transfer error, downgrading to PIO mode %d\n", 1279 drvp->PIO_mode); 1280 } else /* already using PIO, can't downgrade */ 1281 return 0; 1282 1283 (*atac->atac_set_modes)(chp); 1284 ata_print_modes(chp); 1285 /* reset the channel, which will schedule all drives for setup */ 1286 ata_reset_channel(chp, flags | AT_RST_NOCMD); 1287 return 1; 1288 } 1289 #endif /* NATA_DMA */ 1290 1291 /* 1292 * Probe drive's capabilities, for use by the controller later 1293 * Assumes drvp points to an existing drive. 1294 */ 1295 void 1296 ata_probe_caps(struct ata_drive_datas *drvp) 1297 { 1298 struct ataparams params, params2; 1299 struct ata_channel *chp = drvp->chnl_softc; 1300 struct atac_softc *atac = chp->ch_atac; 1301 device_t drv_dev = drvp->drv_softc; 1302 int i, printed, s; 1303 const char *sep = ""; 1304 int cf_flags; 1305 1306 if (ata_get_params(drvp, AT_WAIT, ¶ms) != CMD_OK) { 1307 /* IDENTIFY failed. Can't tell more about the device */ 1308 return; 1309 } 1310 if ((atac->atac_cap & (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) == 1311 (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) { 1312 /* 1313 * Controller claims 16 and 32 bit transfers. 1314 * Re-do an IDENTIFY with 32-bit transfers, 1315 * and compare results. 1316 */ 1317 s = splbio(); 1318 drvp->drive_flags |= ATA_DRIVE_CAP32; 1319 splx(s); 1320 ata_get_params(drvp, AT_WAIT, ¶ms2); 1321 if (memcmp(¶ms, ¶ms2, sizeof(struct ataparams)) != 0) { 1322 /* Not good. fall back to 16bits */ 1323 s = splbio(); 1324 drvp->drive_flags &= ~ATA_DRIVE_CAP32; 1325 splx(s); 1326 } else { 1327 aprint_verbose_dev(drv_dev, "32-bit data port\n"); 1328 } 1329 } 1330 #if 0 /* Some ultra-DMA drives claims to only support ATA-3. sigh */ 1331 if (params.atap_ata_major > 0x01 && 1332 params.atap_ata_major != 0xffff) { 1333 for (i = 14; i > 0; i--) { 1334 if (params.atap_ata_major & (1 << i)) { 1335 aprint_verbose_dev(drv_dev, 1336 "ATA version %d\n", i); 1337 drvp->ata_vers = i; 1338 break; 1339 } 1340 } 1341 } 1342 #endif 1343 1344 /* An ATAPI device is at last PIO mode 3 */ 1345 if (drvp->drive_type == ATA_DRIVET_ATAPI) 1346 drvp->PIO_mode = 3; 1347 1348 /* 1349 * It's not in the specs, but it seems that some drive 1350 * returns 0xffff in atap_extensions when this field is invalid 1351 */ 1352 if (params.atap_extensions != 0xffff && 1353 (params.atap_extensions & WDC_EXT_MODES)) { 1354 printed = 0; 1355 /* 1356 * XXX some drives report something wrong here (they claim to 1357 * support PIO mode 8 !). As mode is coded on 3 bits in 1358 * SET FEATURE, limit it to 7 (so limit i to 4). 1359 * If higher mode than 7 is found, abort. 1360 */ 1361 for (i = 7; i >= 0; i--) { 1362 if ((params.atap_piomode_supp & (1 << i)) == 0) 1363 continue; 1364 if (i > 4) 1365 return; 1366 /* 1367 * See if mode is accepted. 1368 * If the controller can't set its PIO mode, 1369 * assume the defaults are good, so don't try 1370 * to set it 1371 */ 1372 if (atac->atac_set_modes) 1373 /* 1374 * It's OK to pool here, it's fast enough 1375 * to not bother waiting for interrupt 1376 */ 1377 if (ata_set_mode(drvp, 0x08 | (i + 3), 1378 AT_WAIT) != CMD_OK) 1379 continue; 1380 if (!printed) { 1381 aprint_verbose_dev(drv_dev, 1382 "drive supports PIO mode %d", i + 3); 1383 sep = ","; 1384 printed = 1; 1385 } 1386 /* 1387 * If controller's driver can't set its PIO mode, 1388 * get the highter one for the drive. 1389 */ 1390 if (atac->atac_set_modes == NULL || 1391 atac->atac_pio_cap >= i + 3) { 1392 drvp->PIO_mode = i + 3; 1393 drvp->PIO_cap = i + 3; 1394 break; 1395 } 1396 } 1397 if (!printed) { 1398 /* 1399 * We didn't find a valid PIO mode. 1400 * Assume the values returned for DMA are buggy too 1401 */ 1402 return; 1403 } 1404 s = splbio(); 1405 drvp->drive_flags |= ATA_DRIVE_MODE; 1406 splx(s); 1407 printed = 0; 1408 for (i = 7; i >= 0; i--) { 1409 if ((params.atap_dmamode_supp & (1 << i)) == 0) 1410 continue; 1411 #if NATA_DMA 1412 if ((atac->atac_cap & ATAC_CAP_DMA) && 1413 atac->atac_set_modes != NULL) 1414 if (ata_set_mode(drvp, 0x20 | i, AT_WAIT) 1415 != CMD_OK) 1416 continue; 1417 #endif 1418 if (!printed) { 1419 aprint_verbose("%s DMA mode %d", sep, i); 1420 sep = ","; 1421 printed = 1; 1422 } 1423 #if NATA_DMA 1424 if (atac->atac_cap & ATAC_CAP_DMA) { 1425 if (atac->atac_set_modes != NULL && 1426 atac->atac_dma_cap < i) 1427 continue; 1428 drvp->DMA_mode = i; 1429 drvp->DMA_cap = i; 1430 s = splbio(); 1431 drvp->drive_flags |= ATA_DRIVE_DMA; 1432 splx(s); 1433 } 1434 #endif 1435 break; 1436 } 1437 if (params.atap_extensions & WDC_EXT_UDMA_MODES) { 1438 printed = 0; 1439 for (i = 7; i >= 0; i--) { 1440 if ((params.atap_udmamode_supp & (1 << i)) 1441 == 0) 1442 continue; 1443 #if NATA_UDMA 1444 if (atac->atac_set_modes != NULL && 1445 (atac->atac_cap & ATAC_CAP_UDMA)) 1446 if (ata_set_mode(drvp, 0x40 | i, 1447 AT_WAIT) != CMD_OK) 1448 continue; 1449 #endif 1450 if (!printed) { 1451 aprint_verbose("%s Ultra-DMA mode %d", 1452 sep, i); 1453 if (i == 2) 1454 aprint_verbose(" (Ultra/33)"); 1455 else if (i == 4) 1456 aprint_verbose(" (Ultra/66)"); 1457 else if (i == 5) 1458 aprint_verbose(" (Ultra/100)"); 1459 else if (i == 6) 1460 aprint_verbose(" (Ultra/133)"); 1461 sep = ","; 1462 printed = 1; 1463 } 1464 #if NATA_UDMA 1465 if (atac->atac_cap & ATAC_CAP_UDMA) { 1466 if (atac->atac_set_modes != NULL && 1467 atac->atac_udma_cap < i) 1468 continue; 1469 drvp->UDMA_mode = i; 1470 drvp->UDMA_cap = i; 1471 s = splbio(); 1472 drvp->drive_flags |= ATA_DRIVE_UDMA; 1473 splx(s); 1474 } 1475 #endif 1476 break; 1477 } 1478 } 1479 aprint_verbose("\n"); 1480 } 1481 1482 s = splbio(); 1483 drvp->drive_flags &= ~ATA_DRIVE_NOSTREAM; 1484 if (drvp->drive_type == ATA_DRIVET_ATAPI) { 1485 if (atac->atac_cap & ATAC_CAP_ATAPI_NOSTREAM) 1486 drvp->drive_flags |= ATA_DRIVE_NOSTREAM; 1487 } else { 1488 if (atac->atac_cap & ATAC_CAP_ATA_NOSTREAM) 1489 drvp->drive_flags |= ATA_DRIVE_NOSTREAM; 1490 } 1491 splx(s); 1492 1493 /* Try to guess ATA version here, if it didn't get reported */ 1494 if (drvp->ata_vers == 0) { 1495 #if NATA_UDMA 1496 if (drvp->drive_flags & ATA_DRIVE_UDMA) 1497 drvp->ata_vers = 4; /* should be at last ATA-4 */ 1498 else 1499 #endif 1500 if (drvp->PIO_cap > 2) 1501 drvp->ata_vers = 2; /* should be at last ATA-2 */ 1502 } 1503 cf_flags = device_cfdata(drv_dev)->cf_flags; 1504 if (cf_flags & ATA_CONFIG_PIO_SET) { 1505 s = splbio(); 1506 drvp->PIO_mode = 1507 (cf_flags & ATA_CONFIG_PIO_MODES) >> ATA_CONFIG_PIO_OFF; 1508 drvp->drive_flags |= ATA_DRIVE_MODE; 1509 splx(s); 1510 } 1511 #if NATA_DMA 1512 if ((atac->atac_cap & ATAC_CAP_DMA) == 0) { 1513 /* don't care about DMA modes */ 1514 return; 1515 } 1516 if (cf_flags & ATA_CONFIG_DMA_SET) { 1517 s = splbio(); 1518 if ((cf_flags & ATA_CONFIG_DMA_MODES) == 1519 ATA_CONFIG_DMA_DISABLE) { 1520 drvp->drive_flags &= ~ATA_DRIVE_DMA; 1521 } else { 1522 drvp->DMA_mode = (cf_flags & ATA_CONFIG_DMA_MODES) >> 1523 ATA_CONFIG_DMA_OFF; 1524 drvp->drive_flags |= ATA_DRIVE_DMA | ATA_DRIVE_MODE; 1525 } 1526 splx(s); 1527 } 1528 #if NATA_UDMA 1529 if ((atac->atac_cap & ATAC_CAP_UDMA) == 0) { 1530 /* don't care about UDMA modes */ 1531 return; 1532 } 1533 if (cf_flags & ATA_CONFIG_UDMA_SET) { 1534 s = splbio(); 1535 if ((cf_flags & ATA_CONFIG_UDMA_MODES) == 1536 ATA_CONFIG_UDMA_DISABLE) { 1537 drvp->drive_flags &= ~ATA_DRIVE_UDMA; 1538 } else { 1539 drvp->UDMA_mode = (cf_flags & ATA_CONFIG_UDMA_MODES) >> 1540 ATA_CONFIG_UDMA_OFF; 1541 drvp->drive_flags |= ATA_DRIVE_UDMA | ATA_DRIVE_MODE; 1542 } 1543 splx(s); 1544 } 1545 #endif /* NATA_UDMA */ 1546 #endif /* NATA_DMA */ 1547 } 1548 1549 /* management of the /dev/atabus* devices */ 1550 int 1551 atabusopen(dev_t dev, int flag, int fmt, struct lwp *l) 1552 { 1553 struct atabus_softc *sc; 1554 int error; 1555 1556 sc = device_lookup_private(&atabus_cd, minor(dev)); 1557 if (sc == NULL) 1558 return (ENXIO); 1559 1560 if (sc->sc_flags & ATABUSCF_OPEN) 1561 return (EBUSY); 1562 1563 if ((error = ata_addref(sc->sc_chan)) != 0) 1564 return (error); 1565 1566 sc->sc_flags |= ATABUSCF_OPEN; 1567 1568 return (0); 1569 } 1570 1571 1572 int 1573 atabusclose(dev_t dev, int flag, int fmt, struct lwp *l) 1574 { 1575 struct atabus_softc *sc = 1576 device_lookup_private(&atabus_cd, minor(dev)); 1577 1578 ata_delref(sc->sc_chan); 1579 1580 sc->sc_flags &= ~ATABUSCF_OPEN; 1581 1582 return (0); 1583 } 1584 1585 int 1586 atabusioctl(dev_t dev, u_long cmd, void *addr, int flag, struct lwp *l) 1587 { 1588 struct atabus_softc *sc = 1589 device_lookup_private(&atabus_cd, minor(dev)); 1590 struct ata_channel *chp = sc->sc_chan; 1591 int min_drive, max_drive, drive; 1592 int error; 1593 int s; 1594 1595 /* 1596 * Enforce write permission for ioctls that change the 1597 * state of the bus. Host adapter specific ioctls must 1598 * be checked by the adapter driver. 1599 */ 1600 switch (cmd) { 1601 case ATABUSIOSCAN: 1602 case ATABUSIODETACH: 1603 case ATABUSIORESET: 1604 if ((flag & FWRITE) == 0) 1605 return (EBADF); 1606 } 1607 1608 switch (cmd) { 1609 case ATABUSIORESET: 1610 s = splbio(); 1611 ata_reset_channel(sc->sc_chan, AT_WAIT | AT_POLL); 1612 splx(s); 1613 return 0; 1614 case ATABUSIOSCAN: 1615 { 1616 #if 0 1617 struct atabusioscan_args *a= 1618 (struct atabusioscan_args *)addr; 1619 #endif 1620 if ((chp->ch_drive[0].drive_type == ATA_DRIVET_OLD) || 1621 (chp->ch_drive[1].drive_type == ATA_DRIVET_OLD)) 1622 return (EOPNOTSUPP); 1623 return (EOPNOTSUPP); 1624 } 1625 case ATABUSIODETACH: 1626 { 1627 struct atabusiodetach_args *a= 1628 (struct atabusiodetach_args *)addr; 1629 if ((chp->ch_drive[0].drive_type == ATA_DRIVET_OLD) || 1630 (chp->ch_drive[1].drive_type == ATA_DRIVET_OLD)) 1631 return (EOPNOTSUPP); 1632 switch (a->at_dev) { 1633 case -1: 1634 min_drive = 0; 1635 max_drive = 1; 1636 break; 1637 case 0: 1638 case 1: 1639 min_drive = max_drive = a->at_dev; 1640 break; 1641 default: 1642 return (EINVAL); 1643 } 1644 for (drive = min_drive; drive <= max_drive; drive++) { 1645 if (chp->ch_drive[drive].drv_softc != NULL) { 1646 error = config_detach( 1647 chp->ch_drive[drive].drv_softc, 0); 1648 if (error) 1649 return (error); 1650 KASSERT(chp->ch_drive[drive].drv_softc == NULL); 1651 } 1652 } 1653 return 0; 1654 } 1655 default: 1656 return ENOTTY; 1657 } 1658 } 1659 1660 static bool 1661 atabus_suspend(device_t dv, const pmf_qual_t *qual) 1662 { 1663 struct atabus_softc *sc = device_private(dv); 1664 struct ata_channel *chp = sc->sc_chan; 1665 1666 ata_queue_idle(chp->ch_queue); 1667 1668 return true; 1669 } 1670 1671 static bool 1672 atabus_resume(device_t dv, const pmf_qual_t *qual) 1673 { 1674 struct atabus_softc *sc = device_private(dv); 1675 struct ata_channel *chp = sc->sc_chan; 1676 int s; 1677 1678 /* 1679 * XXX joerg: with wdc, the first channel unfreezes the controler. 1680 * Move this the reset and queue idling into wdc. 1681 */ 1682 s = splbio(); 1683 if (chp->ch_queue->queue_freeze == 0) { 1684 splx(s); 1685 return true; 1686 } 1687 KASSERT(chp->ch_queue->queue_freeze > 0); 1688 /* unfreeze the queue and reset drives */ 1689 chp->ch_queue->queue_freeze--; 1690 1691 /* reset channel only if there are drives attached */ 1692 if (chp->ch_ndrives > 0) 1693 ata_reset_channel(chp, AT_WAIT); 1694 splx(s); 1695 1696 return true; 1697 } 1698 1699 static int 1700 atabus_rescan(device_t self, const char *ifattr, const int *locators) 1701 { 1702 struct atabus_softc *sc = device_private(self); 1703 struct ata_channel *chp = sc->sc_chan; 1704 struct atabus_initq *initq; 1705 int i; 1706 1707 /* 1708 * we can rescan a port multiplier atabus, even if some devices are 1709 * still attached 1710 */ 1711 if (chp->ch_satapmp_nports == 0) { 1712 if (chp->atapibus != NULL) { 1713 return EBUSY; 1714 } 1715 1716 KASSERT(chp->ch_ndrives == 0 || chp->ch_drive != NULL); 1717 for (i = 0; i < chp->ch_ndrives; i++) { 1718 if (chp->ch_drive[i].drv_softc != NULL) { 1719 return EBUSY; 1720 } 1721 } 1722 } 1723 1724 initq = malloc(sizeof(*initq), M_DEVBUF, M_WAITOK); 1725 initq->atabus_sc = sc; 1726 TAILQ_INSERT_TAIL(&atabus_initq_head, initq, atabus_initq); 1727 config_pending_incr(sc->sc_dev); 1728 1729 chp->ch_flags |= ATACH_TH_RESCAN; 1730 wakeup(&chp->ch_thread); 1731 1732 return 0; 1733 } 1734 1735 void 1736 ata_delay(int ms, const char *msg, int flags) 1737 { 1738 if ((flags & (AT_WAIT | AT_POLL)) == AT_POLL) { 1739 /* 1740 * can't use tsleep(), we may be in interrupt context 1741 * or taking a crash dump 1742 */ 1743 delay(ms * 1000); 1744 } else { 1745 kpause(msg, false, mstohz(ms), NULL); 1746 } 1747 } 1748