1 /* $NetBSD: ata.c,v 1.132 2014/09/10 07:04:48 matt Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __KERNEL_RCSID(0, "$NetBSD: ata.c,v 1.132 2014/09/10 07:04:48 matt Exp $"); 29 30 #include "opt_ata.h" 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/kernel.h> 35 #include <sys/malloc.h> 36 #include <sys/device.h> 37 #include <sys/conf.h> 38 #include <sys/fcntl.h> 39 #include <sys/proc.h> 40 #include <sys/pool.h> 41 #include <sys/kthread.h> 42 #include <sys/errno.h> 43 #include <sys/ataio.h> 44 #include <sys/kmem.h> 45 #include <sys/intr.h> 46 #include <sys/bus.h> 47 #include <sys/once.h> 48 49 #include <dev/ata/ataconf.h> 50 #include <dev/ata/atareg.h> 51 #include <dev/ata/atavar.h> 52 #include <dev/ic/wdcvar.h> /* for PIOBM */ 53 54 #include "locators.h" 55 56 #include "atapibus.h" 57 #include "ataraid.h" 58 #include "sata_pmp.h" 59 60 #if NATARAID > 0 61 #include <dev/ata/ata_raidvar.h> 62 #endif 63 #if NSATA_PMP > 0 64 #include <dev/ata/satapmpvar.h> 65 #endif 66 #include <dev/ata/satapmpreg.h> 67 68 #define DEBUG_FUNCS 0x08 69 #define DEBUG_PROBE 0x10 70 #define DEBUG_DETACH 0x20 71 #define DEBUG_XFERS 0x40 72 #ifdef ATADEBUG 73 #ifndef ATADEBUG_MASK 74 #define ATADEBUG_MASK 0 75 #endif 76 int atadebug_mask = ATADEBUG_MASK; 77 #define ATADEBUG_PRINT(args, level) \ 78 if (atadebug_mask & (level)) \ 79 printf args 80 #else 81 #define ATADEBUG_PRINT(args, level) 82 #endif 83 84 static ONCE_DECL(ata_init_ctrl); 85 static struct pool ata_xfer_pool; 86 87 /* 88 * A queue of atabus instances, used to ensure the same bus probe order 89 * for a given hardware configuration at each boot. Kthread probing 90 * devices on a atabus. Only one probing at once. 91 */ 92 static TAILQ_HEAD(, atabus_initq) atabus_initq_head; 93 static kmutex_t atabus_qlock; 94 static kcondvar_t atabus_qcv; 95 static lwp_t * atabus_cfg_lwp; 96 97 /***************************************************************************** 98 * ATA bus layer. 99 * 100 * ATA controllers attach an atabus instance, which handles probing the bus 101 * for drives, etc. 102 *****************************************************************************/ 103 104 dev_type_open(atabusopen); 105 dev_type_close(atabusclose); 106 dev_type_ioctl(atabusioctl); 107 108 const struct cdevsw atabus_cdevsw = { 109 .d_open = atabusopen, 110 .d_close = atabusclose, 111 .d_read = noread, 112 .d_write = nowrite, 113 .d_ioctl = atabusioctl, 114 .d_stop = nostop, 115 .d_tty = notty, 116 .d_poll = nopoll, 117 .d_mmap = nommap, 118 .d_kqfilter = nokqfilter, 119 .d_discard = nodiscard, 120 .d_flag = D_OTHER 121 }; 122 123 extern struct cfdriver atabus_cd; 124 125 static void atabus_childdetached(device_t, device_t); 126 static int atabus_rescan(device_t, const char *, const int *); 127 static bool atabus_resume(device_t, const pmf_qual_t *); 128 static bool atabus_suspend(device_t, const pmf_qual_t *); 129 static void atabusconfig_thread(void *); 130 131 /* 132 * atabus_init: 133 * 134 * Initialize ATA subsystem structures. 135 */ 136 static int 137 atabus_init(void) 138 { 139 140 pool_init(&ata_xfer_pool, sizeof(struct ata_xfer), 0, 0, 0, 141 "ataspl", NULL, IPL_BIO); 142 TAILQ_INIT(&atabus_initq_head); 143 mutex_init(&atabus_qlock, MUTEX_DEFAULT, IPL_NONE); 144 cv_init(&atabus_qcv, "atainitq"); 145 return 0; 146 } 147 148 /* 149 * atabusprint: 150 * 151 * Autoconfiguration print routine used by ATA controllers when 152 * attaching an atabus instance. 153 */ 154 int 155 atabusprint(void *aux, const char *pnp) 156 { 157 struct ata_channel *chan = aux; 158 159 if (pnp) 160 aprint_normal("atabus at %s", pnp); 161 aprint_normal(" channel %d", chan->ch_channel); 162 163 return (UNCONF); 164 } 165 166 /* 167 * ataprint: 168 * 169 * Autoconfiguration print routine. 170 */ 171 int 172 ataprint(void *aux, const char *pnp) 173 { 174 struct ata_device *adev = aux; 175 176 if (pnp) 177 aprint_normal("wd at %s", pnp); 178 aprint_normal(" drive %d", adev->adev_drv_data->drive); 179 180 return (UNCONF); 181 } 182 183 /* 184 * ata_channel_attach: 185 * 186 * Common parts of attaching an atabus to an ATA controller channel. 187 */ 188 void 189 ata_channel_attach(struct ata_channel *chp) 190 { 191 192 if (chp->ch_flags & ATACH_DISABLED) 193 return; 194 195 /* XXX callout_destroy */ 196 callout_init(&chp->ch_callout, 0); 197 198 TAILQ_INIT(&chp->ch_queue->queue_xfer); 199 chp->ch_queue->queue_freeze = 0; 200 chp->ch_queue->queue_flags = 0; 201 chp->ch_queue->active_xfer = NULL; 202 203 chp->atabus = config_found_ia(chp->ch_atac->atac_dev, "ata", chp, 204 atabusprint); 205 } 206 207 static void 208 atabusconfig(struct atabus_softc *atabus_sc) 209 { 210 struct ata_channel *chp = atabus_sc->sc_chan; 211 struct atac_softc *atac = chp->ch_atac; 212 struct atabus_initq *atabus_initq = NULL; 213 int i, s, error; 214 215 /* we are in the atabus's thread context */ 216 s = splbio(); 217 chp->ch_flags |= ATACH_TH_RUN; 218 splx(s); 219 220 /* 221 * Probe for the drives attached to controller, unless a PMP 222 * is already known 223 */ 224 /* XXX for SATA devices we will power up all drives at once */ 225 if (chp->ch_satapmp_nports == 0) 226 (*atac->atac_probe)(chp); 227 228 if (chp->ch_ndrives >= 2) { 229 ATADEBUG_PRINT(("atabusattach: ch_drive_type 0x%x 0x%x\n", 230 chp->ch_drive[0].drive_type, chp->ch_drive[1].drive_type), 231 DEBUG_PROBE); 232 } 233 234 /* next operations will occurs in a separate thread */ 235 s = splbio(); 236 chp->ch_flags &= ~ATACH_TH_RUN; 237 splx(s); 238 239 /* Make sure the devices probe in atabus order to avoid jitter. */ 240 mutex_enter(&atabus_qlock); 241 for (;;) { 242 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 243 if (atabus_initq->atabus_sc == atabus_sc) 244 break; 245 cv_wait(&atabus_qcv, &atabus_qlock); 246 } 247 mutex_exit(&atabus_qlock); 248 249 /* If no drives, abort here */ 250 if (chp->ch_drive == NULL) 251 goto out; 252 KASSERT(chp->ch_ndrives == 0 || chp->ch_drive != NULL); 253 for (i = 0; i < chp->ch_ndrives; i++) 254 if (chp->ch_drive[i].drive_type != ATA_DRIVET_NONE) 255 break; 256 if (i == chp->ch_ndrives) 257 goto out; 258 259 /* Shortcut in case we've been shutdown */ 260 if (chp->ch_flags & ATACH_SHUTDOWN) 261 goto out; 262 263 if ((error = kthread_create(PRI_NONE, 0, NULL, atabusconfig_thread, 264 atabus_sc, &atabus_cfg_lwp, 265 "%scnf", device_xname(atac->atac_dev))) != 0) 266 aprint_error_dev(atac->atac_dev, 267 "unable to create config thread: error %d\n", error); 268 return; 269 270 out: 271 mutex_enter(&atabus_qlock); 272 TAILQ_REMOVE(&atabus_initq_head, atabus_initq, atabus_initq); 273 cv_broadcast(&atabus_qcv); 274 mutex_exit(&atabus_qlock); 275 276 free(atabus_initq, M_DEVBUF); 277 278 ata_delref(chp); 279 280 config_pending_decr(atac->atac_dev); 281 } 282 283 /* 284 * atabus_configthread: finish attach of atabus's childrens, in a separate 285 * kernel thread. 286 */ 287 static void 288 atabusconfig_thread(void *arg) 289 { 290 struct atabus_softc *atabus_sc = arg; 291 struct ata_channel *chp = atabus_sc->sc_chan; 292 struct atac_softc *atac = chp->ch_atac; 293 struct atabus_initq *atabus_initq = NULL; 294 int i, s; 295 296 /* XXX seems wrong */ 297 mutex_enter(&atabus_qlock); 298 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 299 KASSERT(atabus_initq->atabus_sc == atabus_sc); 300 mutex_exit(&atabus_qlock); 301 302 /* 303 * First look for a port multiplier 304 */ 305 if (chp->ch_ndrives == PMP_MAX_DRIVES && 306 chp->ch_drive[PMP_PORT_CTL].drive_type == ATA_DRIVET_PM) { 307 #if NSATA_PMP > 0 308 satapmp_attach(chp); 309 #else 310 aprint_error_dev(atabus_sc->sc_dev, 311 "SATA port multiplier not supported\n"); 312 /* no problems going on, all drives are ATA_DRIVET_NONE */ 313 #endif 314 } 315 316 /* 317 * Attach an ATAPI bus, if needed. 318 */ 319 KASSERT(chp->ch_ndrives == 0 || chp->ch_drive != NULL); 320 for (i = 0; i < chp->ch_ndrives && chp->atapibus == NULL; i++) { 321 if (chp->ch_drive[i].drive_type == ATA_DRIVET_ATAPI) { 322 #if NATAPIBUS > 0 323 (*atac->atac_atapibus_attach)(atabus_sc); 324 #else 325 /* 326 * Fake the autoconfig "not configured" message 327 */ 328 aprint_normal("atapibus at %s not configured\n", 329 device_xname(atac->atac_dev)); 330 chp->atapibus = NULL; 331 s = splbio(); 332 for (i = 0; i < chp->ch_ndrives; i++) { 333 if (chp->ch_drive[i].drive_type == ATA_DRIVET_ATAPI) 334 chp->ch_drive[i].drive_type = ATA_DRIVET_NONE; 335 } 336 splx(s); 337 #endif 338 break; 339 } 340 } 341 342 for (i = 0; i < chp->ch_ndrives; i++) { 343 struct ata_device adev; 344 if (chp->ch_drive[i].drive_type != ATA_DRIVET_ATA && 345 chp->ch_drive[i].drive_type != ATA_DRIVET_OLD) { 346 continue; 347 } 348 if (chp->ch_drive[i].drv_softc != NULL) 349 continue; 350 memset(&adev, 0, sizeof(struct ata_device)); 351 adev.adev_bustype = atac->atac_bustype_ata; 352 adev.adev_channel = chp->ch_channel; 353 adev.adev_openings = 1; 354 adev.adev_drv_data = &chp->ch_drive[i]; 355 chp->ch_drive[i].drv_softc = config_found_ia(atabus_sc->sc_dev, 356 "ata_hl", &adev, ataprint); 357 if (chp->ch_drive[i].drv_softc != NULL) { 358 ata_probe_caps(&chp->ch_drive[i]); 359 } else { 360 s = splbio(); 361 chp->ch_drive[i].drive_type = ATA_DRIVET_NONE; 362 splx(s); 363 } 364 } 365 366 /* now that we know the drives, the controller can set its modes */ 367 if (atac->atac_set_modes) { 368 (*atac->atac_set_modes)(chp); 369 ata_print_modes(chp); 370 } 371 #if NATARAID > 0 372 if (atac->atac_cap & ATAC_CAP_RAID) { 373 for (i = 0; i < chp->ch_ndrives; i++) { 374 if (chp->ch_drive[i].drive_type == ATA_DRIVET_ATA) { 375 ata_raid_check_component( 376 chp->ch_drive[i].drv_softc); 377 } 378 } 379 } 380 #endif /* NATARAID > 0 */ 381 382 /* 383 * reset drive_flags for unattached devices, reset state for attached 384 * ones 385 */ 386 s = splbio(); 387 for (i = 0; i < chp->ch_ndrives; i++) { 388 if (chp->ch_drive[i].drive_type == ATA_DRIVET_PM) 389 continue; 390 if (chp->ch_drive[i].drv_softc == NULL) { 391 chp->ch_drive[i].drive_flags = 0; 392 chp->ch_drive[i].drive_type = ATA_DRIVET_NONE; 393 } else 394 chp->ch_drive[i].state = 0; 395 } 396 splx(s); 397 398 mutex_enter(&atabus_qlock); 399 TAILQ_REMOVE(&atabus_initq_head, atabus_initq, atabus_initq); 400 cv_broadcast(&atabus_qcv); 401 mutex_exit(&atabus_qlock); 402 403 free(atabus_initq, M_DEVBUF); 404 405 ata_delref(chp); 406 407 config_pending_decr(atac->atac_dev); 408 kthread_exit(0); 409 } 410 411 /* 412 * atabus_thread: 413 * 414 * Worker thread for the ATA bus. 415 */ 416 static void 417 atabus_thread(void *arg) 418 { 419 struct atabus_softc *sc = arg; 420 struct ata_channel *chp = sc->sc_chan; 421 struct ata_xfer *xfer; 422 int i, s; 423 424 s = splbio(); 425 chp->ch_flags |= ATACH_TH_RUN; 426 427 /* 428 * Probe the drives. Reset type to indicate to controllers 429 * that can re-probe that all drives must be probed.. 430 * 431 * Note: ch_ndrives may be changed during the probe. 432 */ 433 KASSERT(chp->ch_ndrives == 0 || chp->ch_drive != NULL); 434 for (i = 0; i < chp->ch_ndrives; i++) { 435 chp->ch_drive[i].drive_flags = 0; 436 chp->ch_drive[i].drive_type = ATA_DRIVET_NONE; 437 } 438 splx(s); 439 440 atabusconfig(sc); 441 442 s = splbio(); 443 for (;;) { 444 if ((chp->ch_flags & (ATACH_TH_RESET | ATACH_SHUTDOWN)) == 0 && 445 (chp->ch_queue->active_xfer == NULL || 446 chp->ch_queue->queue_freeze == 0)) { 447 chp->ch_flags &= ~ATACH_TH_RUN; 448 (void) tsleep(&chp->ch_thread, PRIBIO, "atath", 0); 449 chp->ch_flags |= ATACH_TH_RUN; 450 } 451 if (chp->ch_flags & ATACH_SHUTDOWN) { 452 break; 453 } 454 if (chp->ch_flags & ATACH_TH_RESCAN) { 455 atabusconfig(sc); 456 chp->ch_flags &= ~ATACH_TH_RESCAN; 457 } 458 if (chp->ch_flags & ATACH_TH_RESET) { 459 /* 460 * ata_reset_channel() will freeze 2 times, so 461 * unfreeze one time. Not a problem as we're at splbio 462 */ 463 chp->ch_queue->queue_freeze--; 464 ata_reset_channel(chp, AT_WAIT | chp->ch_reset_flags); 465 } else if (chp->ch_queue->active_xfer != NULL && 466 chp->ch_queue->queue_freeze == 1) { 467 /* 468 * Caller has bumped queue_freeze, decrease it. 469 */ 470 chp->ch_queue->queue_freeze--; 471 xfer = chp->ch_queue->active_xfer; 472 KASSERT(xfer != NULL); 473 (*xfer->c_start)(xfer->c_chp, xfer); 474 } else if (chp->ch_queue->queue_freeze > 1) 475 panic("ata_thread: queue_freeze"); 476 } 477 splx(s); 478 chp->ch_thread = NULL; 479 wakeup(&chp->ch_flags); 480 kthread_exit(0); 481 } 482 483 /* 484 * atabus_match: 485 * 486 * Autoconfiguration match routine. 487 */ 488 static int 489 atabus_match(device_t parent, cfdata_t cf, void *aux) 490 { 491 struct ata_channel *chp = aux; 492 493 if (chp == NULL) 494 return (0); 495 496 if (cf->cf_loc[ATACF_CHANNEL] != chp->ch_channel && 497 cf->cf_loc[ATACF_CHANNEL] != ATACF_CHANNEL_DEFAULT) 498 return (0); 499 500 return (1); 501 } 502 503 /* 504 * atabus_attach: 505 * 506 * Autoconfiguration attach routine. 507 */ 508 static void 509 atabus_attach(device_t parent, device_t self, void *aux) 510 { 511 struct atabus_softc *sc = device_private(self); 512 struct ata_channel *chp = aux; 513 struct atabus_initq *initq; 514 int error; 515 516 sc->sc_chan = chp; 517 518 aprint_normal("\n"); 519 aprint_naive("\n"); 520 521 sc->sc_dev = self; 522 523 if (ata_addref(chp)) 524 return; 525 526 RUN_ONCE(&ata_init_ctrl, atabus_init); 527 528 initq = malloc(sizeof(*initq), M_DEVBUF, M_WAITOK); 529 initq->atabus_sc = sc; 530 TAILQ_INSERT_TAIL(&atabus_initq_head, initq, atabus_initq); 531 config_pending_incr(sc->sc_dev); 532 533 if ((error = kthread_create(PRI_NONE, 0, NULL, atabus_thread, sc, 534 &chp->ch_thread, "%s", device_xname(self))) != 0) 535 aprint_error_dev(self, 536 "unable to create kernel thread: error %d\n", error); 537 538 if (!pmf_device_register(self, atabus_suspend, atabus_resume)) 539 aprint_error_dev(self, "couldn't establish power handler\n"); 540 } 541 542 /* 543 * atabus_detach: 544 * 545 * Autoconfiguration detach routine. 546 */ 547 static int 548 atabus_detach(device_t self, int flags) 549 { 550 struct atabus_softc *sc = device_private(self); 551 struct ata_channel *chp = sc->sc_chan; 552 device_t dev = NULL; 553 int s, i, error = 0; 554 555 /* Shutdown the channel. */ 556 s = splbio(); /* XXX ALSO NEED AN INTERLOCK HERE. */ 557 chp->ch_flags |= ATACH_SHUTDOWN; 558 splx(s); 559 560 wakeup(&chp->ch_thread); 561 562 while (chp->ch_thread != NULL) 563 (void) tsleep(&chp->ch_flags, PRIBIO, "atadown", 0); 564 565 566 /* 567 * Detach atapibus and its children. 568 */ 569 if ((dev = chp->atapibus) != NULL) { 570 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n", 571 device_xname(self), device_xname(dev)), DEBUG_DETACH); 572 573 error = config_detach(dev, flags); 574 if (error) 575 goto out; 576 KASSERT(chp->atapibus == NULL); 577 } 578 579 KASSERT(chp->ch_ndrives == 0 || chp->ch_drive != NULL); 580 581 /* 582 * Detach our other children. 583 */ 584 for (i = 0; i < chp->ch_ndrives; i++) { 585 if (chp->ch_drive[i].drive_type == ATA_DRIVET_ATAPI) 586 continue; 587 if (chp->ch_drive[i].drive_type == ATA_DRIVET_PM) 588 chp->ch_drive[i].drive_type = ATA_DRIVET_NONE; 589 if ((dev = chp->ch_drive[i].drv_softc) != NULL) { 590 ATADEBUG_PRINT(("%s.%d: %s: detaching %s\n", __func__, 591 __LINE__, device_xname(self), device_xname(dev)), 592 DEBUG_DETACH); 593 error = config_detach(dev, flags); 594 if (error) 595 goto out; 596 KASSERT(chp->ch_drive[i].drv_softc == NULL); 597 KASSERT(chp->ch_drive[i].drive_type == 0); 598 } 599 } 600 atabus_free_drives(chp); 601 602 out: 603 #ifdef ATADEBUG 604 if (dev != NULL && error != 0) 605 ATADEBUG_PRINT(("%s: %s: error %d detaching %s\n", __func__, 606 device_xname(self), error, device_xname(dev)), 607 DEBUG_DETACH); 608 #endif /* ATADEBUG */ 609 610 return (error); 611 } 612 613 void 614 atabus_childdetached(device_t self, device_t child) 615 { 616 bool found = false; 617 struct atabus_softc *sc = device_private(self); 618 struct ata_channel *chp = sc->sc_chan; 619 int i; 620 621 KASSERT(chp->ch_ndrives == 0 || chp->ch_drive != NULL); 622 /* 623 * atapibus detached. 624 */ 625 if (child == chp->atapibus) { 626 chp->atapibus = NULL; 627 found = true; 628 for (i = 0; i < chp->ch_ndrives; i++) { 629 if (chp->ch_drive[i].drive_type != ATA_DRIVET_ATAPI) 630 continue; 631 KASSERT(chp->ch_drive[i].drv_softc != NULL); 632 chp->ch_drive[i].drv_softc = NULL; 633 chp->ch_drive[i].drive_flags = 0; 634 chp->ch_drive[i].drive_type = ATA_DRIVET_NONE; 635 } 636 } 637 638 /* 639 * Detach our other children. 640 */ 641 for (i = 0; i < chp->ch_ndrives; i++) { 642 if (chp->ch_drive[i].drive_type == ATA_DRIVET_ATAPI) 643 continue; 644 if (child == chp->ch_drive[i].drv_softc) { 645 chp->ch_drive[i].drv_softc = NULL; 646 chp->ch_drive[i].drive_flags = 0; 647 if (chp->ch_drive[i].drive_type == ATA_DRIVET_PM) 648 chp->ch_satapmp_nports = 0; 649 chp->ch_drive[i].drive_type = ATA_DRIVET_NONE; 650 found = true; 651 } 652 } 653 654 if (!found) 655 panic("%s: unknown child %p", device_xname(self), 656 (const void *)child); 657 } 658 659 CFATTACH_DECL3_NEW(atabus, sizeof(struct atabus_softc), 660 atabus_match, atabus_attach, atabus_detach, NULL, atabus_rescan, 661 atabus_childdetached, DVF_DETACH_SHUTDOWN); 662 663 /***************************************************************************** 664 * Common ATA bus operations. 665 *****************************************************************************/ 666 667 /* allocate/free the channel's ch_drive[] array */ 668 int 669 atabus_alloc_drives(struct ata_channel *chp, int ndrives) 670 { 671 int i; 672 if (chp->ch_ndrives != ndrives) 673 atabus_free_drives(chp); 674 if (chp->ch_drive == NULL) { 675 chp->ch_drive = malloc( 676 sizeof(struct ata_drive_datas) * ndrives, 677 M_DEVBUF, M_NOWAIT | M_ZERO); 678 } 679 if (chp->ch_drive == NULL) { 680 aprint_error_dev(chp->ch_atac->atac_dev, 681 "can't alloc drive array\n"); 682 chp->ch_ndrives = 0; 683 return ENOMEM; 684 }; 685 for (i = 0; i < ndrives; i++) { 686 chp->ch_drive[i].chnl_softc = chp; 687 chp->ch_drive[i].drive = i; 688 } 689 chp->ch_ndrives = ndrives; 690 return 0; 691 } 692 693 void 694 atabus_free_drives(struct ata_channel *chp) 695 { 696 #ifdef DIAGNOSTIC 697 int i; 698 int dopanic = 0; 699 KASSERT(chp->ch_ndrives == 0 || chp->ch_drive != NULL); 700 for (i = 0; i < chp->ch_ndrives; i++) { 701 if (chp->ch_drive[i].drive_type != ATA_DRIVET_NONE) { 702 printf("%s: ch_drive[%d] type %d != ATA_DRIVET_NONE\n", 703 device_xname(chp->atabus), i, 704 chp->ch_drive[i].drive_type); 705 dopanic = 1; 706 } 707 if (chp->ch_drive[i].drv_softc != NULL) { 708 printf("%s: ch_drive[%d] attached to %s\n", 709 device_xname(chp->atabus), i, 710 device_xname(chp->ch_drive[i].drv_softc)); 711 dopanic = 1; 712 } 713 } 714 if (dopanic) 715 panic("atabus_free_drives"); 716 #endif 717 718 if (chp->ch_drive == NULL) 719 return; 720 chp->ch_ndrives = 0; 721 free(chp->ch_drive, M_DEVBUF); 722 chp->ch_drive = NULL; 723 } 724 725 /* Get the disk's parameters */ 726 int 727 ata_get_params(struct ata_drive_datas *drvp, uint8_t flags, 728 struct ataparams *prms) 729 { 730 struct ata_command ata_c; 731 struct ata_channel *chp = drvp->chnl_softc; 732 struct atac_softc *atac = chp->ch_atac; 733 char *tb; 734 int i, rv; 735 uint16_t *p; 736 737 ATADEBUG_PRINT(("%s\n", __func__), DEBUG_FUNCS); 738 739 tb = kmem_zalloc(DEV_BSIZE, KM_SLEEP); 740 memset(prms, 0, sizeof(struct ataparams)); 741 memset(&ata_c, 0, sizeof(struct ata_command)); 742 743 if (drvp->drive_type == ATA_DRIVET_ATA) { 744 ata_c.r_command = WDCC_IDENTIFY; 745 ata_c.r_st_bmask = WDCS_DRDY; 746 ata_c.r_st_pmask = WDCS_DRQ; 747 ata_c.timeout = 3000; /* 3s */ 748 } else if (drvp->drive_type == ATA_DRIVET_ATAPI) { 749 ata_c.r_command = ATAPI_IDENTIFY_DEVICE; 750 ata_c.r_st_bmask = 0; 751 ata_c.r_st_pmask = WDCS_DRQ; 752 ata_c.timeout = 10000; /* 10s */ 753 } else { 754 ATADEBUG_PRINT(("ata_get_parms: no disks\n"), 755 DEBUG_FUNCS|DEBUG_PROBE); 756 rv = CMD_ERR; 757 goto out; 758 } 759 ata_c.flags = AT_READ | flags; 760 ata_c.data = tb; 761 ata_c.bcount = DEV_BSIZE; 762 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 763 &ata_c) != ATACMD_COMPLETE) { 764 ATADEBUG_PRINT(("ata_get_parms: wdc_exec_command failed\n"), 765 DEBUG_FUNCS|DEBUG_PROBE); 766 rv = CMD_AGAIN; 767 goto out; 768 } 769 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 770 ATADEBUG_PRINT(("ata_get_parms: ata_c.flags=0x%x\n", 771 ata_c.flags), DEBUG_FUNCS|DEBUG_PROBE); 772 rv = CMD_ERR; 773 goto out; 774 } 775 /* if we didn't read any data something is wrong */ 776 if ((ata_c.flags & AT_XFDONE) == 0) { 777 rv = CMD_ERR; 778 goto out; 779 } 780 781 /* Read in parameter block. */ 782 memcpy(prms, tb, sizeof(struct ataparams)); 783 784 /* 785 * Shuffle string byte order. 786 * ATAPI NEC, Mitsumi and Pioneer drives and 787 * old ATA TDK CompactFlash cards 788 * have different byte order. 789 */ 790 #if BYTE_ORDER == BIG_ENDIAN 791 # define M(n) prms->atap_model[(n) ^ 1] 792 #else 793 # define M(n) prms->atap_model[n] 794 #endif 795 if ( 796 #if BYTE_ORDER == BIG_ENDIAN 797 ! 798 #endif 799 ((drvp->drive_type == ATA_DRIVET_ATAPI) ? 800 ((M(0) == 'N' && M(1) == 'E') || 801 (M(0) == 'F' && M(1) == 'X') || 802 (M(0) == 'P' && M(1) == 'i')) : 803 ((M(0) == 'T' && M(1) == 'D' && M(2) == 'K')))) { 804 rv = CMD_OK; 805 goto out; 806 } 807 #undef M 808 for (i = 0; i < sizeof(prms->atap_model); i += 2) { 809 p = (uint16_t *)(prms->atap_model + i); 810 *p = bswap16(*p); 811 } 812 for (i = 0; i < sizeof(prms->atap_serial); i += 2) { 813 p = (uint16_t *)(prms->atap_serial + i); 814 *p = bswap16(*p); 815 } 816 for (i = 0; i < sizeof(prms->atap_revision); i += 2) { 817 p = (uint16_t *)(prms->atap_revision + i); 818 *p = bswap16(*p); 819 } 820 821 rv = CMD_OK; 822 out: 823 kmem_free(tb, DEV_BSIZE); 824 return rv; 825 } 826 827 int 828 ata_set_mode(struct ata_drive_datas *drvp, uint8_t mode, uint8_t flags) 829 { 830 struct ata_command ata_c; 831 struct ata_channel *chp = drvp->chnl_softc; 832 struct atac_softc *atac = chp->ch_atac; 833 834 ATADEBUG_PRINT(("ata_set_mode=0x%x\n", mode), DEBUG_FUNCS); 835 memset(&ata_c, 0, sizeof(struct ata_command)); 836 837 ata_c.r_command = SET_FEATURES; 838 ata_c.r_st_bmask = 0; 839 ata_c.r_st_pmask = 0; 840 ata_c.r_features = WDSF_SET_MODE; 841 ata_c.r_count = mode; 842 ata_c.flags = flags; 843 ata_c.timeout = 1000; /* 1s */ 844 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 845 &ata_c) != ATACMD_COMPLETE) 846 return CMD_AGAIN; 847 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 848 return CMD_ERR; 849 } 850 return CMD_OK; 851 } 852 853 #if NATA_DMA 854 void 855 ata_dmaerr(struct ata_drive_datas *drvp, int flags) 856 { 857 /* 858 * Downgrade decision: if we get NERRS_MAX in NXFER. 859 * We start with n_dmaerrs set to NERRS_MAX-1 so that the 860 * first error within the first NXFER ops will immediatly trigger 861 * a downgrade. 862 * If we got an error and n_xfers is bigger than NXFER reset counters. 863 */ 864 drvp->n_dmaerrs++; 865 if (drvp->n_dmaerrs >= NERRS_MAX && drvp->n_xfers <= NXFER) { 866 ata_downgrade_mode(drvp, flags); 867 drvp->n_dmaerrs = NERRS_MAX-1; 868 drvp->n_xfers = 0; 869 return; 870 } 871 if (drvp->n_xfers > NXFER) { 872 drvp->n_dmaerrs = 1; /* just got an error */ 873 drvp->n_xfers = 1; /* restart counting from this error */ 874 } 875 } 876 #endif /* NATA_DMA */ 877 878 /* 879 * freeze the queue and wait for the controller to be idle. Caller has to 880 * unfreeze/restart the queue 881 */ 882 void 883 ata_queue_idle(struct ata_queue *queue) 884 { 885 int s = splbio(); 886 queue->queue_freeze++; 887 while (queue->active_xfer != NULL) { 888 queue->queue_flags |= QF_IDLE_WAIT; 889 tsleep(&queue->queue_flags, PRIBIO, "qidl", 0); 890 } 891 splx(s); 892 } 893 894 /* 895 * Add a command to the queue and start controller. 896 * 897 * MUST BE CALLED AT splbio()! 898 */ 899 void 900 ata_exec_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 901 { 902 903 ATADEBUG_PRINT(("ata_exec_xfer %p channel %d drive %d\n", xfer, 904 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 905 906 /* complete xfer setup */ 907 xfer->c_chp = chp; 908 909 /* insert at the end of command list */ 910 TAILQ_INSERT_TAIL(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 911 ATADEBUG_PRINT(("atastart from ata_exec_xfer, flags 0x%x\n", 912 chp->ch_flags), DEBUG_XFERS); 913 /* 914 * if polling and can sleep, wait for the xfer to be at head of queue 915 */ 916 if ((xfer->c_flags & (C_POLL | C_WAIT)) == (C_POLL | C_WAIT)) { 917 while (chp->ch_queue->active_xfer != NULL || 918 TAILQ_FIRST(&chp->ch_queue->queue_xfer) != xfer) { 919 xfer->c_flags |= C_WAITACT; 920 tsleep(xfer, PRIBIO, "ataact", 0); 921 xfer->c_flags &= ~C_WAITACT; 922 if (xfer->c_flags & C_FREE) { 923 ata_free_xfer(chp, xfer); 924 return; 925 } 926 } 927 } 928 atastart(chp); 929 } 930 931 /* 932 * Start I/O on a controller, for the given channel. 933 * The first xfer may be not for our channel if the channel queues 934 * are shared. 935 * 936 * MUST BE CALLED AT splbio()! 937 */ 938 void 939 atastart(struct ata_channel *chp) 940 { 941 struct atac_softc *atac = chp->ch_atac; 942 struct ata_xfer *xfer; 943 944 #ifdef ATA_DEBUG 945 int spl1, spl2; 946 947 spl1 = splbio(); 948 spl2 = splbio(); 949 if (spl2 != spl1) { 950 printf("atastart: not at splbio()\n"); 951 panic("atastart"); 952 } 953 splx(spl2); 954 splx(spl1); 955 #endif /* ATA_DEBUG */ 956 957 /* is there a xfer ? */ 958 if ((xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer)) == NULL) 959 return; 960 961 /* adjust chp, in case we have a shared queue */ 962 chp = xfer->c_chp; 963 964 if (chp->ch_queue->active_xfer != NULL) { 965 return; /* channel aleady active */ 966 } 967 if (__predict_false(chp->ch_queue->queue_freeze > 0)) { 968 if (chp->ch_queue->queue_flags & QF_IDLE_WAIT) { 969 chp->ch_queue->queue_flags &= ~QF_IDLE_WAIT; 970 wakeup(&chp->ch_queue->queue_flags); 971 } 972 return; /* queue frozen */ 973 } 974 /* 975 * if someone is waiting for the command to be active, wake it up 976 * and let it process the command 977 */ 978 if (xfer->c_flags & C_WAITACT) { 979 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d " 980 "wait active\n", xfer, chp->ch_channel, xfer->c_drive), 981 DEBUG_XFERS); 982 wakeup(xfer); 983 return; 984 } 985 #ifdef DIAGNOSTIC 986 if ((chp->ch_flags & ATACH_IRQ_WAIT) != 0) 987 panic("atastart: channel waiting for irq"); 988 #endif 989 if (atac->atac_claim_hw) 990 if (!(*atac->atac_claim_hw)(chp, 0)) 991 return; 992 993 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d\n", xfer, 994 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 995 if (chp->ch_drive[xfer->c_drive].drive_flags & ATA_DRIVE_RESET) { 996 chp->ch_drive[xfer->c_drive].drive_flags &= ~ATA_DRIVE_RESET; 997 chp->ch_drive[xfer->c_drive].state = 0; 998 } 999 chp->ch_queue->active_xfer = xfer; 1000 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 1001 1002 if (atac->atac_cap & ATAC_CAP_NOIRQ) 1003 KASSERT(xfer->c_flags & C_POLL); 1004 1005 xfer->c_start(chp, xfer); 1006 } 1007 1008 struct ata_xfer * 1009 ata_get_xfer(int flags) 1010 { 1011 struct ata_xfer *xfer; 1012 int s; 1013 1014 s = splbio(); 1015 xfer = pool_get(&ata_xfer_pool, 1016 ((flags & ATAXF_NOSLEEP) != 0 ? PR_NOWAIT : PR_WAITOK)); 1017 splx(s); 1018 if (xfer != NULL) { 1019 memset(xfer, 0, sizeof(struct ata_xfer)); 1020 } 1021 return xfer; 1022 } 1023 1024 void 1025 ata_free_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 1026 { 1027 struct atac_softc *atac = chp->ch_atac; 1028 int s; 1029 1030 if (xfer->c_flags & C_WAITACT) { 1031 /* Someone is waiting for this xfer, so we can't free now */ 1032 xfer->c_flags |= C_FREE; 1033 wakeup(xfer); 1034 return; 1035 } 1036 1037 #if NATA_PIOBM /* XXX wdc dependent code */ 1038 if (xfer->c_flags & C_PIOBM) { 1039 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 1040 1041 /* finish the busmastering PIO */ 1042 (*wdc->piobm_done)(wdc->dma_arg, 1043 chp->ch_channel, xfer->c_drive); 1044 chp->ch_flags &= ~(ATACH_DMA_WAIT | ATACH_PIOBM_WAIT | ATACH_IRQ_WAIT); 1045 } 1046 #endif 1047 1048 if (atac->atac_free_hw) 1049 (*atac->atac_free_hw)(chp); 1050 s = splbio(); 1051 pool_put(&ata_xfer_pool, xfer); 1052 splx(s); 1053 } 1054 1055 /* 1056 * Kill off all pending xfers for a ata_channel. 1057 * 1058 * Must be called at splbio(). 1059 */ 1060 void 1061 ata_kill_pending(struct ata_drive_datas *drvp) 1062 { 1063 struct ata_channel *chp = drvp->chnl_softc; 1064 struct ata_xfer *xfer, *next_xfer; 1065 int s = splbio(); 1066 1067 for (xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer); 1068 xfer != NULL; xfer = next_xfer) { 1069 next_xfer = TAILQ_NEXT(xfer, c_xferchain); 1070 if (xfer->c_chp != chp || xfer->c_drive != drvp->drive) 1071 continue; 1072 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 1073 (*xfer->c_kill_xfer)(chp, xfer, KILL_GONE); 1074 } 1075 1076 while ((xfer = chp->ch_queue->active_xfer) != NULL) { 1077 if (xfer->c_chp == chp && xfer->c_drive == drvp->drive) { 1078 drvp->drive_flags |= ATA_DRIVE_WAITDRAIN; 1079 (void) tsleep(&chp->ch_queue->active_xfer, 1080 PRIBIO, "atdrn", 0); 1081 } else { 1082 /* no more xfer for us */ 1083 break; 1084 } 1085 } 1086 splx(s); 1087 } 1088 1089 /* 1090 * ata_reset_channel: 1091 * 1092 * Reset and ATA channel. 1093 * 1094 * MUST BE CALLED AT splbio()! 1095 */ 1096 void 1097 ata_reset_channel(struct ata_channel *chp, int flags) 1098 { 1099 struct atac_softc *atac = chp->ch_atac; 1100 int drive; 1101 1102 #ifdef ATA_DEBUG 1103 int spl1, spl2; 1104 1105 spl1 = splbio(); 1106 spl2 = splbio(); 1107 if (spl2 != spl1) { 1108 printf("ata_reset_channel: not at splbio()\n"); 1109 panic("ata_reset_channel"); 1110 } 1111 splx(spl2); 1112 splx(spl1); 1113 #endif /* ATA_DEBUG */ 1114 1115 chp->ch_queue->queue_freeze++; 1116 1117 /* 1118 * If we can poll or wait it's OK, otherwise wake up the 1119 * kernel thread to do it for us. 1120 */ 1121 ATADEBUG_PRINT(("ata_reset_channel flags 0x%x ch_flags 0x%x\n", 1122 flags, chp->ch_flags), DEBUG_FUNCS | DEBUG_XFERS); 1123 if ((flags & (AT_POLL | AT_WAIT)) == 0) { 1124 if (chp->ch_flags & ATACH_TH_RESET) { 1125 /* No need to schedule a reset more than one time. */ 1126 chp->ch_queue->queue_freeze--; 1127 return; 1128 } 1129 chp->ch_flags |= ATACH_TH_RESET; 1130 chp->ch_reset_flags = flags & (AT_RST_EMERG | AT_RST_NOCMD); 1131 wakeup(&chp->ch_thread); 1132 return; 1133 } 1134 1135 (*atac->atac_bustype_ata->ata_reset_channel)(chp, flags); 1136 1137 KASSERT(chp->ch_ndrives == 0 || chp->ch_drive != NULL); 1138 for (drive = 0; drive < chp->ch_ndrives; drive++) 1139 chp->ch_drive[drive].state = 0; 1140 1141 chp->ch_flags &= ~ATACH_TH_RESET; 1142 if ((flags & AT_RST_EMERG) == 0) { 1143 chp->ch_queue->queue_freeze--; 1144 atastart(chp); 1145 } else { 1146 /* make sure that we can use polled commands */ 1147 TAILQ_INIT(&chp->ch_queue->queue_xfer); 1148 chp->ch_queue->queue_freeze = 0; 1149 chp->ch_queue->active_xfer = NULL; 1150 } 1151 } 1152 1153 int 1154 ata_addref(struct ata_channel *chp) 1155 { 1156 struct atac_softc *atac = chp->ch_atac; 1157 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 1158 int s, error = 0; 1159 1160 s = splbio(); 1161 if (adapt->adapt_refcnt++ == 0 && 1162 adapt->adapt_enable != NULL) { 1163 error = (*adapt->adapt_enable)(atac->atac_dev, 1); 1164 if (error) 1165 adapt->adapt_refcnt--; 1166 } 1167 splx(s); 1168 return (error); 1169 } 1170 1171 void 1172 ata_delref(struct ata_channel *chp) 1173 { 1174 struct atac_softc *atac = chp->ch_atac; 1175 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 1176 int s; 1177 1178 s = splbio(); 1179 if (adapt->adapt_refcnt-- == 1 && 1180 adapt->adapt_enable != NULL) 1181 (void) (*adapt->adapt_enable)(atac->atac_dev, 0); 1182 splx(s); 1183 } 1184 1185 void 1186 ata_print_modes(struct ata_channel *chp) 1187 { 1188 struct atac_softc *atac = chp->ch_atac; 1189 int drive; 1190 struct ata_drive_datas *drvp; 1191 1192 KASSERT(chp->ch_ndrives == 0 || chp->ch_drive != NULL); 1193 for (drive = 0; drive < chp->ch_ndrives; drive++) { 1194 drvp = &chp->ch_drive[drive]; 1195 if (drvp->drive_type == ATA_DRIVET_NONE || 1196 drvp->drv_softc == NULL) 1197 continue; 1198 aprint_verbose("%s(%s:%d:%d): using PIO mode %d", 1199 device_xname(drvp->drv_softc), 1200 device_xname(atac->atac_dev), 1201 chp->ch_channel, drvp->drive, drvp->PIO_mode); 1202 #if NATA_DMA 1203 if (drvp->drive_flags & ATA_DRIVE_DMA) 1204 aprint_verbose(", DMA mode %d", drvp->DMA_mode); 1205 #if NATA_UDMA 1206 if (drvp->drive_flags & ATA_DRIVE_UDMA) { 1207 aprint_verbose(", Ultra-DMA mode %d", drvp->UDMA_mode); 1208 if (drvp->UDMA_mode == 2) 1209 aprint_verbose(" (Ultra/33)"); 1210 else if (drvp->UDMA_mode == 4) 1211 aprint_verbose(" (Ultra/66)"); 1212 else if (drvp->UDMA_mode == 5) 1213 aprint_verbose(" (Ultra/100)"); 1214 else if (drvp->UDMA_mode == 6) 1215 aprint_verbose(" (Ultra/133)"); 1216 } 1217 #endif /* NATA_UDMA */ 1218 #endif /* NATA_DMA */ 1219 #if NATA_DMA || NATA_PIOBM 1220 if (0 1221 #if NATA_DMA 1222 || (drvp->drive_flags & (ATA_DRIVE_DMA | ATA_DRIVE_UDMA)) 1223 #endif 1224 #if NATA_PIOBM 1225 /* PIOBM capable controllers use DMA for PIO commands */ 1226 || (atac->atac_cap & ATAC_CAP_PIOBM) 1227 #endif 1228 ) 1229 aprint_verbose(" (using DMA)"); 1230 #endif /* NATA_DMA || NATA_PIOBM */ 1231 aprint_verbose("\n"); 1232 } 1233 } 1234 1235 #if NATA_DMA 1236 /* 1237 * downgrade the transfer mode of a drive after an error. return 1 if 1238 * downgrade was possible, 0 otherwise. 1239 * 1240 * MUST BE CALLED AT splbio()! 1241 */ 1242 int 1243 ata_downgrade_mode(struct ata_drive_datas *drvp, int flags) 1244 { 1245 struct ata_channel *chp = drvp->chnl_softc; 1246 struct atac_softc *atac = chp->ch_atac; 1247 device_t drv_dev = drvp->drv_softc; 1248 int cf_flags = device_cfdata(drv_dev)->cf_flags; 1249 1250 /* if drive or controller don't know its mode, we can't do much */ 1251 if ((drvp->drive_flags & ATA_DRIVE_MODE) == 0 || 1252 (atac->atac_set_modes == NULL)) 1253 return 0; 1254 /* current drive mode was set by a config flag, let it this way */ 1255 if ((cf_flags & ATA_CONFIG_PIO_SET) || 1256 (cf_flags & ATA_CONFIG_DMA_SET) || 1257 (cf_flags & ATA_CONFIG_UDMA_SET)) 1258 return 0; 1259 1260 #if NATA_UDMA 1261 /* 1262 * If we were using Ultra-DMA mode, downgrade to the next lower mode. 1263 */ 1264 if ((drvp->drive_flags & ATA_DRIVE_UDMA) && drvp->UDMA_mode >= 2) { 1265 drvp->UDMA_mode--; 1266 aprint_error_dev(drv_dev, 1267 "transfer error, downgrading to Ultra-DMA mode %d\n", 1268 drvp->UDMA_mode); 1269 } 1270 #endif 1271 1272 /* 1273 * If we were using ultra-DMA, don't downgrade to multiword DMA. 1274 */ 1275 else if (drvp->drive_flags & (ATA_DRIVE_DMA | ATA_DRIVE_UDMA)) { 1276 drvp->drive_flags &= ~(ATA_DRIVE_DMA | ATA_DRIVE_UDMA); 1277 drvp->PIO_mode = drvp->PIO_cap; 1278 aprint_error_dev(drv_dev, 1279 "transfer error, downgrading to PIO mode %d\n", 1280 drvp->PIO_mode); 1281 } else /* already using PIO, can't downgrade */ 1282 return 0; 1283 1284 (*atac->atac_set_modes)(chp); 1285 ata_print_modes(chp); 1286 /* reset the channel, which will schedule all drives for setup */ 1287 ata_reset_channel(chp, flags | AT_RST_NOCMD); 1288 return 1; 1289 } 1290 #endif /* NATA_DMA */ 1291 1292 /* 1293 * Probe drive's capabilities, for use by the controller later 1294 * Assumes drvp points to an existing drive. 1295 */ 1296 void 1297 ata_probe_caps(struct ata_drive_datas *drvp) 1298 { 1299 struct ataparams params, params2; 1300 struct ata_channel *chp = drvp->chnl_softc; 1301 struct atac_softc *atac = chp->ch_atac; 1302 device_t drv_dev = drvp->drv_softc; 1303 int i, printed, s; 1304 const char *sep = ""; 1305 int cf_flags; 1306 1307 if (ata_get_params(drvp, AT_WAIT, ¶ms) != CMD_OK) { 1308 /* IDENTIFY failed. Can't tell more about the device */ 1309 return; 1310 } 1311 if ((atac->atac_cap & (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) == 1312 (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) { 1313 /* 1314 * Controller claims 16 and 32 bit transfers. 1315 * Re-do an IDENTIFY with 32-bit transfers, 1316 * and compare results. 1317 */ 1318 s = splbio(); 1319 drvp->drive_flags |= ATA_DRIVE_CAP32; 1320 splx(s); 1321 ata_get_params(drvp, AT_WAIT, ¶ms2); 1322 if (memcmp(¶ms, ¶ms2, sizeof(struct ataparams)) != 0) { 1323 /* Not good. fall back to 16bits */ 1324 s = splbio(); 1325 drvp->drive_flags &= ~ATA_DRIVE_CAP32; 1326 splx(s); 1327 } else { 1328 aprint_verbose_dev(drv_dev, "32-bit data port\n"); 1329 } 1330 } 1331 #if 0 /* Some ultra-DMA drives claims to only support ATA-3. sigh */ 1332 if (params.atap_ata_major > 0x01 && 1333 params.atap_ata_major != 0xffff) { 1334 for (i = 14; i > 0; i--) { 1335 if (params.atap_ata_major & (1 << i)) { 1336 aprint_verbose_dev(drv_dev, 1337 "ATA version %d\n", i); 1338 drvp->ata_vers = i; 1339 break; 1340 } 1341 } 1342 } 1343 #endif 1344 1345 /* An ATAPI device is at last PIO mode 3 */ 1346 if (drvp->drive_type == ATA_DRIVET_ATAPI) 1347 drvp->PIO_mode = 3; 1348 1349 /* 1350 * It's not in the specs, but it seems that some drive 1351 * returns 0xffff in atap_extensions when this field is invalid 1352 */ 1353 if (params.atap_extensions != 0xffff && 1354 (params.atap_extensions & WDC_EXT_MODES)) { 1355 printed = 0; 1356 /* 1357 * XXX some drives report something wrong here (they claim to 1358 * support PIO mode 8 !). As mode is coded on 3 bits in 1359 * SET FEATURE, limit it to 7 (so limit i to 4). 1360 * If higher mode than 7 is found, abort. 1361 */ 1362 for (i = 7; i >= 0; i--) { 1363 if ((params.atap_piomode_supp & (1 << i)) == 0) 1364 continue; 1365 if (i > 4) 1366 return; 1367 /* 1368 * See if mode is accepted. 1369 * If the controller can't set its PIO mode, 1370 * assume the defaults are good, so don't try 1371 * to set it 1372 */ 1373 if (atac->atac_set_modes) 1374 /* 1375 * It's OK to pool here, it's fast enough 1376 * to not bother waiting for interrupt 1377 */ 1378 if (ata_set_mode(drvp, 0x08 | (i + 3), 1379 AT_WAIT) != CMD_OK) 1380 continue; 1381 if (!printed) { 1382 aprint_verbose_dev(drv_dev, 1383 "drive supports PIO mode %d", i + 3); 1384 sep = ","; 1385 printed = 1; 1386 } 1387 /* 1388 * If controller's driver can't set its PIO mode, 1389 * get the highter one for the drive. 1390 */ 1391 if (atac->atac_set_modes == NULL || 1392 atac->atac_pio_cap >= i + 3) { 1393 drvp->PIO_mode = i + 3; 1394 drvp->PIO_cap = i + 3; 1395 break; 1396 } 1397 } 1398 if (!printed) { 1399 /* 1400 * We didn't find a valid PIO mode. 1401 * Assume the values returned for DMA are buggy too 1402 */ 1403 return; 1404 } 1405 s = splbio(); 1406 drvp->drive_flags |= ATA_DRIVE_MODE; 1407 splx(s); 1408 printed = 0; 1409 for (i = 7; i >= 0; i--) { 1410 if ((params.atap_dmamode_supp & (1 << i)) == 0) 1411 continue; 1412 #if NATA_DMA 1413 if ((atac->atac_cap & ATAC_CAP_DMA) && 1414 atac->atac_set_modes != NULL) 1415 if (ata_set_mode(drvp, 0x20 | i, AT_WAIT) 1416 != CMD_OK) 1417 continue; 1418 #endif 1419 if (!printed) { 1420 aprint_verbose("%s DMA mode %d", sep, i); 1421 sep = ","; 1422 printed = 1; 1423 } 1424 #if NATA_DMA 1425 if (atac->atac_cap & ATAC_CAP_DMA) { 1426 if (atac->atac_set_modes != NULL && 1427 atac->atac_dma_cap < i) 1428 continue; 1429 drvp->DMA_mode = i; 1430 drvp->DMA_cap = i; 1431 s = splbio(); 1432 drvp->drive_flags |= ATA_DRIVE_DMA; 1433 splx(s); 1434 } 1435 #endif 1436 break; 1437 } 1438 if (params.atap_extensions & WDC_EXT_UDMA_MODES) { 1439 printed = 0; 1440 for (i = 7; i >= 0; i--) { 1441 if ((params.atap_udmamode_supp & (1 << i)) 1442 == 0) 1443 continue; 1444 #if NATA_UDMA 1445 if (atac->atac_set_modes != NULL && 1446 (atac->atac_cap & ATAC_CAP_UDMA)) 1447 if (ata_set_mode(drvp, 0x40 | i, 1448 AT_WAIT) != CMD_OK) 1449 continue; 1450 #endif 1451 if (!printed) { 1452 aprint_verbose("%s Ultra-DMA mode %d", 1453 sep, i); 1454 if (i == 2) 1455 aprint_verbose(" (Ultra/33)"); 1456 else if (i == 4) 1457 aprint_verbose(" (Ultra/66)"); 1458 else if (i == 5) 1459 aprint_verbose(" (Ultra/100)"); 1460 else if (i == 6) 1461 aprint_verbose(" (Ultra/133)"); 1462 sep = ","; 1463 printed = 1; 1464 } 1465 #if NATA_UDMA 1466 if (atac->atac_cap & ATAC_CAP_UDMA) { 1467 if (atac->atac_set_modes != NULL && 1468 atac->atac_udma_cap < i) 1469 continue; 1470 drvp->UDMA_mode = i; 1471 drvp->UDMA_cap = i; 1472 s = splbio(); 1473 drvp->drive_flags |= ATA_DRIVE_UDMA; 1474 splx(s); 1475 } 1476 #endif 1477 break; 1478 } 1479 } 1480 aprint_verbose("\n"); 1481 } 1482 1483 s = splbio(); 1484 drvp->drive_flags &= ~ATA_DRIVE_NOSTREAM; 1485 if (drvp->drive_type == ATA_DRIVET_ATAPI) { 1486 if (atac->atac_cap & ATAC_CAP_ATAPI_NOSTREAM) 1487 drvp->drive_flags |= ATA_DRIVE_NOSTREAM; 1488 } else { 1489 if (atac->atac_cap & ATAC_CAP_ATA_NOSTREAM) 1490 drvp->drive_flags |= ATA_DRIVE_NOSTREAM; 1491 } 1492 splx(s); 1493 1494 /* Try to guess ATA version here, if it didn't get reported */ 1495 if (drvp->ata_vers == 0) { 1496 #if NATA_UDMA 1497 if (drvp->drive_flags & ATA_DRIVE_UDMA) 1498 drvp->ata_vers = 4; /* should be at last ATA-4 */ 1499 else 1500 #endif 1501 if (drvp->PIO_cap > 2) 1502 drvp->ata_vers = 2; /* should be at last ATA-2 */ 1503 } 1504 cf_flags = device_cfdata(drv_dev)->cf_flags; 1505 if (cf_flags & ATA_CONFIG_PIO_SET) { 1506 s = splbio(); 1507 drvp->PIO_mode = 1508 (cf_flags & ATA_CONFIG_PIO_MODES) >> ATA_CONFIG_PIO_OFF; 1509 drvp->drive_flags |= ATA_DRIVE_MODE; 1510 splx(s); 1511 } 1512 #if NATA_DMA 1513 if ((atac->atac_cap & ATAC_CAP_DMA) == 0) { 1514 /* don't care about DMA modes */ 1515 return; 1516 } 1517 if (cf_flags & ATA_CONFIG_DMA_SET) { 1518 s = splbio(); 1519 if ((cf_flags & ATA_CONFIG_DMA_MODES) == 1520 ATA_CONFIG_DMA_DISABLE) { 1521 drvp->drive_flags &= ~ATA_DRIVE_DMA; 1522 } else { 1523 drvp->DMA_mode = (cf_flags & ATA_CONFIG_DMA_MODES) >> 1524 ATA_CONFIG_DMA_OFF; 1525 drvp->drive_flags |= ATA_DRIVE_DMA | ATA_DRIVE_MODE; 1526 } 1527 splx(s); 1528 } 1529 #if NATA_UDMA 1530 if ((atac->atac_cap & ATAC_CAP_UDMA) == 0) { 1531 /* don't care about UDMA modes */ 1532 return; 1533 } 1534 if (cf_flags & ATA_CONFIG_UDMA_SET) { 1535 s = splbio(); 1536 if ((cf_flags & ATA_CONFIG_UDMA_MODES) == 1537 ATA_CONFIG_UDMA_DISABLE) { 1538 drvp->drive_flags &= ~ATA_DRIVE_UDMA; 1539 } else { 1540 drvp->UDMA_mode = (cf_flags & ATA_CONFIG_UDMA_MODES) >> 1541 ATA_CONFIG_UDMA_OFF; 1542 drvp->drive_flags |= ATA_DRIVE_UDMA | ATA_DRIVE_MODE; 1543 } 1544 splx(s); 1545 } 1546 #endif /* NATA_UDMA */ 1547 #endif /* NATA_DMA */ 1548 } 1549 1550 /* management of the /dev/atabus* devices */ 1551 int 1552 atabusopen(dev_t dev, int flag, int fmt, struct lwp *l) 1553 { 1554 struct atabus_softc *sc; 1555 int error; 1556 1557 sc = device_lookup_private(&atabus_cd, minor(dev)); 1558 if (sc == NULL) 1559 return (ENXIO); 1560 1561 if (sc->sc_flags & ATABUSCF_OPEN) 1562 return (EBUSY); 1563 1564 if ((error = ata_addref(sc->sc_chan)) != 0) 1565 return (error); 1566 1567 sc->sc_flags |= ATABUSCF_OPEN; 1568 1569 return (0); 1570 } 1571 1572 1573 int 1574 atabusclose(dev_t dev, int flag, int fmt, struct lwp *l) 1575 { 1576 struct atabus_softc *sc = 1577 device_lookup_private(&atabus_cd, minor(dev)); 1578 1579 ata_delref(sc->sc_chan); 1580 1581 sc->sc_flags &= ~ATABUSCF_OPEN; 1582 1583 return (0); 1584 } 1585 1586 int 1587 atabusioctl(dev_t dev, u_long cmd, void *addr, int flag, struct lwp *l) 1588 { 1589 struct atabus_softc *sc = 1590 device_lookup_private(&atabus_cd, minor(dev)); 1591 struct ata_channel *chp = sc->sc_chan; 1592 int min_drive, max_drive, drive; 1593 int error; 1594 int s; 1595 1596 /* 1597 * Enforce write permission for ioctls that change the 1598 * state of the bus. Host adapter specific ioctls must 1599 * be checked by the adapter driver. 1600 */ 1601 switch (cmd) { 1602 case ATABUSIOSCAN: 1603 case ATABUSIODETACH: 1604 case ATABUSIORESET: 1605 if ((flag & FWRITE) == 0) 1606 return (EBADF); 1607 } 1608 1609 switch (cmd) { 1610 case ATABUSIORESET: 1611 s = splbio(); 1612 ata_reset_channel(sc->sc_chan, AT_WAIT | AT_POLL); 1613 splx(s); 1614 return 0; 1615 case ATABUSIOSCAN: 1616 { 1617 #if 0 1618 struct atabusioscan_args *a= 1619 (struct atabusioscan_args *)addr; 1620 #endif 1621 if ((chp->ch_drive[0].drive_type == ATA_DRIVET_OLD) || 1622 (chp->ch_drive[1].drive_type == ATA_DRIVET_OLD)) 1623 return (EOPNOTSUPP); 1624 return (EOPNOTSUPP); 1625 } 1626 case ATABUSIODETACH: 1627 { 1628 struct atabusiodetach_args *a= 1629 (struct atabusiodetach_args *)addr; 1630 if ((chp->ch_drive[0].drive_type == ATA_DRIVET_OLD) || 1631 (chp->ch_drive[1].drive_type == ATA_DRIVET_OLD)) 1632 return (EOPNOTSUPP); 1633 switch (a->at_dev) { 1634 case -1: 1635 min_drive = 0; 1636 max_drive = 1; 1637 break; 1638 case 0: 1639 case 1: 1640 min_drive = max_drive = a->at_dev; 1641 break; 1642 default: 1643 return (EINVAL); 1644 } 1645 for (drive = min_drive; drive <= max_drive; drive++) { 1646 if (chp->ch_drive[drive].drv_softc != NULL) { 1647 error = config_detach( 1648 chp->ch_drive[drive].drv_softc, 0); 1649 if (error) 1650 return (error); 1651 KASSERT(chp->ch_drive[drive].drv_softc == NULL); 1652 } 1653 } 1654 return 0; 1655 } 1656 default: 1657 return ENOTTY; 1658 } 1659 } 1660 1661 static bool 1662 atabus_suspend(device_t dv, const pmf_qual_t *qual) 1663 { 1664 struct atabus_softc *sc = device_private(dv); 1665 struct ata_channel *chp = sc->sc_chan; 1666 1667 ata_queue_idle(chp->ch_queue); 1668 1669 return true; 1670 } 1671 1672 static bool 1673 atabus_resume(device_t dv, const pmf_qual_t *qual) 1674 { 1675 struct atabus_softc *sc = device_private(dv); 1676 struct ata_channel *chp = sc->sc_chan; 1677 int s; 1678 1679 /* 1680 * XXX joerg: with wdc, the first channel unfreezes the controler. 1681 * Move this the reset and queue idling into wdc. 1682 */ 1683 s = splbio(); 1684 if (chp->ch_queue->queue_freeze == 0) { 1685 splx(s); 1686 return true; 1687 } 1688 KASSERT(chp->ch_queue->queue_freeze > 0); 1689 /* unfreeze the queue and reset drives */ 1690 chp->ch_queue->queue_freeze--; 1691 1692 /* reset channel only if there are drives attached */ 1693 if (chp->ch_ndrives > 0) 1694 ata_reset_channel(chp, AT_WAIT); 1695 splx(s); 1696 1697 return true; 1698 } 1699 1700 static int 1701 atabus_rescan(device_t self, const char *ifattr, const int *locators) 1702 { 1703 struct atabus_softc *sc = device_private(self); 1704 struct ata_channel *chp = sc->sc_chan; 1705 struct atabus_initq *initq; 1706 int i; 1707 1708 /* 1709 * we can rescan a port multiplier atabus, even if some devices are 1710 * still attached 1711 */ 1712 if (chp->ch_satapmp_nports == 0) { 1713 if (chp->atapibus != NULL) { 1714 return EBUSY; 1715 } 1716 1717 KASSERT(chp->ch_ndrives == 0 || chp->ch_drive != NULL); 1718 for (i = 0; i < chp->ch_ndrives; i++) { 1719 if (chp->ch_drive[i].drv_softc != NULL) { 1720 return EBUSY; 1721 } 1722 } 1723 } 1724 1725 initq = malloc(sizeof(*initq), M_DEVBUF, M_WAITOK); 1726 initq->atabus_sc = sc; 1727 TAILQ_INSERT_TAIL(&atabus_initq_head, initq, atabus_initq); 1728 config_pending_incr(sc->sc_dev); 1729 1730 chp->ch_flags |= ATACH_TH_RESCAN; 1731 wakeup(&chp->ch_thread); 1732 1733 return 0; 1734 } 1735 1736 void 1737 ata_delay(int ms, const char *msg, int flags) 1738 { 1739 if ((flags & (AT_WAIT | AT_POLL)) == AT_POLL) { 1740 /* 1741 * can't use tsleep(), we may be in interrupt context 1742 * or taking a crash dump 1743 */ 1744 delay(ms * 1000); 1745 } else { 1746 kpause(msg, false, mstohz(ms), NULL); 1747 } 1748 } 1749