1 /* $NetBSD: ata.c,v 1.129 2013/10/12 16:49:00 christos Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __KERNEL_RCSID(0, "$NetBSD: ata.c,v 1.129 2013/10/12 16:49:00 christos Exp $"); 29 30 #include "opt_ata.h" 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/kernel.h> 35 #include <sys/malloc.h> 36 #include <sys/device.h> 37 #include <sys/conf.h> 38 #include <sys/fcntl.h> 39 #include <sys/proc.h> 40 #include <sys/pool.h> 41 #include <sys/kthread.h> 42 #include <sys/errno.h> 43 #include <sys/ataio.h> 44 #include <sys/kmem.h> 45 #include <sys/intr.h> 46 #include <sys/bus.h> 47 #include <sys/once.h> 48 49 #include <dev/ata/ataconf.h> 50 #include <dev/ata/atareg.h> 51 #include <dev/ata/atavar.h> 52 #include <dev/ic/wdcvar.h> /* for PIOBM */ 53 54 #include "locators.h" 55 56 #include "atapibus.h" 57 #include "ataraid.h" 58 #include "sata_pmp.h" 59 60 #if NATARAID > 0 61 #include <dev/ata/ata_raidvar.h> 62 #endif 63 #if NSATA_PMP > 0 64 #include <dev/ata/satapmpvar.h> 65 #endif 66 #include <dev/ata/satapmpreg.h> 67 68 #define DEBUG_FUNCS 0x08 69 #define DEBUG_PROBE 0x10 70 #define DEBUG_DETACH 0x20 71 #define DEBUG_XFERS 0x40 72 #ifdef ATADEBUG 73 #ifndef ATADEBUG_MASK 74 #define ATADEBUG_MASK 0 75 #endif 76 int atadebug_mask = ATADEBUG_MASK; 77 #define ATADEBUG_PRINT(args, level) \ 78 if (atadebug_mask & (level)) \ 79 printf args 80 #else 81 #define ATADEBUG_PRINT(args, level) 82 #endif 83 84 static ONCE_DECL(ata_init_ctrl); 85 static struct pool ata_xfer_pool; 86 87 /* 88 * A queue of atabus instances, used to ensure the same bus probe order 89 * for a given hardware configuration at each boot. Kthread probing 90 * devices on a atabus. Only one probing at once. 91 */ 92 static TAILQ_HEAD(, atabus_initq) atabus_initq_head; 93 static kmutex_t atabus_qlock; 94 static kcondvar_t atabus_qcv; 95 static lwp_t * atabus_cfg_lwp; 96 97 /***************************************************************************** 98 * ATA bus layer. 99 * 100 * ATA controllers attach an atabus instance, which handles probing the bus 101 * for drives, etc. 102 *****************************************************************************/ 103 104 dev_type_open(atabusopen); 105 dev_type_close(atabusclose); 106 dev_type_ioctl(atabusioctl); 107 108 const struct cdevsw atabus_cdevsw = { 109 atabusopen, atabusclose, noread, nowrite, atabusioctl, 110 nostop, notty, nopoll, nommap, nokqfilter, D_OTHER 111 }; 112 113 extern struct cfdriver atabus_cd; 114 115 static void atabus_childdetached(device_t, device_t); 116 static int atabus_rescan(device_t, const char *, const int *); 117 static bool atabus_resume(device_t, const pmf_qual_t *); 118 static bool atabus_suspend(device_t, const pmf_qual_t *); 119 static void atabusconfig_thread(void *); 120 121 /* 122 * atabus_init: 123 * 124 * Initialize ATA subsystem structures. 125 */ 126 static int 127 atabus_init(void) 128 { 129 130 pool_init(&ata_xfer_pool, sizeof(struct ata_xfer), 0, 0, 0, 131 "ataspl", NULL, IPL_BIO); 132 TAILQ_INIT(&atabus_initq_head); 133 mutex_init(&atabus_qlock, MUTEX_DEFAULT, IPL_NONE); 134 cv_init(&atabus_qcv, "atainitq"); 135 return 0; 136 } 137 138 /* 139 * atabusprint: 140 * 141 * Autoconfiguration print routine used by ATA controllers when 142 * attaching an atabus instance. 143 */ 144 int 145 atabusprint(void *aux, const char *pnp) 146 { 147 struct ata_channel *chan = aux; 148 149 if (pnp) 150 aprint_normal("atabus at %s", pnp); 151 aprint_normal(" channel %d", chan->ch_channel); 152 153 return (UNCONF); 154 } 155 156 /* 157 * ataprint: 158 * 159 * Autoconfiguration print routine. 160 */ 161 int 162 ataprint(void *aux, const char *pnp) 163 { 164 struct ata_device *adev = aux; 165 166 if (pnp) 167 aprint_normal("wd at %s", pnp); 168 aprint_normal(" drive %d", adev->adev_drv_data->drive); 169 170 return (UNCONF); 171 } 172 173 /* 174 * ata_channel_attach: 175 * 176 * Common parts of attaching an atabus to an ATA controller channel. 177 */ 178 void 179 ata_channel_attach(struct ata_channel *chp) 180 { 181 182 if (chp->ch_flags & ATACH_DISABLED) 183 return; 184 185 /* XXX callout_destroy */ 186 callout_init(&chp->ch_callout, 0); 187 188 TAILQ_INIT(&chp->ch_queue->queue_xfer); 189 chp->ch_queue->queue_freeze = 0; 190 chp->ch_queue->queue_flags = 0; 191 chp->ch_queue->active_xfer = NULL; 192 193 chp->atabus = config_found_ia(chp->ch_atac->atac_dev, "ata", chp, 194 atabusprint); 195 } 196 197 static void 198 atabusconfig(struct atabus_softc *atabus_sc) 199 { 200 struct ata_channel *chp = atabus_sc->sc_chan; 201 struct atac_softc *atac = chp->ch_atac; 202 struct atabus_initq *atabus_initq = NULL; 203 int i, s, error; 204 205 /* we are in the atabus's thread context */ 206 s = splbio(); 207 chp->ch_flags |= ATACH_TH_RUN; 208 splx(s); 209 210 /* 211 * Probe for the drives attached to controller, unless a PMP 212 * is already known 213 */ 214 /* XXX for SATA devices we will power up all drives at once */ 215 if (chp->ch_satapmp_nports == 0) 216 (*atac->atac_probe)(chp); 217 218 if (chp->ch_ndrives >= 2) { 219 ATADEBUG_PRINT(("atabusattach: ch_drive_type 0x%x 0x%x\n", 220 chp->ch_drive[0].drive_type, chp->ch_drive[1].drive_type), 221 DEBUG_PROBE); 222 } 223 224 /* next operations will occurs in a separate thread */ 225 s = splbio(); 226 chp->ch_flags &= ~ATACH_TH_RUN; 227 splx(s); 228 229 /* Make sure the devices probe in atabus order to avoid jitter. */ 230 mutex_enter(&atabus_qlock); 231 for (;;) { 232 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 233 if (atabus_initq->atabus_sc == atabus_sc) 234 break; 235 cv_wait(&atabus_qcv, &atabus_qlock); 236 } 237 mutex_exit(&atabus_qlock); 238 239 /* If no drives, abort here */ 240 if (chp->ch_drive == NULL) 241 goto out; 242 KASSERT(chp->ch_ndrives == 0 || chp->ch_drive != NULL); 243 for (i = 0; i < chp->ch_ndrives; i++) 244 if (chp->ch_drive[i].drive_type != ATA_DRIVET_NONE) 245 break; 246 if (i == chp->ch_ndrives) 247 goto out; 248 249 /* Shortcut in case we've been shutdown */ 250 if (chp->ch_flags & ATACH_SHUTDOWN) 251 goto out; 252 253 if ((error = kthread_create(PRI_NONE, 0, NULL, atabusconfig_thread, 254 atabus_sc, &atabus_cfg_lwp, 255 "%scnf", device_xname(atac->atac_dev))) != 0) 256 aprint_error_dev(atac->atac_dev, 257 "unable to create config thread: error %d\n", error); 258 return; 259 260 out: 261 mutex_enter(&atabus_qlock); 262 TAILQ_REMOVE(&atabus_initq_head, atabus_initq, atabus_initq); 263 cv_broadcast(&atabus_qcv); 264 mutex_exit(&atabus_qlock); 265 266 free(atabus_initq, M_DEVBUF); 267 268 ata_delref(chp); 269 270 config_pending_decr(atac->atac_dev); 271 } 272 273 /* 274 * atabus_configthread: finish attach of atabus's childrens, in a separate 275 * kernel thread. 276 */ 277 static void 278 atabusconfig_thread(void *arg) 279 { 280 struct atabus_softc *atabus_sc = arg; 281 struct ata_channel *chp = atabus_sc->sc_chan; 282 struct atac_softc *atac = chp->ch_atac; 283 struct atabus_initq *atabus_initq = NULL; 284 int i, s; 285 286 /* XXX seems wrong */ 287 mutex_enter(&atabus_qlock); 288 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 289 KASSERT(atabus_initq->atabus_sc == atabus_sc); 290 mutex_exit(&atabus_qlock); 291 292 /* 293 * First look for a port multiplier 294 */ 295 if (chp->ch_ndrives == PMP_MAX_DRIVES && 296 chp->ch_drive[PMP_PORT_CTL].drive_type == ATA_DRIVET_PM) { 297 #if NSATA_PMP > 0 298 satapmp_attach(chp); 299 #else 300 aprint_error_dev(atabus_sc->sc_dev, 301 "SATA port multiplier not supported\n"); 302 /* no problems going on, all drives are ATA_DRIVET_NONE */ 303 #endif 304 } 305 306 /* 307 * Attach an ATAPI bus, if needed. 308 */ 309 KASSERT(chp->ch_ndrives == 0 || chp->ch_drive != NULL); 310 for (i = 0; i < chp->ch_ndrives && chp->atapibus == NULL; i++) { 311 if (chp->ch_drive[i].drive_type == ATA_DRIVET_ATAPI) { 312 #if NATAPIBUS > 0 313 (*atac->atac_atapibus_attach)(atabus_sc); 314 #else 315 /* 316 * Fake the autoconfig "not configured" message 317 */ 318 aprint_normal("atapibus at %s not configured\n", 319 device_xname(atac->atac_dev)); 320 chp->atapibus = NULL; 321 s = splbio(); 322 for (i = 0; i < chp->ch_ndrives; i++) { 323 if (chp->ch_drive[i].drive_type == ATA_DRIVET_ATAPI) 324 chp->ch_drive[i].drive_type = ATA_DRIVET_NONE; 325 } 326 splx(s); 327 #endif 328 break; 329 } 330 } 331 332 for (i = 0; i < chp->ch_ndrives; i++) { 333 struct ata_device adev; 334 if (chp->ch_drive[i].drive_type != ATA_DRIVET_ATA && 335 chp->ch_drive[i].drive_type != ATA_DRIVET_OLD) { 336 continue; 337 } 338 if (chp->ch_drive[i].drv_softc != NULL) 339 continue; 340 memset(&adev, 0, sizeof(struct ata_device)); 341 adev.adev_bustype = atac->atac_bustype_ata; 342 adev.adev_channel = chp->ch_channel; 343 adev.adev_openings = 1; 344 adev.adev_drv_data = &chp->ch_drive[i]; 345 chp->ch_drive[i].drv_softc = config_found_ia(atabus_sc->sc_dev, 346 "ata_hl", &adev, ataprint); 347 if (chp->ch_drive[i].drv_softc != NULL) { 348 ata_probe_caps(&chp->ch_drive[i]); 349 } else { 350 s = splbio(); 351 chp->ch_drive[i].drive_type = ATA_DRIVET_NONE; 352 splx(s); 353 } 354 } 355 356 /* now that we know the drives, the controller can set its modes */ 357 if (atac->atac_set_modes) { 358 (*atac->atac_set_modes)(chp); 359 ata_print_modes(chp); 360 } 361 #if NATARAID > 0 362 if (atac->atac_cap & ATAC_CAP_RAID) { 363 for (i = 0; i < chp->ch_ndrives; i++) { 364 if (chp->ch_drive[i].drive_type == ATA_DRIVET_ATA) { 365 ata_raid_check_component( 366 chp->ch_drive[i].drv_softc); 367 } 368 } 369 } 370 #endif /* NATARAID > 0 */ 371 372 /* 373 * reset drive_flags for unattached devices, reset state for attached 374 * ones 375 */ 376 s = splbio(); 377 for (i = 0; i < chp->ch_ndrives; i++) { 378 if (chp->ch_drive[i].drive_type == ATA_DRIVET_PM) 379 continue; 380 if (chp->ch_drive[i].drv_softc == NULL) { 381 chp->ch_drive[i].drive_flags = 0; 382 chp->ch_drive[i].drive_type = ATA_DRIVET_NONE; 383 } else 384 chp->ch_drive[i].state = 0; 385 } 386 splx(s); 387 388 mutex_enter(&atabus_qlock); 389 TAILQ_REMOVE(&atabus_initq_head, atabus_initq, atabus_initq); 390 cv_broadcast(&atabus_qcv); 391 mutex_exit(&atabus_qlock); 392 393 free(atabus_initq, M_DEVBUF); 394 395 ata_delref(chp); 396 397 config_pending_decr(atac->atac_dev); 398 kthread_exit(0); 399 } 400 401 /* 402 * atabus_thread: 403 * 404 * Worker thread for the ATA bus. 405 */ 406 static void 407 atabus_thread(void *arg) 408 { 409 struct atabus_softc *sc = arg; 410 struct ata_channel *chp = sc->sc_chan; 411 struct ata_xfer *xfer; 412 int i, s; 413 414 s = splbio(); 415 chp->ch_flags |= ATACH_TH_RUN; 416 417 /* 418 * Probe the drives. Reset type to indicate to controllers 419 * that can re-probe that all drives must be probed.. 420 * 421 * Note: ch_ndrives may be changed during the probe. 422 */ 423 KASSERT(chp->ch_ndrives == 0 || chp->ch_drive != NULL); 424 for (i = 0; i < chp->ch_ndrives; i++) { 425 chp->ch_drive[i].drive_flags = 0; 426 chp->ch_drive[i].drive_type = ATA_DRIVET_NONE; 427 } 428 splx(s); 429 430 atabusconfig(sc); 431 432 s = splbio(); 433 for (;;) { 434 if ((chp->ch_flags & (ATACH_TH_RESET | ATACH_SHUTDOWN)) == 0 && 435 (chp->ch_queue->active_xfer == NULL || 436 chp->ch_queue->queue_freeze == 0)) { 437 chp->ch_flags &= ~ATACH_TH_RUN; 438 (void) tsleep(&chp->ch_thread, PRIBIO, "atath", 0); 439 chp->ch_flags |= ATACH_TH_RUN; 440 } 441 if (chp->ch_flags & ATACH_SHUTDOWN) { 442 break; 443 } 444 if (chp->ch_flags & ATACH_TH_RESCAN) { 445 atabusconfig(sc); 446 chp->ch_flags &= ~ATACH_TH_RESCAN; 447 } 448 if (chp->ch_flags & ATACH_TH_RESET) { 449 /* 450 * ata_reset_channel() will freeze 2 times, so 451 * unfreeze one time. Not a problem as we're at splbio 452 */ 453 chp->ch_queue->queue_freeze--; 454 ata_reset_channel(chp, AT_WAIT | chp->ch_reset_flags); 455 } else if (chp->ch_queue->active_xfer != NULL && 456 chp->ch_queue->queue_freeze == 1) { 457 /* 458 * Caller has bumped queue_freeze, decrease it. 459 */ 460 chp->ch_queue->queue_freeze--; 461 xfer = chp->ch_queue->active_xfer; 462 KASSERT(xfer != NULL); 463 (*xfer->c_start)(xfer->c_chp, xfer); 464 } else if (chp->ch_queue->queue_freeze > 1) 465 panic("ata_thread: queue_freeze"); 466 } 467 splx(s); 468 chp->ch_thread = NULL; 469 wakeup(&chp->ch_flags); 470 kthread_exit(0); 471 } 472 473 /* 474 * atabus_match: 475 * 476 * Autoconfiguration match routine. 477 */ 478 static int 479 atabus_match(device_t parent, cfdata_t cf, void *aux) 480 { 481 struct ata_channel *chp = aux; 482 483 if (chp == NULL) 484 return (0); 485 486 if (cf->cf_loc[ATACF_CHANNEL] != chp->ch_channel && 487 cf->cf_loc[ATACF_CHANNEL] != ATACF_CHANNEL_DEFAULT) 488 return (0); 489 490 return (1); 491 } 492 493 /* 494 * atabus_attach: 495 * 496 * Autoconfiguration attach routine. 497 */ 498 static void 499 atabus_attach(device_t parent, device_t self, void *aux) 500 { 501 struct atabus_softc *sc = device_private(self); 502 struct ata_channel *chp = aux; 503 struct atabus_initq *initq; 504 int error; 505 506 sc->sc_chan = chp; 507 508 aprint_normal("\n"); 509 aprint_naive("\n"); 510 511 sc->sc_dev = self; 512 513 if (ata_addref(chp)) 514 return; 515 516 RUN_ONCE(&ata_init_ctrl, atabus_init); 517 518 initq = malloc(sizeof(*initq), M_DEVBUF, M_WAITOK); 519 initq->atabus_sc = sc; 520 TAILQ_INSERT_TAIL(&atabus_initq_head, initq, atabus_initq); 521 config_pending_incr(sc->sc_dev); 522 523 if ((error = kthread_create(PRI_NONE, 0, NULL, atabus_thread, sc, 524 &chp->ch_thread, "%s", device_xname(self))) != 0) 525 aprint_error_dev(self, 526 "unable to create kernel thread: error %d\n", error); 527 528 if (!pmf_device_register(self, atabus_suspend, atabus_resume)) 529 aprint_error_dev(self, "couldn't establish power handler\n"); 530 } 531 532 /* 533 * atabus_detach: 534 * 535 * Autoconfiguration detach routine. 536 */ 537 static int 538 atabus_detach(device_t self, int flags) 539 { 540 struct atabus_softc *sc = device_private(self); 541 struct ata_channel *chp = sc->sc_chan; 542 device_t dev = NULL; 543 int s, i, error = 0; 544 545 /* Shutdown the channel. */ 546 s = splbio(); /* XXX ALSO NEED AN INTERLOCK HERE. */ 547 chp->ch_flags |= ATACH_SHUTDOWN; 548 splx(s); 549 550 wakeup(&chp->ch_thread); 551 552 while (chp->ch_thread != NULL) 553 (void) tsleep(&chp->ch_flags, PRIBIO, "atadown", 0); 554 555 556 /* 557 * Detach atapibus and its children. 558 */ 559 if ((dev = chp->atapibus) != NULL) { 560 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n", 561 device_xname(self), device_xname(dev)), DEBUG_DETACH); 562 563 error = config_detach(dev, flags); 564 if (error) 565 goto out; 566 KASSERT(chp->atapibus == NULL); 567 } 568 569 KASSERT(chp->ch_ndrives == 0 || chp->ch_drive != NULL); 570 571 /* 572 * Detach our other children. 573 */ 574 for (i = 0; i < chp->ch_ndrives; i++) { 575 if (chp->ch_drive[i].drive_type == ATA_DRIVET_ATAPI) 576 continue; 577 if (chp->ch_drive[i].drive_type == ATA_DRIVET_PM) 578 chp->ch_drive[i].drive_type = ATA_DRIVET_NONE; 579 if ((dev = chp->ch_drive[i].drv_softc) != NULL) { 580 ATADEBUG_PRINT(("%s.%d: %s: detaching %s\n", __func__, 581 __LINE__, device_xname(self), device_xname(dev)), 582 DEBUG_DETACH); 583 error = config_detach(dev, flags); 584 if (error) 585 goto out; 586 KASSERT(chp->ch_drive[i].drv_softc == NULL); 587 KASSERT(chp->ch_drive[i].drive_type == 0); 588 } 589 } 590 atabus_free_drives(chp); 591 592 out: 593 #ifdef ATADEBUG 594 if (dev != NULL && error != 0) 595 ATADEBUG_PRINT(("%s: %s: error %d detaching %s\n", __func__, 596 device_xname(self), error, device_xname(dev)), 597 DEBUG_DETACH); 598 #endif /* ATADEBUG */ 599 600 return (error); 601 } 602 603 void 604 atabus_childdetached(device_t self, device_t child) 605 { 606 bool found = false; 607 struct atabus_softc *sc = device_private(self); 608 struct ata_channel *chp = sc->sc_chan; 609 int i; 610 611 KASSERT(chp->ch_ndrives == 0 || chp->ch_drive != NULL); 612 /* 613 * atapibus detached. 614 */ 615 if (child == chp->atapibus) { 616 chp->atapibus = NULL; 617 found = true; 618 for (i = 0; i < chp->ch_ndrives; i++) { 619 if (chp->ch_drive[i].drive_type != ATA_DRIVET_ATAPI) 620 continue; 621 KASSERT(chp->ch_drive[i].drv_softc != NULL); 622 chp->ch_drive[i].drv_softc = NULL; 623 chp->ch_drive[i].drive_flags = 0; 624 chp->ch_drive[i].drive_type = ATA_DRIVET_NONE; 625 } 626 } 627 628 /* 629 * Detach our other children. 630 */ 631 for (i = 0; i < chp->ch_ndrives; i++) { 632 if (chp->ch_drive[i].drive_type == ATA_DRIVET_ATAPI) 633 continue; 634 if (child == chp->ch_drive[i].drv_softc) { 635 chp->ch_drive[i].drv_softc = NULL; 636 chp->ch_drive[i].drive_flags = 0; 637 if (chp->ch_drive[i].drive_type == ATA_DRIVET_PM) 638 chp->ch_satapmp_nports = 0; 639 chp->ch_drive[i].drive_type = ATA_DRIVET_NONE; 640 found = true; 641 } 642 } 643 644 if (!found) 645 panic("%s: unknown child %p", device_xname(self), 646 (const void *)child); 647 } 648 649 CFATTACH_DECL3_NEW(atabus, sizeof(struct atabus_softc), 650 atabus_match, atabus_attach, atabus_detach, NULL, atabus_rescan, 651 atabus_childdetached, DVF_DETACH_SHUTDOWN); 652 653 /***************************************************************************** 654 * Common ATA bus operations. 655 *****************************************************************************/ 656 657 /* allocate/free the channel's ch_drive[] array */ 658 int 659 atabus_alloc_drives(struct ata_channel *chp, int ndrives) 660 { 661 int i; 662 if (chp->ch_ndrives != ndrives) 663 atabus_free_drives(chp); 664 if (chp->ch_drive == NULL) { 665 chp->ch_drive = malloc( 666 sizeof(struct ata_drive_datas) * ndrives, 667 M_DEVBUF, M_NOWAIT | M_ZERO); 668 } 669 if (chp->ch_drive == NULL) { 670 aprint_error_dev(chp->ch_atac->atac_dev, 671 "can't alloc drive array\n"); 672 chp->ch_ndrives = 0; 673 return ENOMEM; 674 }; 675 for (i = 0; i < ndrives; i++) { 676 chp->ch_drive[i].chnl_softc = chp; 677 chp->ch_drive[i].drive = i; 678 } 679 chp->ch_ndrives = ndrives; 680 return 0; 681 } 682 683 void 684 atabus_free_drives(struct ata_channel *chp) 685 { 686 #ifdef DIAGNOSTIC 687 int i; 688 int dopanic = 0; 689 KASSERT(chp->ch_ndrives == 0 || chp->ch_drive != NULL); 690 for (i = 0; i < chp->ch_ndrives; i++) { 691 if (chp->ch_drive[i].drive_type != ATA_DRIVET_NONE) { 692 printf("%s: ch_drive[%d] type %d != ATA_DRIVET_NONE\n", 693 device_xname(chp->atabus), i, 694 chp->ch_drive[i].drive_type); 695 dopanic = 1; 696 } 697 if (chp->ch_drive[i].drv_softc != NULL) { 698 printf("%s: ch_drive[%d] attached to %s\n", 699 device_xname(chp->atabus), i, 700 device_xname(chp->ch_drive[i].drv_softc)); 701 dopanic = 1; 702 } 703 } 704 if (dopanic) 705 panic("atabus_free_drives"); 706 #endif 707 708 if (chp->ch_drive == NULL) 709 return; 710 chp->ch_ndrives = 0; 711 free(chp->ch_drive, M_DEVBUF); 712 chp->ch_drive = NULL; 713 } 714 715 /* Get the disk's parameters */ 716 int 717 ata_get_params(struct ata_drive_datas *drvp, u_int8_t flags, 718 struct ataparams *prms) 719 { 720 struct ata_command ata_c; 721 struct ata_channel *chp = drvp->chnl_softc; 722 struct atac_softc *atac = chp->ch_atac; 723 char *tb; 724 int i, rv; 725 u_int16_t *p; 726 727 ATADEBUG_PRINT(("%s\n", __func__), DEBUG_FUNCS); 728 729 tb = kmem_zalloc(DEV_BSIZE, KM_SLEEP); 730 memset(prms, 0, sizeof(struct ataparams)); 731 memset(&ata_c, 0, sizeof(struct ata_command)); 732 733 if (drvp->drive_type == ATA_DRIVET_ATA) { 734 ata_c.r_command = WDCC_IDENTIFY; 735 ata_c.r_st_bmask = WDCS_DRDY; 736 ata_c.r_st_pmask = WDCS_DRQ; 737 ata_c.timeout = 3000; /* 3s */ 738 } else if (drvp->drive_type == ATA_DRIVET_ATAPI) { 739 ata_c.r_command = ATAPI_IDENTIFY_DEVICE; 740 ata_c.r_st_bmask = 0; 741 ata_c.r_st_pmask = WDCS_DRQ; 742 ata_c.timeout = 10000; /* 10s */ 743 } else { 744 ATADEBUG_PRINT(("ata_get_parms: no disks\n"), 745 DEBUG_FUNCS|DEBUG_PROBE); 746 rv = CMD_ERR; 747 goto out; 748 } 749 ata_c.flags = AT_READ | flags; 750 ata_c.data = tb; 751 ata_c.bcount = DEV_BSIZE; 752 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 753 &ata_c) != ATACMD_COMPLETE) { 754 ATADEBUG_PRINT(("ata_get_parms: wdc_exec_command failed\n"), 755 DEBUG_FUNCS|DEBUG_PROBE); 756 rv = CMD_AGAIN; 757 goto out; 758 } 759 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 760 ATADEBUG_PRINT(("ata_get_parms: ata_c.flags=0x%x\n", 761 ata_c.flags), DEBUG_FUNCS|DEBUG_PROBE); 762 rv = CMD_ERR; 763 goto out; 764 } 765 /* if we didn't read any data something is wrong */ 766 if ((ata_c.flags & AT_XFDONE) == 0) { 767 rv = CMD_ERR; 768 goto out; 769 } 770 771 /* Read in parameter block. */ 772 memcpy(prms, tb, sizeof(struct ataparams)); 773 774 /* 775 * Shuffle string byte order. 776 * ATAPI NEC, Mitsumi and Pioneer drives and 777 * old ATA TDK CompactFlash cards 778 * have different byte order. 779 */ 780 #if BYTE_ORDER == BIG_ENDIAN 781 # define M(n) prms->atap_model[(n) ^ 1] 782 #else 783 # define M(n) prms->atap_model[n] 784 #endif 785 if ( 786 #if BYTE_ORDER == BIG_ENDIAN 787 ! 788 #endif 789 ((drvp->drive_type == ATA_DRIVET_ATAPI) ? 790 ((M(0) == 'N' && M(1) == 'E') || 791 (M(0) == 'F' && M(1) == 'X') || 792 (M(0) == 'P' && M(1) == 'i')) : 793 ((M(0) == 'T' && M(1) == 'D' && M(2) == 'K')))) { 794 rv = CMD_OK; 795 goto out; 796 } 797 #undef M 798 for (i = 0; i < sizeof(prms->atap_model); i += 2) { 799 p = (u_int16_t *)(prms->atap_model + i); 800 *p = bswap16(*p); 801 } 802 for (i = 0; i < sizeof(prms->atap_serial); i += 2) { 803 p = (u_int16_t *)(prms->atap_serial + i); 804 *p = bswap16(*p); 805 } 806 for (i = 0; i < sizeof(prms->atap_revision); i += 2) { 807 p = (u_int16_t *)(prms->atap_revision + i); 808 *p = bswap16(*p); 809 } 810 811 rv = CMD_OK; 812 out: 813 kmem_free(tb, DEV_BSIZE); 814 return rv; 815 } 816 817 int 818 ata_set_mode(struct ata_drive_datas *drvp, u_int8_t mode, u_int8_t flags) 819 { 820 struct ata_command ata_c; 821 struct ata_channel *chp = drvp->chnl_softc; 822 struct atac_softc *atac = chp->ch_atac; 823 824 ATADEBUG_PRINT(("ata_set_mode=0x%x\n", mode), DEBUG_FUNCS); 825 memset(&ata_c, 0, sizeof(struct ata_command)); 826 827 ata_c.r_command = SET_FEATURES; 828 ata_c.r_st_bmask = 0; 829 ata_c.r_st_pmask = 0; 830 ata_c.r_features = WDSF_SET_MODE; 831 ata_c.r_count = mode; 832 ata_c.flags = flags; 833 ata_c.timeout = 1000; /* 1s */ 834 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 835 &ata_c) != ATACMD_COMPLETE) 836 return CMD_AGAIN; 837 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 838 return CMD_ERR; 839 } 840 return CMD_OK; 841 } 842 843 #if NATA_DMA 844 void 845 ata_dmaerr(struct ata_drive_datas *drvp, int flags) 846 { 847 /* 848 * Downgrade decision: if we get NERRS_MAX in NXFER. 849 * We start with n_dmaerrs set to NERRS_MAX-1 so that the 850 * first error within the first NXFER ops will immediatly trigger 851 * a downgrade. 852 * If we got an error and n_xfers is bigger than NXFER reset counters. 853 */ 854 drvp->n_dmaerrs++; 855 if (drvp->n_dmaerrs >= NERRS_MAX && drvp->n_xfers <= NXFER) { 856 ata_downgrade_mode(drvp, flags); 857 drvp->n_dmaerrs = NERRS_MAX-1; 858 drvp->n_xfers = 0; 859 return; 860 } 861 if (drvp->n_xfers > NXFER) { 862 drvp->n_dmaerrs = 1; /* just got an error */ 863 drvp->n_xfers = 1; /* restart counting from this error */ 864 } 865 } 866 #endif /* NATA_DMA */ 867 868 /* 869 * freeze the queue and wait for the controller to be idle. Caller has to 870 * unfreeze/restart the queue 871 */ 872 void 873 ata_queue_idle(struct ata_queue *queue) 874 { 875 int s = splbio(); 876 queue->queue_freeze++; 877 while (queue->active_xfer != NULL) { 878 queue->queue_flags |= QF_IDLE_WAIT; 879 tsleep(&queue->queue_flags, PRIBIO, "qidl", 0); 880 } 881 splx(s); 882 } 883 884 /* 885 * Add a command to the queue and start controller. 886 * 887 * MUST BE CALLED AT splbio()! 888 */ 889 void 890 ata_exec_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 891 { 892 893 ATADEBUG_PRINT(("ata_exec_xfer %p channel %d drive %d\n", xfer, 894 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 895 896 /* complete xfer setup */ 897 xfer->c_chp = chp; 898 899 /* insert at the end of command list */ 900 TAILQ_INSERT_TAIL(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 901 ATADEBUG_PRINT(("atastart from ata_exec_xfer, flags 0x%x\n", 902 chp->ch_flags), DEBUG_XFERS); 903 /* 904 * if polling and can sleep, wait for the xfer to be at head of queue 905 */ 906 if ((xfer->c_flags & (C_POLL | C_WAIT)) == (C_POLL | C_WAIT)) { 907 while (chp->ch_queue->active_xfer != NULL || 908 TAILQ_FIRST(&chp->ch_queue->queue_xfer) != xfer) { 909 xfer->c_flags |= C_WAITACT; 910 tsleep(xfer, PRIBIO, "ataact", 0); 911 xfer->c_flags &= ~C_WAITACT; 912 if (xfer->c_flags & C_FREE) { 913 ata_free_xfer(chp, xfer); 914 return; 915 } 916 } 917 } 918 atastart(chp); 919 } 920 921 /* 922 * Start I/O on a controller, for the given channel. 923 * The first xfer may be not for our channel if the channel queues 924 * are shared. 925 * 926 * MUST BE CALLED AT splbio()! 927 */ 928 void 929 atastart(struct ata_channel *chp) 930 { 931 struct atac_softc *atac = chp->ch_atac; 932 struct ata_xfer *xfer; 933 934 #ifdef ATA_DEBUG 935 int spl1, spl2; 936 937 spl1 = splbio(); 938 spl2 = splbio(); 939 if (spl2 != spl1) { 940 printf("atastart: not at splbio()\n"); 941 panic("atastart"); 942 } 943 splx(spl2); 944 splx(spl1); 945 #endif /* ATA_DEBUG */ 946 947 /* is there a xfer ? */ 948 if ((xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer)) == NULL) 949 return; 950 951 /* adjust chp, in case we have a shared queue */ 952 chp = xfer->c_chp; 953 954 if (chp->ch_queue->active_xfer != NULL) { 955 return; /* channel aleady active */ 956 } 957 if (__predict_false(chp->ch_queue->queue_freeze > 0)) { 958 if (chp->ch_queue->queue_flags & QF_IDLE_WAIT) { 959 chp->ch_queue->queue_flags &= ~QF_IDLE_WAIT; 960 wakeup(&chp->ch_queue->queue_flags); 961 } 962 return; /* queue frozen */ 963 } 964 /* 965 * if someone is waiting for the command to be active, wake it up 966 * and let it process the command 967 */ 968 if (xfer->c_flags & C_WAITACT) { 969 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d " 970 "wait active\n", xfer, chp->ch_channel, xfer->c_drive), 971 DEBUG_XFERS); 972 wakeup(xfer); 973 return; 974 } 975 #ifdef DIAGNOSTIC 976 if ((chp->ch_flags & ATACH_IRQ_WAIT) != 0) 977 panic("atastart: channel waiting for irq"); 978 #endif 979 if (atac->atac_claim_hw) 980 if (!(*atac->atac_claim_hw)(chp, 0)) 981 return; 982 983 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d\n", xfer, 984 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 985 if (chp->ch_drive[xfer->c_drive].drive_flags & ATA_DRIVE_RESET) { 986 chp->ch_drive[xfer->c_drive].drive_flags &= ~ATA_DRIVE_RESET; 987 chp->ch_drive[xfer->c_drive].state = 0; 988 } 989 chp->ch_queue->active_xfer = xfer; 990 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 991 992 if (atac->atac_cap & ATAC_CAP_NOIRQ) 993 KASSERT(xfer->c_flags & C_POLL); 994 995 xfer->c_start(chp, xfer); 996 } 997 998 struct ata_xfer * 999 ata_get_xfer(int flags) 1000 { 1001 struct ata_xfer *xfer; 1002 int s; 1003 1004 s = splbio(); 1005 xfer = pool_get(&ata_xfer_pool, 1006 ((flags & ATAXF_NOSLEEP) != 0 ? PR_NOWAIT : PR_WAITOK)); 1007 splx(s); 1008 if (xfer != NULL) { 1009 memset(xfer, 0, sizeof(struct ata_xfer)); 1010 } 1011 return xfer; 1012 } 1013 1014 void 1015 ata_free_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 1016 { 1017 struct atac_softc *atac = chp->ch_atac; 1018 int s; 1019 1020 if (xfer->c_flags & C_WAITACT) { 1021 /* Someone is waiting for this xfer, so we can't free now */ 1022 xfer->c_flags |= C_FREE; 1023 wakeup(xfer); 1024 return; 1025 } 1026 1027 #if NATA_PIOBM /* XXX wdc dependent code */ 1028 if (xfer->c_flags & C_PIOBM) { 1029 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 1030 1031 /* finish the busmastering PIO */ 1032 (*wdc->piobm_done)(wdc->dma_arg, 1033 chp->ch_channel, xfer->c_drive); 1034 chp->ch_flags &= ~(ATACH_DMA_WAIT | ATACH_PIOBM_WAIT | ATACH_IRQ_WAIT); 1035 } 1036 #endif 1037 1038 if (atac->atac_free_hw) 1039 (*atac->atac_free_hw)(chp); 1040 s = splbio(); 1041 pool_put(&ata_xfer_pool, xfer); 1042 splx(s); 1043 } 1044 1045 /* 1046 * Kill off all pending xfers for a ata_channel. 1047 * 1048 * Must be called at splbio(). 1049 */ 1050 void 1051 ata_kill_pending(struct ata_drive_datas *drvp) 1052 { 1053 struct ata_channel *chp = drvp->chnl_softc; 1054 struct ata_xfer *xfer, *next_xfer; 1055 int s = splbio(); 1056 1057 for (xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer); 1058 xfer != NULL; xfer = next_xfer) { 1059 next_xfer = TAILQ_NEXT(xfer, c_xferchain); 1060 if (xfer->c_chp != chp || xfer->c_drive != drvp->drive) 1061 continue; 1062 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 1063 (*xfer->c_kill_xfer)(chp, xfer, KILL_GONE); 1064 } 1065 1066 while ((xfer = chp->ch_queue->active_xfer) != NULL) { 1067 if (xfer->c_chp == chp && xfer->c_drive == drvp->drive) { 1068 drvp->drive_flags |= ATA_DRIVE_WAITDRAIN; 1069 (void) tsleep(&chp->ch_queue->active_xfer, 1070 PRIBIO, "atdrn", 0); 1071 } else { 1072 /* no more xfer for us */ 1073 break; 1074 } 1075 } 1076 splx(s); 1077 } 1078 1079 /* 1080 * ata_reset_channel: 1081 * 1082 * Reset and ATA channel. 1083 * 1084 * MUST BE CALLED AT splbio()! 1085 */ 1086 void 1087 ata_reset_channel(struct ata_channel *chp, int flags) 1088 { 1089 struct atac_softc *atac = chp->ch_atac; 1090 int drive; 1091 1092 #ifdef ATA_DEBUG 1093 int spl1, spl2; 1094 1095 spl1 = splbio(); 1096 spl2 = splbio(); 1097 if (spl2 != spl1) { 1098 printf("ata_reset_channel: not at splbio()\n"); 1099 panic("ata_reset_channel"); 1100 } 1101 splx(spl2); 1102 splx(spl1); 1103 #endif /* ATA_DEBUG */ 1104 1105 chp->ch_queue->queue_freeze++; 1106 1107 /* 1108 * If we can poll or wait it's OK, otherwise wake up the 1109 * kernel thread to do it for us. 1110 */ 1111 ATADEBUG_PRINT(("ata_reset_channel flags 0x%x ch_flags 0x%x\n", 1112 flags, chp->ch_flags), DEBUG_FUNCS | DEBUG_XFERS); 1113 if ((flags & (AT_POLL | AT_WAIT)) == 0) { 1114 if (chp->ch_flags & ATACH_TH_RESET) { 1115 /* No need to schedule a reset more than one time. */ 1116 chp->ch_queue->queue_freeze--; 1117 return; 1118 } 1119 chp->ch_flags |= ATACH_TH_RESET; 1120 chp->ch_reset_flags = flags & (AT_RST_EMERG | AT_RST_NOCMD); 1121 wakeup(&chp->ch_thread); 1122 return; 1123 } 1124 1125 (*atac->atac_bustype_ata->ata_reset_channel)(chp, flags); 1126 1127 KASSERT(chp->ch_ndrives == 0 || chp->ch_drive != NULL); 1128 for (drive = 0; drive < chp->ch_ndrives; drive++) 1129 chp->ch_drive[drive].state = 0; 1130 1131 chp->ch_flags &= ~ATACH_TH_RESET; 1132 if ((flags & AT_RST_EMERG) == 0) { 1133 chp->ch_queue->queue_freeze--; 1134 atastart(chp); 1135 } else { 1136 /* make sure that we can use polled commands */ 1137 TAILQ_INIT(&chp->ch_queue->queue_xfer); 1138 chp->ch_queue->queue_freeze = 0; 1139 chp->ch_queue->active_xfer = NULL; 1140 } 1141 } 1142 1143 int 1144 ata_addref(struct ata_channel *chp) 1145 { 1146 struct atac_softc *atac = chp->ch_atac; 1147 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 1148 int s, error = 0; 1149 1150 s = splbio(); 1151 if (adapt->adapt_refcnt++ == 0 && 1152 adapt->adapt_enable != NULL) { 1153 error = (*adapt->adapt_enable)(atac->atac_dev, 1); 1154 if (error) 1155 adapt->adapt_refcnt--; 1156 } 1157 splx(s); 1158 return (error); 1159 } 1160 1161 void 1162 ata_delref(struct ata_channel *chp) 1163 { 1164 struct atac_softc *atac = chp->ch_atac; 1165 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 1166 int s; 1167 1168 s = splbio(); 1169 if (adapt->adapt_refcnt-- == 1 && 1170 adapt->adapt_enable != NULL) 1171 (void) (*adapt->adapt_enable)(atac->atac_dev, 0); 1172 splx(s); 1173 } 1174 1175 void 1176 ata_print_modes(struct ata_channel *chp) 1177 { 1178 struct atac_softc *atac = chp->ch_atac; 1179 int drive; 1180 struct ata_drive_datas *drvp; 1181 1182 KASSERT(chp->ch_ndrives == 0 || chp->ch_drive != NULL); 1183 for (drive = 0; drive < chp->ch_ndrives; drive++) { 1184 drvp = &chp->ch_drive[drive]; 1185 if (drvp->drive_type == ATA_DRIVET_NONE || 1186 drvp->drv_softc == NULL) 1187 continue; 1188 aprint_verbose("%s(%s:%d:%d): using PIO mode %d", 1189 device_xname(drvp->drv_softc), 1190 device_xname(atac->atac_dev), 1191 chp->ch_channel, drvp->drive, drvp->PIO_mode); 1192 #if NATA_DMA 1193 if (drvp->drive_flags & ATA_DRIVE_DMA) 1194 aprint_verbose(", DMA mode %d", drvp->DMA_mode); 1195 #if NATA_UDMA 1196 if (drvp->drive_flags & ATA_DRIVE_UDMA) { 1197 aprint_verbose(", Ultra-DMA mode %d", drvp->UDMA_mode); 1198 if (drvp->UDMA_mode == 2) 1199 aprint_verbose(" (Ultra/33)"); 1200 else if (drvp->UDMA_mode == 4) 1201 aprint_verbose(" (Ultra/66)"); 1202 else if (drvp->UDMA_mode == 5) 1203 aprint_verbose(" (Ultra/100)"); 1204 else if (drvp->UDMA_mode == 6) 1205 aprint_verbose(" (Ultra/133)"); 1206 } 1207 #endif /* NATA_UDMA */ 1208 #endif /* NATA_DMA */ 1209 #if NATA_DMA || NATA_PIOBM 1210 if (0 1211 #if NATA_DMA 1212 || (drvp->drive_flags & (ATA_DRIVE_DMA | ATA_DRIVE_UDMA)) 1213 #endif 1214 #if NATA_PIOBM 1215 /* PIOBM capable controllers use DMA for PIO commands */ 1216 || (atac->atac_cap & ATAC_CAP_PIOBM) 1217 #endif 1218 ) 1219 aprint_verbose(" (using DMA)"); 1220 #endif /* NATA_DMA || NATA_PIOBM */ 1221 aprint_verbose("\n"); 1222 } 1223 } 1224 1225 #if NATA_DMA 1226 /* 1227 * downgrade the transfer mode of a drive after an error. return 1 if 1228 * downgrade was possible, 0 otherwise. 1229 * 1230 * MUST BE CALLED AT splbio()! 1231 */ 1232 int 1233 ata_downgrade_mode(struct ata_drive_datas *drvp, int flags) 1234 { 1235 struct ata_channel *chp = drvp->chnl_softc; 1236 struct atac_softc *atac = chp->ch_atac; 1237 device_t drv_dev = drvp->drv_softc; 1238 int cf_flags = device_cfdata(drv_dev)->cf_flags; 1239 1240 /* if drive or controller don't know its mode, we can't do much */ 1241 if ((drvp->drive_flags & ATA_DRIVE_MODE) == 0 || 1242 (atac->atac_set_modes == NULL)) 1243 return 0; 1244 /* current drive mode was set by a config flag, let it this way */ 1245 if ((cf_flags & ATA_CONFIG_PIO_SET) || 1246 (cf_flags & ATA_CONFIG_DMA_SET) || 1247 (cf_flags & ATA_CONFIG_UDMA_SET)) 1248 return 0; 1249 1250 #if NATA_UDMA 1251 /* 1252 * If we were using Ultra-DMA mode, downgrade to the next lower mode. 1253 */ 1254 if ((drvp->drive_flags & ATA_DRIVE_UDMA) && drvp->UDMA_mode >= 2) { 1255 drvp->UDMA_mode--; 1256 aprint_error_dev(drv_dev, 1257 "transfer error, downgrading to Ultra-DMA mode %d\n", 1258 drvp->UDMA_mode); 1259 } 1260 #endif 1261 1262 /* 1263 * If we were using ultra-DMA, don't downgrade to multiword DMA. 1264 */ 1265 else if (drvp->drive_flags & (ATA_DRIVE_DMA | ATA_DRIVE_UDMA)) { 1266 drvp->drive_flags &= ~(ATA_DRIVE_DMA | ATA_DRIVE_UDMA); 1267 drvp->PIO_mode = drvp->PIO_cap; 1268 aprint_error_dev(drv_dev, 1269 "transfer error, downgrading to PIO mode %d\n", 1270 drvp->PIO_mode); 1271 } else /* already using PIO, can't downgrade */ 1272 return 0; 1273 1274 (*atac->atac_set_modes)(chp); 1275 ata_print_modes(chp); 1276 /* reset the channel, which will schedule all drives for setup */ 1277 ata_reset_channel(chp, flags | AT_RST_NOCMD); 1278 return 1; 1279 } 1280 #endif /* NATA_DMA */ 1281 1282 /* 1283 * Probe drive's capabilities, for use by the controller later 1284 * Assumes drvp points to an existing drive. 1285 */ 1286 void 1287 ata_probe_caps(struct ata_drive_datas *drvp) 1288 { 1289 struct ataparams params, params2; 1290 struct ata_channel *chp = drvp->chnl_softc; 1291 struct atac_softc *atac = chp->ch_atac; 1292 device_t drv_dev = drvp->drv_softc; 1293 int i, printed, s; 1294 const char *sep = ""; 1295 int cf_flags; 1296 1297 if (ata_get_params(drvp, AT_WAIT, ¶ms) != CMD_OK) { 1298 /* IDENTIFY failed. Can't tell more about the device */ 1299 return; 1300 } 1301 if ((atac->atac_cap & (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) == 1302 (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) { 1303 /* 1304 * Controller claims 16 and 32 bit transfers. 1305 * Re-do an IDENTIFY with 32-bit transfers, 1306 * and compare results. 1307 */ 1308 s = splbio(); 1309 drvp->drive_flags |= ATA_DRIVE_CAP32; 1310 splx(s); 1311 ata_get_params(drvp, AT_WAIT, ¶ms2); 1312 if (memcmp(¶ms, ¶ms2, sizeof(struct ataparams)) != 0) { 1313 /* Not good. fall back to 16bits */ 1314 s = splbio(); 1315 drvp->drive_flags &= ~ATA_DRIVE_CAP32; 1316 splx(s); 1317 } else { 1318 aprint_verbose_dev(drv_dev, "32-bit data port\n"); 1319 } 1320 } 1321 #if 0 /* Some ultra-DMA drives claims to only support ATA-3. sigh */ 1322 if (params.atap_ata_major > 0x01 && 1323 params.atap_ata_major != 0xffff) { 1324 for (i = 14; i > 0; i--) { 1325 if (params.atap_ata_major & (1 << i)) { 1326 aprint_verbose_dev(drv_dev, 1327 "ATA version %d\n", i); 1328 drvp->ata_vers = i; 1329 break; 1330 } 1331 } 1332 } 1333 #endif 1334 1335 /* An ATAPI device is at last PIO mode 3 */ 1336 if (drvp->drive_type == ATA_DRIVET_ATAPI) 1337 drvp->PIO_mode = 3; 1338 1339 /* 1340 * It's not in the specs, but it seems that some drive 1341 * returns 0xffff in atap_extensions when this field is invalid 1342 */ 1343 if (params.atap_extensions != 0xffff && 1344 (params.atap_extensions & WDC_EXT_MODES)) { 1345 printed = 0; 1346 /* 1347 * XXX some drives report something wrong here (they claim to 1348 * support PIO mode 8 !). As mode is coded on 3 bits in 1349 * SET FEATURE, limit it to 7 (so limit i to 4). 1350 * If higher mode than 7 is found, abort. 1351 */ 1352 for (i = 7; i >= 0; i--) { 1353 if ((params.atap_piomode_supp & (1 << i)) == 0) 1354 continue; 1355 if (i > 4) 1356 return; 1357 /* 1358 * See if mode is accepted. 1359 * If the controller can't set its PIO mode, 1360 * assume the defaults are good, so don't try 1361 * to set it 1362 */ 1363 if (atac->atac_set_modes) 1364 /* 1365 * It's OK to pool here, it's fast enough 1366 * to not bother waiting for interrupt 1367 */ 1368 if (ata_set_mode(drvp, 0x08 | (i + 3), 1369 AT_WAIT) != CMD_OK) 1370 continue; 1371 if (!printed) { 1372 aprint_verbose_dev(drv_dev, 1373 "drive supports PIO mode %d", i + 3); 1374 sep = ","; 1375 printed = 1; 1376 } 1377 /* 1378 * If controller's driver can't set its PIO mode, 1379 * get the highter one for the drive. 1380 */ 1381 if (atac->atac_set_modes == NULL || 1382 atac->atac_pio_cap >= i + 3) { 1383 drvp->PIO_mode = i + 3; 1384 drvp->PIO_cap = i + 3; 1385 break; 1386 } 1387 } 1388 if (!printed) { 1389 /* 1390 * We didn't find a valid PIO mode. 1391 * Assume the values returned for DMA are buggy too 1392 */ 1393 return; 1394 } 1395 s = splbio(); 1396 drvp->drive_flags |= ATA_DRIVE_MODE; 1397 splx(s); 1398 printed = 0; 1399 for (i = 7; i >= 0; i--) { 1400 if ((params.atap_dmamode_supp & (1 << i)) == 0) 1401 continue; 1402 #if NATA_DMA 1403 if ((atac->atac_cap & ATAC_CAP_DMA) && 1404 atac->atac_set_modes != NULL) 1405 if (ata_set_mode(drvp, 0x20 | i, AT_WAIT) 1406 != CMD_OK) 1407 continue; 1408 #endif 1409 if (!printed) { 1410 aprint_verbose("%s DMA mode %d", sep, i); 1411 sep = ","; 1412 printed = 1; 1413 } 1414 #if NATA_DMA 1415 if (atac->atac_cap & ATAC_CAP_DMA) { 1416 if (atac->atac_set_modes != NULL && 1417 atac->atac_dma_cap < i) 1418 continue; 1419 drvp->DMA_mode = i; 1420 drvp->DMA_cap = i; 1421 s = splbio(); 1422 drvp->drive_flags |= ATA_DRIVE_DMA; 1423 splx(s); 1424 } 1425 #endif 1426 break; 1427 } 1428 if (params.atap_extensions & WDC_EXT_UDMA_MODES) { 1429 printed = 0; 1430 for (i = 7; i >= 0; i--) { 1431 if ((params.atap_udmamode_supp & (1 << i)) 1432 == 0) 1433 continue; 1434 #if NATA_UDMA 1435 if (atac->atac_set_modes != NULL && 1436 (atac->atac_cap & ATAC_CAP_UDMA)) 1437 if (ata_set_mode(drvp, 0x40 | i, 1438 AT_WAIT) != CMD_OK) 1439 continue; 1440 #endif 1441 if (!printed) { 1442 aprint_verbose("%s Ultra-DMA mode %d", 1443 sep, i); 1444 if (i == 2) 1445 aprint_verbose(" (Ultra/33)"); 1446 else if (i == 4) 1447 aprint_verbose(" (Ultra/66)"); 1448 else if (i == 5) 1449 aprint_verbose(" (Ultra/100)"); 1450 else if (i == 6) 1451 aprint_verbose(" (Ultra/133)"); 1452 sep = ","; 1453 printed = 1; 1454 } 1455 #if NATA_UDMA 1456 if (atac->atac_cap & ATAC_CAP_UDMA) { 1457 if (atac->atac_set_modes != NULL && 1458 atac->atac_udma_cap < i) 1459 continue; 1460 drvp->UDMA_mode = i; 1461 drvp->UDMA_cap = i; 1462 s = splbio(); 1463 drvp->drive_flags |= ATA_DRIVE_UDMA; 1464 splx(s); 1465 } 1466 #endif 1467 break; 1468 } 1469 } 1470 aprint_verbose("\n"); 1471 } 1472 1473 s = splbio(); 1474 drvp->drive_flags &= ~ATA_DRIVE_NOSTREAM; 1475 if (drvp->drive_type == ATA_DRIVET_ATAPI) { 1476 if (atac->atac_cap & ATAC_CAP_ATAPI_NOSTREAM) 1477 drvp->drive_flags |= ATA_DRIVE_NOSTREAM; 1478 } else { 1479 if (atac->atac_cap & ATAC_CAP_ATA_NOSTREAM) 1480 drvp->drive_flags |= ATA_DRIVE_NOSTREAM; 1481 } 1482 splx(s); 1483 1484 /* Try to guess ATA version here, if it didn't get reported */ 1485 if (drvp->ata_vers == 0) { 1486 #if NATA_UDMA 1487 if (drvp->drive_flags & ATA_DRIVE_UDMA) 1488 drvp->ata_vers = 4; /* should be at last ATA-4 */ 1489 else 1490 #endif 1491 if (drvp->PIO_cap > 2) 1492 drvp->ata_vers = 2; /* should be at last ATA-2 */ 1493 } 1494 cf_flags = device_cfdata(drv_dev)->cf_flags; 1495 if (cf_flags & ATA_CONFIG_PIO_SET) { 1496 s = splbio(); 1497 drvp->PIO_mode = 1498 (cf_flags & ATA_CONFIG_PIO_MODES) >> ATA_CONFIG_PIO_OFF; 1499 drvp->drive_flags |= ATA_DRIVE_MODE; 1500 splx(s); 1501 } 1502 #if NATA_DMA 1503 if ((atac->atac_cap & ATAC_CAP_DMA) == 0) { 1504 /* don't care about DMA modes */ 1505 return; 1506 } 1507 if (cf_flags & ATA_CONFIG_DMA_SET) { 1508 s = splbio(); 1509 if ((cf_flags & ATA_CONFIG_DMA_MODES) == 1510 ATA_CONFIG_DMA_DISABLE) { 1511 drvp->drive_flags &= ~ATA_DRIVE_DMA; 1512 } else { 1513 drvp->DMA_mode = (cf_flags & ATA_CONFIG_DMA_MODES) >> 1514 ATA_CONFIG_DMA_OFF; 1515 drvp->drive_flags |= ATA_DRIVE_DMA | ATA_DRIVE_MODE; 1516 } 1517 splx(s); 1518 } 1519 #if NATA_UDMA 1520 if ((atac->atac_cap & ATAC_CAP_UDMA) == 0) { 1521 /* don't care about UDMA modes */ 1522 return; 1523 } 1524 if (cf_flags & ATA_CONFIG_UDMA_SET) { 1525 s = splbio(); 1526 if ((cf_flags & ATA_CONFIG_UDMA_MODES) == 1527 ATA_CONFIG_UDMA_DISABLE) { 1528 drvp->drive_flags &= ~ATA_DRIVE_UDMA; 1529 } else { 1530 drvp->UDMA_mode = (cf_flags & ATA_CONFIG_UDMA_MODES) >> 1531 ATA_CONFIG_UDMA_OFF; 1532 drvp->drive_flags |= ATA_DRIVE_UDMA | ATA_DRIVE_MODE; 1533 } 1534 splx(s); 1535 } 1536 #endif /* NATA_UDMA */ 1537 #endif /* NATA_DMA */ 1538 } 1539 1540 /* management of the /dev/atabus* devices */ 1541 int 1542 atabusopen(dev_t dev, int flag, int fmt, struct lwp *l) 1543 { 1544 struct atabus_softc *sc; 1545 int error; 1546 1547 sc = device_lookup_private(&atabus_cd, minor(dev)); 1548 if (sc == NULL) 1549 return (ENXIO); 1550 1551 if (sc->sc_flags & ATABUSCF_OPEN) 1552 return (EBUSY); 1553 1554 if ((error = ata_addref(sc->sc_chan)) != 0) 1555 return (error); 1556 1557 sc->sc_flags |= ATABUSCF_OPEN; 1558 1559 return (0); 1560 } 1561 1562 1563 int 1564 atabusclose(dev_t dev, int flag, int fmt, struct lwp *l) 1565 { 1566 struct atabus_softc *sc = 1567 device_lookup_private(&atabus_cd, minor(dev)); 1568 1569 ata_delref(sc->sc_chan); 1570 1571 sc->sc_flags &= ~ATABUSCF_OPEN; 1572 1573 return (0); 1574 } 1575 1576 int 1577 atabusioctl(dev_t dev, u_long cmd, void *addr, int flag, struct lwp *l) 1578 { 1579 struct atabus_softc *sc = 1580 device_lookup_private(&atabus_cd, minor(dev)); 1581 struct ata_channel *chp = sc->sc_chan; 1582 int min_drive, max_drive, drive; 1583 int error; 1584 int s; 1585 1586 /* 1587 * Enforce write permission for ioctls that change the 1588 * state of the bus. Host adapter specific ioctls must 1589 * be checked by the adapter driver. 1590 */ 1591 switch (cmd) { 1592 case ATABUSIOSCAN: 1593 case ATABUSIODETACH: 1594 case ATABUSIORESET: 1595 if ((flag & FWRITE) == 0) 1596 return (EBADF); 1597 } 1598 1599 switch (cmd) { 1600 case ATABUSIORESET: 1601 s = splbio(); 1602 ata_reset_channel(sc->sc_chan, AT_WAIT | AT_POLL); 1603 splx(s); 1604 return 0; 1605 case ATABUSIOSCAN: 1606 { 1607 #if 0 1608 struct atabusioscan_args *a= 1609 (struct atabusioscan_args *)addr; 1610 #endif 1611 if ((chp->ch_drive[0].drive_type == ATA_DRIVET_OLD) || 1612 (chp->ch_drive[1].drive_type == ATA_DRIVET_OLD)) 1613 return (EOPNOTSUPP); 1614 return (EOPNOTSUPP); 1615 } 1616 case ATABUSIODETACH: 1617 { 1618 struct atabusiodetach_args *a= 1619 (struct atabusiodetach_args *)addr; 1620 if ((chp->ch_drive[0].drive_type == ATA_DRIVET_OLD) || 1621 (chp->ch_drive[1].drive_type == ATA_DRIVET_OLD)) 1622 return (EOPNOTSUPP); 1623 switch (a->at_dev) { 1624 case -1: 1625 min_drive = 0; 1626 max_drive = 1; 1627 break; 1628 case 0: 1629 case 1: 1630 min_drive = max_drive = a->at_dev; 1631 break; 1632 default: 1633 return (EINVAL); 1634 } 1635 for (drive = min_drive; drive <= max_drive; drive++) { 1636 if (chp->ch_drive[drive].drv_softc != NULL) { 1637 error = config_detach( 1638 chp->ch_drive[drive].drv_softc, 0); 1639 if (error) 1640 return (error); 1641 KASSERT(chp->ch_drive[drive].drv_softc == NULL); 1642 } 1643 } 1644 return 0; 1645 } 1646 default: 1647 return ENOTTY; 1648 } 1649 } 1650 1651 static bool 1652 atabus_suspend(device_t dv, const pmf_qual_t *qual) 1653 { 1654 struct atabus_softc *sc = device_private(dv); 1655 struct ata_channel *chp = sc->sc_chan; 1656 1657 ata_queue_idle(chp->ch_queue); 1658 1659 return true; 1660 } 1661 1662 static bool 1663 atabus_resume(device_t dv, const pmf_qual_t *qual) 1664 { 1665 struct atabus_softc *sc = device_private(dv); 1666 struct ata_channel *chp = sc->sc_chan; 1667 int s; 1668 1669 /* 1670 * XXX joerg: with wdc, the first channel unfreezes the controler. 1671 * Move this the reset and queue idling into wdc. 1672 */ 1673 s = splbio(); 1674 if (chp->ch_queue->queue_freeze == 0) { 1675 splx(s); 1676 return true; 1677 } 1678 KASSERT(chp->ch_queue->queue_freeze > 0); 1679 /* unfreeze the queue and reset drives */ 1680 chp->ch_queue->queue_freeze--; 1681 1682 /* reset channel only if there are drives attached */ 1683 if (chp->ch_ndrives > 0) 1684 ata_reset_channel(chp, AT_WAIT); 1685 splx(s); 1686 1687 return true; 1688 } 1689 1690 static int 1691 atabus_rescan(device_t self, const char *ifattr, const int *locators) 1692 { 1693 struct atabus_softc *sc = device_private(self); 1694 struct ata_channel *chp = sc->sc_chan; 1695 struct atabus_initq *initq; 1696 int i; 1697 1698 /* 1699 * we can rescan a port multiplier atabus, even if some devices are 1700 * still attached 1701 */ 1702 if (chp->ch_satapmp_nports == 0) { 1703 if (chp->atapibus != NULL) { 1704 return EBUSY; 1705 } 1706 1707 KASSERT(chp->ch_ndrives == 0 || chp->ch_drive != NULL); 1708 for (i = 0; i < chp->ch_ndrives; i++) { 1709 if (chp->ch_drive[i].drv_softc != NULL) { 1710 return EBUSY; 1711 } 1712 } 1713 } 1714 1715 initq = malloc(sizeof(*initq), M_DEVBUF, M_WAITOK); 1716 initq->atabus_sc = sc; 1717 TAILQ_INSERT_TAIL(&atabus_initq_head, initq, atabus_initq); 1718 config_pending_incr(sc->sc_dev); 1719 1720 chp->ch_flags |= ATACH_TH_RESCAN; 1721 wakeup(&chp->ch_thread); 1722 1723 return 0; 1724 } 1725 1726 void 1727 ata_delay(int ms, const char *msg, int flags) 1728 { 1729 if ((flags & (AT_WAIT | AT_POLL)) == AT_POLL) { 1730 /* 1731 * can't use tsleep(), we may be in interrupt context 1732 * or taking a crash dump 1733 */ 1734 delay(ms * 1000); 1735 } else { 1736 kpause(msg, false, mstohz(ms), NULL); 1737 } 1738 } 1739