xref: /netbsd-src/sys/dev/acpi/plgpio_acpi.c (revision 181254a7b1bdde6873432bffef2d2decc4b5c22f)
1 /* $NetBSD: plgpio_acpi.c,v 1.5 2018/11/23 14:08:40 jmcneill Exp $ */
2 
3 /*-
4  * Copyright (c) 2018 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jared McNeill <jmcneill@invisible.ca>.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: plgpio_acpi.c,v 1.5 2018/11/23 14:08:40 jmcneill Exp $");
34 
35 #include <sys/param.h>
36 #include <sys/bus.h>
37 #include <sys/cpu.h>
38 #include <sys/device.h>
39 #include <sys/gpio.h>
40 
41 #include <dev/acpi/acpireg.h>
42 #include <dev/acpi/acpivar.h>
43 #include <dev/acpi/acpi_intr.h>
44 #include <dev/acpi/acpi_event.h>
45 
46 #include <dev/gpio/gpiovar.h>
47 #include <dev/ic/pl061var.h>
48 #include <dev/ic/pl061reg.h>
49 
50 struct plgpio_acpi_softc;
51 
52 struct plgpio_acpi_softc {
53 	struct plgpio_softc	sc_base;
54 
55 	ACPI_HANDLE		sc_handle;
56 
57 	struct acpi_event *	sc_event[8];
58 };
59 
60 static int	plgpio_acpi_match(device_t, cfdata_t, void *);
61 static void	plgpio_acpi_attach(device_t, device_t, void *);
62 
63 static void	plgpio_acpi_register_event(void *, struct acpi_event *, ACPI_RESOURCE_GPIO *);
64 static int	plgpio_acpi_intr(void *);
65 
66 CFATTACH_DECL_NEW(plgpio_acpi, sizeof(struct plgpio_acpi_softc), plgpio_acpi_match, plgpio_acpi_attach, NULL, NULL);
67 
68 static const char * const compatible[] = {
69 	"ARMH0061",
70 	NULL
71 };
72 
73 static int
74 plgpio_acpi_match(device_t parent, cfdata_t cf, void *aux)
75 {
76 	struct acpi_attach_args *aa = aux;
77 
78 	if (aa->aa_node->ad_type != ACPI_TYPE_DEVICE)
79 		return 0;
80 
81 	return acpi_match_hid(aa->aa_node->ad_devinfo, compatible);
82 }
83 
84 static void
85 plgpio_acpi_attach(device_t parent, device_t self, void *aux)
86 {
87 	struct plgpio_acpi_softc * const asc = device_private(self);
88 	struct plgpio_softc * const sc = &asc->sc_base;
89 	struct acpi_attach_args *aa = aux;
90 	struct acpi_resources res;
91 	struct acpi_mem *mem;
92 	struct acpi_irq *irq;
93 	ACPI_STATUS rv;
94 	int error;
95 	void *ih;
96 
97 	sc->sc_dev = self;
98 	asc->sc_handle = aa->aa_node->ad_handle;
99 
100 	rv = acpi_resource_parse(sc->sc_dev, aa->aa_node->ad_handle, "_CRS",
101 	    &res, &acpi_resource_parse_ops_default);
102 	if (ACPI_FAILURE(rv))
103 		return;
104 
105 	mem = acpi_res_mem(&res, 0);
106 	if (mem == NULL) {
107 		aprint_error_dev(self, "couldn't find mem resource\n");
108 		goto done;
109 	}
110 
111 	irq = acpi_res_irq(&res, 0);
112 	if (irq == NULL) {
113 		aprint_error_dev(self, "couldn't find irq resource\n");
114 		goto done;
115 	}
116 
117 	sc->sc_dev = self;
118 	sc->sc_bst = aa->aa_memt;
119 	error = bus_space_map(sc->sc_bst, mem->ar_base, mem->ar_length, 0, &sc->sc_bsh);
120 	if (error) {
121 		aprint_error_dev(self, "couldn't map registers\n");
122 		return;
123 	}
124 
125 	plgpio_attach(sc);
126 
127 	rv = acpi_event_create_gpio(self, asc->sc_handle, plgpio_acpi_register_event, asc);
128 	if (ACPI_FAILURE(rv)) {
129 		if (rv != AE_NOT_FOUND)
130 			aprint_error_dev(self, "failed to create events: %s\n", AcpiFormatException(rv));
131 		goto done;
132 	}
133 
134 	ih = acpi_intr_establish(self, (uint64_t)asc->sc_handle,
135 	    IPL_VM, false, plgpio_acpi_intr, asc, device_xname(self));
136 	if (ih == NULL)
137 		aprint_error_dev(self, "couldn't establish interrupt\n");
138 
139 done:
140 	acpi_resource_cleanup(&res);
141 }
142 
143 static void
144 plgpio_acpi_register_event(void *priv, struct acpi_event *ev, ACPI_RESOURCE_GPIO *gpio)
145 {
146 	struct plgpio_acpi_softc * const asc = priv;
147 	struct plgpio_softc * const sc = &asc->sc_base;
148 	uint32_t ibe, iev, is, ie;
149 
150 	const int pin = gpio->PinTable[0];
151 
152 	if (pin >= __arraycount(asc->sc_event)) {
153 		aprint_error_dev(asc->sc_base.sc_dev,
154 		    "ignoring event for pin %u (out of range)\n", pin);
155 		return;
156 	}
157 	if (asc->sc_event[pin] != NULL) {
158 		aprint_error_dev(asc->sc_base.sc_dev,
159 		    "ignoring duplicate pin %u\n", pin);
160 		return;
161 	}
162 
163 	asc->sc_event[pin] = ev;
164 	asc->sc_base.sc_reserved_mask |= __BIT(pin);
165 
166 	/*
167 	 * Configure and enable interrupts for this pin.
168 	 */
169 
170 	ibe = PLGPIO_READ(sc, PL061_GPIOIBE_REG);
171 	iev = PLGPIO_READ(sc, PL061_GPIOIEV_REG);
172 	switch (gpio->Polarity) {
173 	case ACPI_ACTIVE_HIGH:
174 		ibe &= ~__BIT(pin);
175 		iev |= __BIT(pin);
176 		break;
177 	case ACPI_ACTIVE_LOW:
178 		ibe &= ~__BIT(pin);
179 		iev &= ~__BIT(pin);
180 		break;
181 	case ACPI_ACTIVE_BOTH:
182 		ibe |= __BIT(pin);
183 		break;
184 	}
185 	PLGPIO_WRITE(sc, PL061_GPIOIBE_REG, ibe);
186 	PLGPIO_WRITE(sc, PL061_GPIOIEV_REG, iev);
187 
188 	is = PLGPIO_READ(sc, PL061_GPIOIS_REG);
189 	switch (gpio->Triggering) {
190 	case ACPI_LEVEL_SENSITIVE:
191 		is |= __BIT(pin);
192 		break;
193 	case ACPI_EDGE_SENSITIVE:
194 		is &= ~__BIT(pin);
195 		break;
196 	}
197 	PLGPIO_WRITE(sc, PL061_GPIOIS_REG, is);
198 
199 	delay(20);
200 
201 	PLGPIO_WRITE(sc, PL061_GPIOIC_REG, __BIT(pin));
202 
203 	ie = PLGPIO_READ(sc, PL061_GPIOIE_REG);
204 	ie |= __BIT(pin);
205 	PLGPIO_WRITE(sc, PL061_GPIOIE_REG, ie);
206 }
207 
208 static int
209 plgpio_acpi_intr(void *priv)
210 {
211 	struct plgpio_acpi_softc * const asc = priv;
212 	struct plgpio_softc * const sc = &asc->sc_base;
213 	uint32_t mis;
214 	int bit;
215 
216 	mis = PLGPIO_READ(sc, PL061_GPIOMIS_REG);
217 	PLGPIO_WRITE(sc, PL061_GPIOIC_REG, mis);
218 
219 	while ((bit = __builtin_ffs(mis)) != 0) {
220 		const int pin = bit - 1;
221 		struct acpi_event * const ev = asc->sc_event[pin];
222 		KASSERT(ev != NULL);
223 
224 		acpi_event_notify(ev);
225 
226 		mis &= ~__BIT(pin);
227 	}
228 
229 	return 1;
230 }
231