xref: /netbsd-src/sys/arch/zaurus/dev/scoop_pcic.c (revision 003bdf4c7b9e42216da83a274a6ebd881fa64b6c)
1*003bdf4cSnonaka /*	$NetBSD: scoop_pcic.c,v 1.4 2011/06/19 16:20:09 nonaka Exp $	*/
2d429c3dcSober /*	$OpenBSD: scoop_pcic.c,v 1.1 2005/07/01 23:51:55 uwe Exp $	*/
3d429c3dcSober 
4d429c3dcSober /*
5d429c3dcSober  * Copyright (c) 2005 Uwe Stuehler <uwe@bsdx.de>
6d429c3dcSober  *
7d429c3dcSober  * Permission to use, copy, modify, and distribute this software for any
8d429c3dcSober  * purpose with or without fee is hereby granted, provided that the above
9d429c3dcSober  * copyright notice and this permission notice appear in all copies.
10d429c3dcSober  *
11d429c3dcSober  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12d429c3dcSober  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13d429c3dcSober  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14d429c3dcSober  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15d429c3dcSober  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16d429c3dcSober  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17d429c3dcSober  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18d429c3dcSober  */
19d429c3dcSober 
20d429c3dcSober #include <sys/cdefs.h>
21*003bdf4cSnonaka __KERNEL_RCSID(0, "$NetBSD: scoop_pcic.c,v 1.4 2011/06/19 16:20:09 nonaka Exp $");
22d429c3dcSober 
23d429c3dcSober #include <sys/param.h>
24d429c3dcSober #include <sys/systm.h>
25d429c3dcSober #include <sys/device.h>
26d429c3dcSober 
27d429c3dcSober #include <uvm/uvm.h>
28d429c3dcSober 
29d429c3dcSober #include <arch/arm/xscale/pxa2x0var.h>
30f19ed1a8Speter #include <arch/arm/xscale/pxa2x0_gpio.h>
31f19ed1a8Speter #include <arch/arm/xscale/pxa2x0_pcic.h>
32d429c3dcSober 
33d429c3dcSober #include <zaurus/zaurus/zaurus_reg.h>
34d429c3dcSober #include <zaurus/zaurus/zaurus_var.h>
35d429c3dcSober 
36d429c3dcSober #include <zaurus/dev/scoopreg.h>
37d429c3dcSober 
381a686006Snonaka static int	scoop_pcic_match(device_t, cfdata_t, void *);
391a686006Snonaka static void	scoop_pcic_attach(device_t, device_t, void *);
40d429c3dcSober 
411a686006Snonaka CFATTACH_DECL_NEW(pxapcic_scoop, sizeof(struct pxapcic_softc),
42d429c3dcSober     scoop_pcic_match, scoop_pcic_attach, NULL, NULL);
43d429c3dcSober 
44d429c3dcSober static void	scoop_pcic_socket_setup(struct pxapcic_socket *);
45d429c3dcSober static u_int	scoop_pcic_read(struct pxapcic_socket *, int);
46d429c3dcSober static void	scoop_pcic_write(struct pxapcic_socket *, int, u_int);
47d429c3dcSober static void	scoop_pcic_set_power(struct pxapcic_socket *, int);
48d429c3dcSober static void	scoop_pcic_clear_intr(struct pxapcic_socket *);
49f19ed1a8Speter static void 	*scoop_pcic_intr_establish(struct pxapcic_socket *, int,
50f19ed1a8Speter 		    int (*)(void *), void *);
51f19ed1a8Speter static void	scoop_pcic_intr_disestablish(struct pxapcic_socket *, void *);
52d429c3dcSober 
531a686006Snonaka static struct pxapcic_tag scoop_pcic_functions = {
54d429c3dcSober 	scoop_pcic_read,
55d429c3dcSober 	scoop_pcic_write,
56d429c3dcSober 	scoop_pcic_set_power,
57d429c3dcSober 	scoop_pcic_clear_intr,
58f19ed1a8Speter 	scoop_pcic_intr_establish,
59f19ed1a8Speter 	scoop_pcic_intr_disestablish
60d429c3dcSober };
61d429c3dcSober 
62d429c3dcSober static int
scoop_pcic_match(device_t parent,cfdata_t cf,void * aux)631a686006Snonaka scoop_pcic_match(device_t parent, cfdata_t cf, void *aux)
64d429c3dcSober {
65d429c3dcSober 
66*003bdf4cSnonaka 	return 1;
67d429c3dcSober }
68d429c3dcSober 
69d429c3dcSober static void
scoop_pcic_attach(device_t parent,device_t self,void * aux)701a686006Snonaka scoop_pcic_attach(device_t parent, device_t self, void *aux)
71d429c3dcSober {
721a686006Snonaka 	struct pxapcic_softc *sc = device_private(self);
73d429c3dcSober 	struct pxaip_attach_args *pxa = (struct pxaip_attach_args *)aux;
74d429c3dcSober 
751a686006Snonaka 	sc->sc_dev = self;
76d429c3dcSober 	sc->sc_iot = pxa->pxa_iot;
77d429c3dcSober 
78d429c3dcSober 	if (ZAURUS_ISC860) {
79d429c3dcSober 		sc->sc_nslots = 1;
80d429c3dcSober 		sc->sc_irqpin[0] = C860_CF0_IRQ;
81d429c3dcSober 		sc->sc_irqcfpin[0] = C860_CF0_IRQ_PIN;
82*003bdf4cSnonaka 	} else if (ZAURUS_ISC1000) {
83*003bdf4cSnonaka 		sc->sc_nslots = 1;
84*003bdf4cSnonaka 		sc->sc_irqpin[0] = C3000_CF0_IRQ;
85*003bdf4cSnonaka 		sc->sc_irqcfpin[0] = C3000_CF0_IRQ_PIN;
86d429c3dcSober 	} else if (ZAURUS_ISC3000) {
87d429c3dcSober 		sc->sc_nslots = 2;
88d429c3dcSober 		sc->sc_irqpin[0] = C3000_CF0_IRQ;
89d429c3dcSober 		sc->sc_irqcfpin[0] = C3000_CF0_IRQ_PIN;
90d429c3dcSober 		sc->sc_irqpin[1] = C3000_CF1_IRQ;
91d429c3dcSober 		sc->sc_irqcfpin[1] = C3000_CF1_IRQ_PIN;
92d429c3dcSober 	}
93f19ed1a8Speter 	sc->sc_flags |= PPF_REVERSE_ORDER;
94d429c3dcSober 
95f19ed1a8Speter 	pxapcic_attach_common(sc, &scoop_pcic_socket_setup);
96d429c3dcSober }
97d429c3dcSober 
98d429c3dcSober static void
scoop_pcic_socket_setup(struct pxapcic_socket * so)99d429c3dcSober scoop_pcic_socket_setup(struct pxapcic_socket *so)
100d429c3dcSober {
101d429c3dcSober 	struct pxapcic_softc *sc;
102d429c3dcSober 	bus_addr_t pa;
103d429c3dcSober 	bus_size_t size = SCOOP_SIZE;
104d429c3dcSober 	bus_space_tag_t iot;
105d429c3dcSober 	bus_space_handle_t scooph;
106d429c3dcSober 	int error;
107d429c3dcSober 
108d429c3dcSober 	sc = so->sc;
109d429c3dcSober 	iot = sc->sc_iot;
110d429c3dcSober 
111d429c3dcSober 	if (so->socket == 0) {
112d429c3dcSober 		pa = C3000_SCOOP0_BASE;
113d429c3dcSober 	} else if (so->socket == 1) {
114d429c3dcSober 		pa = C3000_SCOOP1_BASE;
115d429c3dcSober 	} else {
1161a686006Snonaka 		panic("%s: invalid CF slot %d", device_xname(sc->sc_dev),
117d429c3dcSober 		    so->socket);
118d429c3dcSober 	}
119d429c3dcSober 
120d429c3dcSober 	error = bus_space_map(iot, trunc_page(pa), round_page(size),
121d429c3dcSober 	    0, &scooph);
122d429c3dcSober 	if (error) {
123d429c3dcSober 		panic("%s: failed to map memory %x for scoop",
1241a686006Snonaka 		    device_xname(sc->sc_dev), (uint32_t)pa);
125d429c3dcSober 	}
126d429c3dcSober 	scooph += pa - trunc_page(pa);
127d429c3dcSober 
128d429c3dcSober 	bus_space_write_2(iot, scooph, SCOOP_IMR,
129d429c3dcSober 	    SCP_IMR_UNKN0 | SCP_IMR_UNKN1);
130d429c3dcSober 
131d429c3dcSober 	/* setup */
132d429c3dcSober 	bus_space_write_2(iot, scooph, SCOOP_MCR, 0x0100);
133d429c3dcSober 	bus_space_write_2(iot, scooph, SCOOP_CDR, 0x0000);
134d429c3dcSober 	bus_space_write_2(iot, scooph, SCOOP_CPR, 0x0000);
135d429c3dcSober 	bus_space_write_2(iot, scooph, SCOOP_IMR, 0x0000);
136d429c3dcSober 	bus_space_write_2(iot, scooph, SCOOP_IRM, 0x00ff);
137d429c3dcSober 	bus_space_write_2(iot, scooph, SCOOP_ISR, 0x0000);
138d429c3dcSober 	bus_space_write_2(iot, scooph, SCOOP_IRM, 0x0000);
139d429c3dcSober 
140d429c3dcSober 	/* C3000 */
141d429c3dcSober 	if (so->socket == 1) {
142d429c3dcSober 		bus_space_write_2(iot, scooph, SCOOP_CPR, 0x80c1);
143d429c3dcSober 		bus_space_write_2(iot, scooph, SCOOP_IMR, 0x00c4);
144d429c3dcSober 		bus_space_write_2(iot, scooph, SCOOP_MCR, 0x0111);
145d429c3dcSober 	} else {
146d429c3dcSober 		bus_space_write_2(iot, scooph, SCOOP_CPR,
147d429c3dcSober 		    SCP_CPR_PWR|SCP_CPR_5V);
148d429c3dcSober 	}
149d429c3dcSober 
150d429c3dcSober 	bus_space_write_2(iot, scooph, SCOOP_IMR, 0x00ce);
151d429c3dcSober 	bus_space_write_2(iot, scooph, SCOOP_MCR, 0x0111);
152d429c3dcSober 
153d429c3dcSober 	/* C3000 */
154d429c3dcSober 	so->power_capability = PXAPCIC_POWER_3V;
155d429c3dcSober 	if (so->socket == 0)
156d429c3dcSober 		so->power_capability |= PXAPCIC_POWER_5V;
157d429c3dcSober 
158d429c3dcSober 	so->pcictag_cookie = (void *)scooph;
159d429c3dcSober 	so->pcictag = &scoop_pcic_functions;
160d429c3dcSober }
161d429c3dcSober 
162d429c3dcSober static u_int
scoop_pcic_read(struct pxapcic_socket * so,int reg)163d429c3dcSober scoop_pcic_read(struct pxapcic_socket *so, int reg)
164d429c3dcSober {
165d429c3dcSober 	bus_space_tag_t iot = so->sc->sc_iot;
166d429c3dcSober 	bus_space_handle_t ioh = (bus_space_handle_t)so->pcictag_cookie;
167d429c3dcSober 	uint16_t csr;
168d429c3dcSober 
169d429c3dcSober 	csr = bus_space_read_2(iot, ioh, SCOOP_CSR);
170d429c3dcSober 
171d429c3dcSober 	switch (reg) {
172d429c3dcSober 	case PXAPCIC_CARD_STATUS:
173d429c3dcSober 		if (csr & SCP_CSR_MISSING)
174d429c3dcSober 			return (PXAPCIC_CARD_INVALID);
175d429c3dcSober 		else
176d429c3dcSober 			return (PXAPCIC_CARD_VALID);
177d429c3dcSober 
178d429c3dcSober 	case PXAPCIC_CARD_READY:
179d429c3dcSober 		return ((bus_space_read_2(iot, ioh, SCOOP_CSR) &
180d429c3dcSober 		    SCP_CSR_READY) != 0);
181d429c3dcSober 
182d429c3dcSober 	default:
183d429c3dcSober 		panic("scoop_pcic_read: bogus register");
184d429c3dcSober 	}
185d429c3dcSober 	/*NOTREACHED*/
186d429c3dcSober }
187d429c3dcSober 
188d429c3dcSober static void
scoop_pcic_write(struct pxapcic_socket * so,int reg,u_int val)189d429c3dcSober scoop_pcic_write(struct pxapcic_socket *so, int reg, u_int val)
190d429c3dcSober {
191d429c3dcSober 	bus_space_tag_t iot = so->sc->sc_iot;
192d429c3dcSober 	bus_space_handle_t ioh = (bus_space_handle_t)so->pcictag_cookie;
193d429c3dcSober 	uint16_t newval;
194d429c3dcSober 	int s;
195d429c3dcSober 
196d429c3dcSober 	s = splhigh();
197d429c3dcSober 
198d429c3dcSober 	switch (reg) {
199d429c3dcSober 	case PXAPCIC_CARD_POWER:
200d429c3dcSober 		newval = bus_space_read_2(iot, ioh, SCOOP_CPR);
201d429c3dcSober 		newval &= ~(SCP_CPR_PWR | SCP_CPR_3V | SCP_CPR_5V);
202d429c3dcSober 
203d429c3dcSober 		if (val == PXAPCIC_POWER_3V)
204d429c3dcSober 			newval |= (SCP_CPR_PWR | SCP_CPR_3V);
205d429c3dcSober 		else if (val == PXAPCIC_POWER_5V)
206d429c3dcSober 			newval |= (SCP_CPR_PWR | SCP_CPR_5V);
207d429c3dcSober 
208d429c3dcSober 		bus_space_write_2(iot, ioh, SCOOP_CPR, newval);
209d429c3dcSober 		break;
210d429c3dcSober 
211d429c3dcSober 	case PXAPCIC_CARD_RESET:
212d429c3dcSober 		bus_space_write_2(iot, ioh, SCOOP_CCR,
213d429c3dcSober 		    val ? SCP_CCR_RESET : 0);
214d429c3dcSober 		break;
215d429c3dcSober 
216d429c3dcSober 	default:
217d429c3dcSober 		panic("scoop_pcic_write: bogus register");
218d429c3dcSober 	}
219d429c3dcSober 
220d429c3dcSober 	splx(s);
221d429c3dcSober }
222d429c3dcSober 
223d429c3dcSober static void
scoop_pcic_set_power(struct pxapcic_socket * so,int pwr)224d429c3dcSober scoop_pcic_set_power(struct pxapcic_socket *so, int pwr)
225d429c3dcSober {
226d429c3dcSober 	bus_space_tag_t iot = so->sc->sc_iot;
227d429c3dcSober 	bus_space_handle_t ioh = (bus_space_handle_t)so->pcictag_cookie;
228d429c3dcSober 	u_int16_t reg;
229d429c3dcSober 	int s;
230d429c3dcSober 
231d429c3dcSober 	s = splhigh();
232d429c3dcSober 
233d429c3dcSober 	switch (pwr) {
234d429c3dcSober 	case PXAPCIC_POWER_OFF:
235d429c3dcSober #if 0
236d429c3dcSober 		/* XXX does this disable power to both sockets? */
237d429c3dcSober 		reg = bus_space_read_2(iot, ioh, SCOOP_GPWR);
238d429c3dcSober 		bus_space_write_2(iot, ioh, SCOOP_GPWR,
239d429c3dcSober 		    reg & ~(1 << SCOOP0_CF_POWER_C3000));
240d429c3dcSober #endif
241d429c3dcSober 		break;
242d429c3dcSober 
243d429c3dcSober 	case PXAPCIC_POWER_3V:
244d429c3dcSober 	case PXAPCIC_POWER_5V:
245d429c3dcSober 		/* XXX */
246d429c3dcSober 		if (so->socket == 0) {
247d429c3dcSober 			reg = bus_space_read_2(iot, ioh, SCOOP_GPWR);
248d429c3dcSober 			bus_space_write_2(iot, ioh, SCOOP_GPWR,
249d429c3dcSober 			    reg | (1 << SCOOP0_CF_POWER_C3000));
250d429c3dcSober 		}
251d429c3dcSober 		break;
252d429c3dcSober 
253d429c3dcSober 	default:
254d429c3dcSober 		splx(s);
255d429c3dcSober 		panic("scoop_pcic_set_power: bogus power state");
256d429c3dcSober 	}
257d429c3dcSober 
258d429c3dcSober 	splx(s);
259d429c3dcSober }
260d429c3dcSober 
261d429c3dcSober static void
scoop_pcic_clear_intr(struct pxapcic_socket * so)262d429c3dcSober scoop_pcic_clear_intr(struct pxapcic_socket *so)
263d429c3dcSober {
264d429c3dcSober 	bus_space_tag_t iot = so->sc->sc_iot;
265d429c3dcSober 	bus_space_handle_t ioh = (bus_space_handle_t)so->pcictag_cookie;
266d429c3dcSober 
267d429c3dcSober 	bus_space_write_2(iot, ioh, SCOOP_IRM, 0x00ff);
268d429c3dcSober 	bus_space_write_2(iot, ioh, SCOOP_ISR, 0x0000);
269d429c3dcSober 	bus_space_write_2(iot, ioh, SCOOP_IRM, 0x0000);
270d429c3dcSober }
271f19ed1a8Speter 
272f19ed1a8Speter static void *
scoop_pcic_intr_establish(struct pxapcic_socket * so,int ipl,int (* func)(void *),void * arg)273f19ed1a8Speter scoop_pcic_intr_establish(struct pxapcic_socket *so, int ipl,
274f19ed1a8Speter     int (*func)(void *), void *arg)
275f19ed1a8Speter {
276f19ed1a8Speter 
277f19ed1a8Speter 	return (pxa2x0_gpio_intr_establish(so->irqpin, IST_EDGE_FALLING,
278f19ed1a8Speter 	    ipl, func, arg));
279f19ed1a8Speter }
280f19ed1a8Speter 
281f19ed1a8Speter static void
scoop_pcic_intr_disestablish(struct pxapcic_socket * so,void * ih)282f19ed1a8Speter scoop_pcic_intr_disestablish(struct pxapcic_socket *so, void *ih)
283f19ed1a8Speter {
284f19ed1a8Speter 
285f19ed1a8Speter 	pxa2x0_gpio_intr_disestablish(ih);
286f19ed1a8Speter }
287