1 /* $NetBSD: hypervisor_machdep.c,v 1.16 2011/09/20 00:12:24 jym Exp $ */ 2 3 /* 4 * 5 * Copyright (c) 2004 Christian Limpach. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 /****************************************************************************** 30 * hypervisor.c 31 * 32 * Communication to/from hypervisor. 33 * 34 * Copyright (c) 2002-2004, K A Fraser 35 * 36 * Permission is hereby granted, free of charge, to any person obtaining a copy 37 * of this software and associated documentation files (the "Software"), to 38 * deal in the Software without restriction, including without limitation the 39 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 40 * sell copies of the Software, and to permit persons to whom the Software is 41 * furnished to do so, subject to the following conditions: 42 * 43 * The above copyright notice and this permission notice shall be included in 44 * all copies or substantial portions of the Software. 45 * 46 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 47 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 48 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 49 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 50 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 51 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 52 * DEALINGS IN THE SOFTWARE. 53 */ 54 55 56 #include <sys/cdefs.h> 57 __KERNEL_RCSID(0, "$NetBSD: hypervisor_machdep.c,v 1.16 2011/09/20 00:12:24 jym Exp $"); 58 59 #include <sys/param.h> 60 #include <sys/systm.h> 61 #include <sys/kmem.h> 62 63 #include <uvm/uvm_extern.h> 64 65 #include <machine/vmparam.h> 66 #include <machine/pmap.h> 67 68 #include <xen/xen.h> 69 #include <xen/hypervisor.h> 70 #include <xen/evtchn.h> 71 #include <xen/xenpmap.h> 72 73 #include "opt_xen.h" 74 75 /* 76 * arch-dependent p2m frame lists list (L3 and L2) 77 * used by Xen for save/restore mappings 78 */ 79 static unsigned long * l3_p2m_page; 80 static unsigned long * l2_p2m_page; 81 static int l2_p2m_page_size; /* size of L2 page, in pages */ 82 83 static void build_p2m_frame_list_list(void); 84 static void update_p2m_frame_list_list(void); 85 86 // #define PORT_DEBUG 4 87 // #define EARLY_DEBUG_EVENT 88 89 /* callback function type */ 90 typedef void (*iterate_func_t)(struct cpu_info *, unsigned int, 91 unsigned int, unsigned int, void *); 92 93 static inline void 94 evt_iterate_bits(struct cpu_info *ci, volatile unsigned long *pendingl1, 95 volatile unsigned long *pendingl2, 96 volatile unsigned long *mask, 97 iterate_func_t iterate_pending, void *iterate_args) 98 { 99 100 KASSERT(pendingl1 != NULL); 101 KASSERT(pendingl2 != NULL); 102 103 unsigned long l1, l2; 104 unsigned int l1i, l2i, port; 105 106 l1 = xen_atomic_xchg(pendingl1, 0); 107 while ((l1i = xen_ffs(l1)) != 0) { 108 l1i--; 109 l1 &= ~(1UL << l1i); 110 111 l2 = pendingl2[l1i] & (mask != NULL ? ~mask[l1i] : -1UL); 112 113 if (mask != NULL) xen_atomic_setbits_l(&mask[l1i], l2); 114 xen_atomic_clearbits_l(&pendingl2[l1i], l2); 115 116 while ((l2i = xen_ffs(l2)) != 0) { 117 l2i--; 118 l2 &= ~(1UL << l2i); 119 120 port = (l1i << LONG_SHIFT) + l2i; 121 122 iterate_pending(ci, port, l1i, l2i, iterate_args); 123 } 124 } 125 } 126 127 /* 128 * Set per-cpu "pending" information for outstanding events that 129 * cannot be processed now. 130 */ 131 132 static inline void 133 evt_set_pending(struct cpu_info *ci, unsigned int port, unsigned int l1i, 134 unsigned int l2i, void *args) 135 { 136 137 KASSERT(args != NULL); 138 KASSERT(ci != NULL); 139 140 int *ret = args; 141 142 if (evtsource[port]) { 143 hypervisor_set_ipending(ci, evtsource[port]->ev_imask, 144 l1i, l2i); 145 evtsource[port]->ev_evcnt.ev_count++; 146 if (*ret == 0 && ci->ci_ilevel < 147 evtsource[port]->ev_maxlevel) 148 *ret = 1; 149 } 150 #ifdef DOM0OPS 151 else { 152 /* set pending event */ 153 xenevt_setipending(l1i, l2i); 154 } 155 #endif 156 } 157 158 int stipending(void); 159 int 160 stipending(void) 161 { 162 volatile shared_info_t *s = HYPERVISOR_shared_info; 163 struct cpu_info *ci; 164 volatile struct vcpu_info *vci; 165 int ret; 166 167 ret = 0; 168 ci = curcpu(); 169 vci = ci->ci_vcpu; 170 171 #if 0 172 if (HYPERVISOR_shared_info->events) 173 printf("stipending events %08lx mask %08lx ilevel %d\n", 174 HYPERVISOR_shared_info->events, 175 HYPERVISOR_shared_info->events_mask, ci->ci_ilevel); 176 #endif 177 178 #ifdef EARLY_DEBUG_EVENT 179 if (xen_atomic_test_bit(&s->evtchn_pending[0], debug_port)) { 180 xen_debug_handler(NULL); 181 xen_atomic_clear_bit(&s->evtchn_pending[0], debug_port); 182 } 183 #endif 184 185 /* 186 * we're only called after STIC, so we know that we'll have to 187 * STI at the end 188 */ 189 190 while (vci->evtchn_upcall_pending) { 191 cli(); 192 193 vci->evtchn_upcall_pending = 0; 194 195 evt_iterate_bits(ci, &vci->evtchn_pending_sel, 196 s->evtchn_pending, s->evtchn_mask, 197 evt_set_pending, &ret); 198 199 sti(); 200 } 201 202 #if 0 203 if (ci->ci_ipending & 0x1) 204 printf("stipending events %08lx mask %08lx ilevel %d ipending %08x\n", 205 HYPERVISOR_shared_info->events, 206 HYPERVISOR_shared_info->events_mask, ci->ci_ilevel, 207 ci->ci_ipending); 208 #endif 209 210 return (ret); 211 } 212 213 /* Iterate through pending events and call the event handler */ 214 215 static inline void 216 evt_do_hypervisor_callback(struct cpu_info *ci, unsigned int port, 217 unsigned int l1i, unsigned int l2i, void *args) 218 { 219 KASSERT(args != NULL); 220 KASSERT(ci == curcpu()); 221 222 struct intrframe *regs = args; 223 224 #ifdef PORT_DEBUG 225 if (port == PORT_DEBUG) 226 printf("do_hypervisor_callback event %d\n", port); 227 #endif 228 if (evtsource[port]) 229 call_evtchn_do_event(port, regs); 230 #ifdef DOM0OPS 231 else { 232 if (ci->ci_ilevel < IPL_HIGH) { 233 /* fast path */ 234 int oipl = ci->ci_ilevel; 235 ci->ci_ilevel = IPL_HIGH; 236 call_xenevt_event(port); 237 ci->ci_ilevel = oipl; 238 } else { 239 /* set pending event */ 240 xenevt_setipending(l1i, l2i); 241 } 242 } 243 #endif 244 } 245 246 void 247 do_hypervisor_callback(struct intrframe *regs) 248 { 249 volatile shared_info_t *s = HYPERVISOR_shared_info; 250 struct cpu_info *ci; 251 volatile struct vcpu_info *vci; 252 int level; 253 254 ci = curcpu(); 255 vci = ci->ci_vcpu; 256 level = ci->ci_ilevel; 257 258 // DDD printf("do_hypervisor_callback\n"); 259 260 #ifdef EARLY_DEBUG_EVENT 261 if (xen_atomic_test_bit(&s->evtchn_pending[0], debug_port)) { 262 xen_debug_handler(NULL); 263 xen_atomic_clear_bit(&s->evtchn_pending[0], debug_port); 264 } 265 #endif 266 267 while (vci->evtchn_upcall_pending) { 268 vci->evtchn_upcall_pending = 0; 269 270 evt_iterate_bits(ci, &vci->evtchn_pending_sel, 271 s->evtchn_pending, s->evtchn_mask, 272 evt_do_hypervisor_callback, regs); 273 } 274 275 #ifdef DIAGNOSTIC 276 if (level != ci->ci_ilevel) 277 printf("hypervisor done %08x level %d/%d ipending %08x\n", 278 (uint)vci->evtchn_pending_sel, 279 level, ci->ci_ilevel, ci->ci_ipending); 280 #endif 281 } 282 283 void 284 hypervisor_unmask_event(unsigned int ev) 285 { 286 volatile shared_info_t *s = HYPERVISOR_shared_info; 287 volatile struct vcpu_info *vci = curcpu()->ci_vcpu; 288 289 #ifdef PORT_DEBUG 290 if (ev == PORT_DEBUG) 291 printf("hypervisor_unmask_event %d\n", ev); 292 #endif 293 294 xen_atomic_clear_bit(&s->evtchn_mask[0], ev); 295 /* 296 * The following is basically the equivalent of 297 * 'hw_resend_irq'. Just like a real IO-APIC we 'lose the 298 * interrupt edge' if the channel is masked. 299 */ 300 if (xen_atomic_test_bit(&s->evtchn_pending[0], ev) && 301 !xen_atomic_test_and_set_bit(&vci->evtchn_pending_sel, ev>>LONG_SHIFT)) { 302 xen_atomic_set_bit(&vci->evtchn_upcall_pending, 0); 303 if (!vci->evtchn_upcall_mask) 304 hypervisor_force_callback(); 305 } 306 } 307 308 void 309 hypervisor_mask_event(unsigned int ev) 310 { 311 volatile shared_info_t *s = HYPERVISOR_shared_info; 312 #ifdef PORT_DEBUG 313 if (ev == PORT_DEBUG) 314 printf("hypervisor_mask_event %d\n", ev); 315 #endif 316 317 xen_atomic_set_bit(&s->evtchn_mask[0], ev); 318 } 319 320 void 321 hypervisor_clear_event(unsigned int ev) 322 { 323 volatile shared_info_t *s = HYPERVISOR_shared_info; 324 #ifdef PORT_DEBUG 325 if (ev == PORT_DEBUG) 326 printf("hypervisor_clear_event %d\n", ev); 327 #endif 328 329 xen_atomic_clear_bit(&s->evtchn_pending[0], ev); 330 } 331 332 static inline void 333 evt_enable_event(struct cpu_info *ci, unsigned int port, 334 unsigned int l1i, unsigned int l2i, void *args) 335 { 336 KASSERT(ci != NULL); 337 KASSERT(args == NULL); 338 hypervisor_enable_event(port); 339 } 340 341 void 342 hypervisor_enable_ipl(unsigned int ipl) 343 { 344 struct cpu_info *ci = curcpu(); 345 346 /* 347 * enable all events for ipl. As we only set an event in ipl_evt_mask 348 * for its lowest IPL, and pending IPLs are processed high to low, 349 * we know that all callback for this event have been processed. 350 */ 351 352 evt_iterate_bits(ci, &ci->ci_isources[ipl]->ipl_evt_mask1, 353 ci->ci_isources[ipl]->ipl_evt_mask2, NULL, 354 evt_enable_event, NULL); 355 356 } 357 358 void 359 hypervisor_set_ipending(struct cpu_info *ci, uint32_t iplmask, int l1, int l2) 360 { 361 int ipl; 362 363 /* set pending bit for the appropriate IPLs */ 364 ci->ci_ipending |= iplmask; 365 366 /* 367 * And set event pending bit for the lowest IPL. As IPL are handled 368 * from high to low, this ensure that all callbacks will have been 369 * called when we ack the event 370 */ 371 ipl = ffs(iplmask); 372 KASSERT(ipl > 0); 373 ipl--; 374 KASSERT(ipl < NIPL); 375 KASSERT(ci->ci_isources[ipl] != NULL); 376 ci->ci_isources[ipl]->ipl_evt_mask1 |= 1UL << l1; 377 ci->ci_isources[ipl]->ipl_evt_mask2[l1] |= 1UL << l2; 378 } 379 380 void 381 hypervisor_machdep_attach(void) 382 { 383 /* dom0 does not require the arch-dependent P2M translation table */ 384 if (!xendomain_is_dom0()) { 385 build_p2m_frame_list_list(); 386 sysctl_xen_suspend_setup(); 387 } 388 } 389 390 void 391 hypervisor_machdep_resume(void) 392 { 393 /* dom0 does not require the arch-dependent P2M translation table */ 394 if (!xendomain_is_dom0()) 395 update_p2m_frame_list_list(); 396 } 397 398 /* 399 * Generate the p2m_frame_list_list table, 400 * needed for guest save/restore 401 */ 402 static void 403 build_p2m_frame_list_list(void) 404 { 405 int fpp; /* number of page (frame) pointer per page */ 406 unsigned long max_pfn; 407 /* 408 * The p2m list is composed of three levels of indirection, 409 * each layer containing MFNs pointing to lower level pages 410 * The indirection is used to convert a given PFN to its MFN 411 * Each N level page can point to @fpp (N-1) level pages 412 * For example, for x86 32bit, we have: 413 * - PAGE_SIZE: 4096 bytes 414 * - fpp: 1024 (one L3 page can address 1024 L2 pages) 415 * A L1 page contains the list of MFN we are looking for 416 */ 417 max_pfn = xen_start_info.nr_pages; 418 fpp = PAGE_SIZE / sizeof(xen_pfn_t); 419 420 /* we only need one L3 page */ 421 l3_p2m_page = (vaddr_t *)uvm_km_alloc(kernel_map, PAGE_SIZE, 422 PAGE_SIZE, UVM_KMF_WIRED | UVM_KMF_NOWAIT); 423 if (l3_p2m_page == NULL) 424 panic("could not allocate memory for l3_p2m_page"); 425 426 /* 427 * Determine how many L2 pages we need for the mapping 428 * Each L2 can map a total of @fpp L1 pages 429 */ 430 l2_p2m_page_size = howmany(max_pfn, fpp); 431 432 l2_p2m_page = (vaddr_t *)uvm_km_alloc(kernel_map, 433 l2_p2m_page_size * PAGE_SIZE, 434 PAGE_SIZE, UVM_KMF_WIRED | UVM_KMF_NOWAIT); 435 if (l2_p2m_page == NULL) 436 panic("could not allocate memory for l2_p2m_page"); 437 438 /* We now have L3 and L2 pages ready, update L1 mapping */ 439 update_p2m_frame_list_list(); 440 441 } 442 443 /* 444 * Update the L1 p2m_frame_list_list mapping (during guest boot or resume) 445 */ 446 static void 447 update_p2m_frame_list_list(void) 448 { 449 int i; 450 int fpp; /* number of page (frame) pointer per page */ 451 unsigned long max_pfn; 452 453 max_pfn = xen_start_info.nr_pages; 454 fpp = PAGE_SIZE / sizeof(xen_pfn_t); 455 456 for (i = 0; i < l2_p2m_page_size; i++) { 457 /* 458 * Each time we start a new L2 page, 459 * store its MFN in the L3 page 460 */ 461 if ((i % fpp) == 0) { 462 l3_p2m_page[i/fpp] = vtomfn( 463 (vaddr_t)&l2_p2m_page[i]); 464 } 465 /* 466 * we use a shortcut 467 * since @xpmap_phys_to_machine_mapping array 468 * already contains PFN to MFN mapping, we just 469 * set the l2_p2m_page MFN pointer to the MFN of the 470 * according frame of @xpmap_phys_to_machine_mapping 471 */ 472 l2_p2m_page[i] = vtomfn((vaddr_t) 473 &xpmap_phys_to_machine_mapping[i*fpp]); 474 } 475 476 HYPERVISOR_shared_info->arch.pfn_to_mfn_frame_list_list = 477 vtomfn((vaddr_t)l3_p2m_page); 478 HYPERVISOR_shared_info->arch.max_pfn = max_pfn; 479 480 } 481