1 /* $NetBSD: intr.h,v 1.11 2006/05/15 20:57:53 dogcow Exp $ */ 2 /* NetBSD intr.h,v 1.15 2004/10/31 10:39:34 yamt Exp */ 3 4 /*- 5 * Copyright (c) 1998, 2001 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Charles M. Hannum, and by Jason R. Thorpe. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 #ifndef _XEN_INTR_H_ 41 #define _XEN_INTR_H_ 42 43 #include <machine/intrdefs.h> 44 45 #ifndef _LOCORE 46 #include <machine/cpu.h> 47 #include <machine/pic.h> 48 49 #include "opt_xen.h" 50 51 /* 52 * Struct describing an event channel. 53 */ 54 55 struct evtsource { 56 int ev_maxlevel; /* max. IPL for this source */ 57 u_int32_t ev_imask; /* interrupt mask */ 58 struct intrhand *ev_handlers; /* handler chain */ 59 struct evcnt ev_evcnt; /* interrupt counter */ 60 char ev_evname[32]; /* event counter name */ 61 }; 62 63 /* 64 * Structure describing an interrupt level. struct cpu_info has an array of 65 * IPL_MAX of theses. The index in the array is equal to the stub number of 66 * the stubcode as present in vector.s 67 */ 68 69 struct intrstub { 70 #if 0 71 void *ist_entry; 72 #endif 73 void *ist_recurse; 74 void *ist_resume; 75 }; 76 77 #ifdef XEN3 78 /* for x86 compatibility */ 79 extern struct intrstub i8259_stubs[]; 80 #endif 81 82 struct iplsource { 83 struct intrhand *ipl_handlers; /* handler chain */ 84 void *ipl_recurse; /* entry for spllower */ 85 void *ipl_resume; /* entry for doreti */ 86 u_int32_t ipl_evt_mask1; /* pending events for this IPL */ 87 u_int32_t ipl_evt_mask2[NR_EVENT_CHANNELS]; 88 }; 89 90 91 92 /* 93 * Interrupt handler chains. These are linked in both the evtsource and 94 * the iplsource. 95 * The handler is called with its (single) argument. 96 */ 97 98 struct intrhand { 99 int (*ih_fun)(void *); 100 void *ih_arg; 101 int ih_level; 102 struct intrhand *ih_ipl_next; 103 struct intrhand *ih_evt_next; 104 struct cpu_info *ih_cpu; 105 }; 106 107 108 extern struct intrstub xenev_stubs[]; 109 110 #define IUNMASK(ci,level) (ci)->ci_iunmask[(level)] 111 112 extern void Xspllower(int); 113 114 static __inline int splraise(int); 115 static __inline void spllower(int); 116 static __inline void softintr(int); 117 118 /* 119 * Add a mask to cpl, and return the old value of cpl. 120 */ 121 static __inline int 122 splraise(int nlevel) 123 { 124 int olevel; 125 struct cpu_info *ci = curcpu(); 126 127 olevel = ci->ci_ilevel; 128 if (nlevel > olevel) 129 ci->ci_ilevel = nlevel; 130 __insn_barrier(); 131 return (olevel); 132 } 133 134 /* 135 * Restore a value to cpl (unmasking interrupts). If any unmasked 136 * interrupts are pending, call Xspllower() to process them. 137 */ 138 static __inline void 139 spllower(int nlevel) 140 { 141 struct cpu_info *ci = curcpu(); 142 u_int32_t imask; 143 u_long psl; 144 145 __insn_barrier(); 146 147 imask = IUNMASK(ci, nlevel); 148 psl = read_psl(); 149 disable_intr(); 150 if (ci->ci_ipending & imask) { 151 Xspllower(nlevel); 152 /* Xspllower does enable_intr() */ 153 } else { 154 ci->ci_ilevel = nlevel; 155 write_psl(psl); 156 } 157 } 158 159 #define SPL_ASSERT_BELOW(x) KDASSERT(curcpu()->ci_ilevel < (x)) 160 161 /* 162 * Software interrupt masks 163 * 164 * NOTE: spllowersoftclock() is used by hardclock() to lower the priority from 165 * clock to softclock before it calls softclock(). 166 */ 167 #define spllowersoftclock() spllower(IPL_SOFTCLOCK) 168 169 #define splsoftxenevt() splraise(IPL_SOFTXENEVT) 170 171 /* 172 * Miscellaneous 173 */ 174 #define spl0() spllower(IPL_NONE) 175 #define splraiseipl(x) splraise(x) 176 #define splx(x) spllower(x) 177 178 #include <sys/spl.h> 179 180 /* 181 * Software interrupt registration 182 * 183 * We hand-code this to ensure that it's atomic. 184 * 185 * XXX always scheduled on the current CPU. 186 */ 187 static __inline void 188 softintr(int sir) 189 { 190 struct cpu_info *ci = curcpu(); 191 192 __asm volatile("lock ; orl %1, %0" : 193 "=m"(ci->ci_ipending) : "ir" (1 << sir)); 194 } 195 196 /* 197 * XXX 198 */ 199 #define setsoftnet() softintr(SIR_NET) 200 201 /* 202 * Stub declarations. 203 */ 204 205 extern void Xsoftclock(void); 206 extern void Xsoftnet(void); 207 extern void Xsoftserial(void); 208 extern void Xsoftxenevt(void); 209 210 struct cpu_info; 211 212 extern char idt_allocmap[]; 213 214 struct pcibus_attach_args; 215 216 void intr_default_setup(void); 217 int x86_nmi(void); 218 void intr_calculatemasks(struct evtsource *); 219 220 void *intr_establish(int, struct pic *, int, int, int, int (*)(void *), void *); 221 void intr_disestablish(struct intrhand *); 222 const char *intr_string(int); 223 void cpu_intr_init(struct cpu_info *); 224 #ifdef INTRDEBUG 225 void intr_printconfig(void); 226 #endif 227 228 229 #endif /* !_LOCORE */ 230 231 /* 232 * Generic software interrupt support. 233 */ 234 235 #define X86_SOFTINTR_SOFTCLOCK 0 236 #define X86_SOFTINTR_SOFTNET 1 237 #define X86_SOFTINTR_SOFTSERIAL 2 238 #define X86_NSOFTINTR 3 239 240 #ifndef _LOCORE 241 #include <sys/queue.h> 242 243 struct x86_soft_intrhand { 244 TAILQ_ENTRY(x86_soft_intrhand) 245 sih_q; 246 struct x86_soft_intr *sih_intrhead; 247 void (*sih_fn)(void *); 248 void *sih_arg; 249 int sih_pending; 250 }; 251 252 struct x86_soft_intr { 253 TAILQ_HEAD(, x86_soft_intrhand) 254 softintr_q; 255 int softintr_ssir; 256 struct simplelock softintr_slock; 257 }; 258 259 #define x86_softintr_lock(si, s) \ 260 do { \ 261 (s) = splhigh(); \ 262 simple_lock(&si->softintr_slock); \ 263 } while (/*CONSTCOND*/ 0) 264 265 #define x86_softintr_unlock(si, s) \ 266 do { \ 267 simple_unlock(&si->softintr_slock); \ 268 splx((s)); \ 269 } while (/*CONSTCOND*/ 0) 270 271 void *softintr_establish(int, void (*)(void *), void *); 272 void softintr_disestablish(void *); 273 void softintr_init(void); 274 void softintr_dispatch(int); 275 276 #define softintr_schedule(arg) \ 277 do { \ 278 struct x86_soft_intrhand *__sih = (arg); \ 279 struct x86_soft_intr *__si = __sih->sih_intrhead; \ 280 int __s; \ 281 \ 282 x86_softintr_lock(__si, __s); \ 283 if (__sih->sih_pending == 0) { \ 284 TAILQ_INSERT_TAIL(&__si->softintr_q, __sih, sih_q); \ 285 __sih->sih_pending = 1; \ 286 softintr(__si->softintr_ssir); \ 287 } \ 288 x86_softintr_unlock(__si, __s); \ 289 } while (/*CONSTCOND*/ 0) 290 #endif /* _LOCORE */ 291 292 #endif /* _XEN_INTR_H_ */ 293