xref: /netbsd-src/sys/arch/x86/x86/patch.c (revision ce099b40997c43048fb78bd578195f81d2456523)
1 /*	$NetBSD: patch.c,v 1.12 2008/04/28 20:23:40 martin Exp $	*/
2 
3 /*-
4  * Copyright (c) 2007 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Andrew Doran.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 /*
33  * Patch kernel code at boot time, depending on available CPU features.
34  */
35 
36 #include <sys/cdefs.h>
37 __KERNEL_RCSID(0, "$NetBSD: patch.c,v 1.12 2008/04/28 20:23:40 martin Exp $");
38 
39 #include "opt_lockdebug.h"
40 
41 #include <sys/types.h>
42 #include <sys/systm.h>
43 
44 #include <machine/cpu.h>
45 #include <machine/cpufunc.h>
46 #include <machine/specialreg.h>
47 
48 #include <x86/cpuvar.h>
49 #include <x86/cputypes.h>
50 
51 void	spllower(int);
52 void	spllower_end(void);
53 void	cx8_spllower(int);
54 void	cx8_spllower_end(void);
55 void	cx8_spllower_patch(void);
56 
57 void	mutex_spin_exit_end(void);
58 void	i686_mutex_spin_exit(int);
59 void	i686_mutex_spin_exit_end(void);
60 void	i686_mutex_spin_exit_patch(void);
61 
62 void	membar_consumer(void);
63 void	membar_consumer_end(void);
64 void	membar_sync(void);
65 void	membar_sync_end(void);
66 void	sse2_lfence(void);
67 void	sse2_lfence_end(void);
68 void	sse2_mfence(void);
69 void	sse2_mfence_end(void);
70 
71 void	_atomic_cas_64(void);
72 void	_atomic_cas_64_end(void);
73 void	_atomic_cas_cx8(void);
74 void	_atomic_cas_cx8_end(void);
75 
76 extern void	*x86_lockpatch[];
77 extern void	*atomic_lockpatch[];
78 
79 #define	X86_NOP		0x90
80 #define	X86_REP		0xf3
81 #define	X86_RET		0xc3
82 #define	X86_CS		0x2e
83 #define	X86_DS		0x3e
84 #define	X86_GROUP_0F	0x0f
85 
86 static void __attribute__ ((__unused__))
87 patchfunc(void *from_s, void *from_e, void *to_s, void *to_e,
88 	  void *pcrel)
89 {
90 	uint8_t *ptr;
91 
92 	if ((uintptr_t)from_e - (uintptr_t)from_s !=
93 	    (uintptr_t)to_e - (uintptr_t)to_s)
94 		panic("patchfunc: sizes do not match (from=%p)", from_s);
95 
96 	memcpy(to_s, from_s, (uintptr_t)to_e - (uintptr_t)to_s);
97 	if (pcrel != NULL) {
98 		ptr = pcrel;
99 		/* Branch hints */
100 		if (ptr[0] == X86_CS || ptr[0] == X86_DS)
101 			ptr++;
102 		/* Conditional jumps */
103 		if (ptr[0] == X86_GROUP_0F)
104 			ptr++;
105 		/* 4-byte relative jump or call */
106 		*(uint32_t *)(ptr + 1 - (uintptr_t)from_s + (uintptr_t)to_s) +=
107 		    ((uint32_t)(uintptr_t)from_s - (uint32_t)(uintptr_t)to_s);
108 	}
109 }
110 
111 static inline void  __attribute__ ((__unused__))
112 patchbytes(void *addr, const int byte1, const int byte2)
113 {
114 
115 	((uint8_t *)addr)[0] = (uint8_t)byte1;
116 	if (byte2 != -1)
117 		((uint8_t *)addr)[1] = (uint8_t)byte2;
118 }
119 
120 void
121 x86_patch(void)
122 {
123 #if !defined(GPROF)
124 	static int again;
125 	u_long psl;
126 	u_long cr0;
127 
128 	if (again)
129 		return;
130 	again = 1;
131 
132 	/* Disable interrupts. */
133 	psl = x86_read_psl();
134 	x86_disable_intr();
135 
136 	/* Disable write protection in supervisor mode. */
137 	cr0 = rcr0();
138 	lcr0(cr0 & ~CR0_WP);
139 
140 	if (ncpu == 1) {
141 #ifndef LOCKDEBUG
142 		int i;
143 
144 		/* Uniprocessor: kill LOCK prefixes. */
145 		for (i = 0; x86_lockpatch[i] != 0; i++)
146 			patchbytes(x86_lockpatch[i], X86_NOP, -1);
147 		for (i = 0; atomic_lockpatch[i] != 0; i++)
148 			patchbytes(atomic_lockpatch[i], X86_NOP, -1);
149 		/*
150 		 * Uniprocessor: kill kernel_lock.  Fill another
151 		 * 14 bytes of NOPs so not to confuse the decoder.
152 		 */
153 		patchbytes(_kernel_lock, X86_NOP, X86_RET);
154 		patchbytes(_kernel_unlock, X86_NOP, X86_RET);
155 		for (i = 2; i < 16; i++) {
156 			patchbytes((char *)_kernel_lock + i, X86_NOP, -1);
157 			patchbytes((char *)_kernel_unlock + i, X86_NOP, -1);
158 		}
159 #endif
160 	} else if ((cpu_feature & CPUID_SSE2) != 0) {
161 		/* Faster memory barriers. */
162 		patchfunc(
163 		    sse2_lfence, sse2_lfence_end,
164 		    membar_consumer, membar_consumer_end,
165 		    NULL
166 		);
167 		patchfunc(
168 		    sse2_mfence, sse2_mfence_end,
169 		    membar_sync, membar_sync_end,
170 		    NULL
171 		);
172 	}
173 
174 	if ((cpu_feature & CPUID_CX8) != 0) {
175 		/* Faster splx(), mutex_spin_exit(). */
176 		patchfunc(
177 		    cx8_spllower, cx8_spllower_end,
178 		    spllower, spllower_end,
179 		    cx8_spllower_patch
180 		);
181 #if defined(i386)
182 #ifndef LOCKDEBUG
183 		patchfunc(
184 		    i686_mutex_spin_exit, i686_mutex_spin_exit_end,
185 		    mutex_spin_exit, mutex_spin_exit_end,
186 		    i686_mutex_spin_exit_patch
187 		);
188 #endif
189 		patchfunc(
190 		    _atomic_cas_cx8, _atomic_cas_cx8_end,
191 		    _atomic_cas_64, _atomic_cas_64_end,
192 		    NULL
193 		);
194 #endif
195 	}
196 
197 	/* Write back and invalidate cache, flush pipelines. */
198 	wbinvd();
199 	x86_flush();
200 	x86_write_psl(psl);
201 
202 	/* Re-enable write protection. */
203 	lcr0(cr0);
204 #endif	/* GPROF */
205 }
206