1 /* $NetBSD: pci_machdep.c,v 1.13 2006/02/03 19:58:21 bouyer Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. 42 * Copyright (c) 1994 Charles M. Hannum. All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 3. All advertising materials mentioning features or use of this software 53 * must display the following acknowledgement: 54 * This product includes software developed by Charles M. Hannum. 55 * 4. The name of the author may not be used to endorse or promote products 56 * derived from this software without specific prior written permission. 57 * 58 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 59 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 60 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 61 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 62 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 63 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 64 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 65 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 66 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 67 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 68 */ 69 70 /* 71 * Machine-specific functions for PCI autoconfiguration. 72 * 73 * On PCs, there are two methods of generating PCI configuration cycles. 74 * We try to detect the appropriate mechanism for this machine and set 75 * up a few function pointers to access the correct method directly. 76 * 77 * The configuration method can be hard-coded in the config file by 78 * using `options PCI_CONF_MODE=N', where `N' is the configuration mode 79 * as defined section 3.6.4.1, `Generating Configuration Cycles'. 80 */ 81 82 #include <sys/cdefs.h> 83 __KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.13 2006/02/03 19:58:21 bouyer Exp $"); 84 85 #include <sys/types.h> 86 #include <sys/param.h> 87 #include <sys/time.h> 88 #include <sys/systm.h> 89 #include <sys/errno.h> 90 #include <sys/device.h> 91 #include <sys/lock.h> 92 93 #include <uvm/uvm_extern.h> 94 95 #include <machine/bus.h> 96 #include <machine/bus_private.h> 97 98 #include <machine/pio.h> 99 100 #include <dev/isa/isareg.h> 101 #include <dev/isa/isavar.h> 102 #include <dev/pci/pcivar.h> 103 #include <dev/pci/pcireg.h> 104 #include <dev/pci/pcidevs.h> 105 106 #include "opt_pci_conf_mode.h" 107 108 int pci_mode = -1; 109 110 static void pci_bridge_hook(pci_chipset_tag_t, pcitag_t, void *); 111 struct pci_bridge_hook_arg { 112 void (*func)(pci_chipset_tag_t, pcitag_t, void *); 113 void *arg; 114 }; 115 116 117 struct simplelock pci_conf_slock = SIMPLELOCK_INITIALIZER; 118 119 #define PCI_CONF_LOCK(s) \ 120 do { \ 121 (s) = splhigh(); \ 122 simple_lock(&pci_conf_slock); \ 123 } while (0) 124 125 #define PCI_CONF_UNLOCK(s) \ 126 do { \ 127 simple_unlock(&pci_conf_slock); \ 128 splx((s)); \ 129 } while (0) 130 131 #define PCI_MODE1_ENABLE 0x80000000UL 132 #define PCI_MODE1_ADDRESS_REG 0x0cf8 133 #define PCI_MODE1_DATA_REG 0x0cfc 134 135 #define PCI_MODE2_ENABLE_REG 0x0cf8 136 #define PCI_MODE2_FORWARD_REG 0x0cfa 137 138 #define _m1tag(b, d, f) \ 139 (PCI_MODE1_ENABLE | ((b) << 16) | ((d) << 11) | ((f) << 8)) 140 #define _qe(bus, dev, fcn, vend, prod) \ 141 {_m1tag(bus, dev, fcn), PCI_ID_CODE(vend, prod)} 142 struct { 143 u_int32_t tag; 144 pcireg_t id; 145 } pcim1_quirk_tbl[] = { 146 _qe(0, 0, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_TRIFLEX1), 147 /* XXX Triflex2 not tested */ 148 _qe(0, 0, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_TRIFLEX2), 149 _qe(0, 0, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_TRIFLEX4), 150 /* Triton needed for Connectix Virtual PC */ 151 _qe(0, 0, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82437FX), 152 /* Connectix Virtual PC 5 has a 440BX */ 153 _qe(0, 0, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82443BX_NOAGP), 154 /* SIS 741 */ 155 _qe(0, 0, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_741), 156 {0, 0xffffffff} /* patchable */ 157 }; 158 #undef _m1tag 159 #undef _id 160 #undef _qe 161 162 /* 163 * PCI doesn't have any special needs; just use the generic versions 164 * of these functions. 165 */ 166 struct x86_bus_dma_tag pci_bus_dma_tag = { 167 #if defined(_LP64) || defined(PAE) 168 PCI32_DMA_BOUNCE_THRESHOLD, /* bounce_thresh */ 169 ISA_DMA_BOUNCE_THRESHOLD, /* bounce_alloclo */ 170 PCI32_DMA_BOUNCE_THRESHOLD, /* bounce_allochi */ 171 #else 172 0, 173 0, 174 0, 175 #endif 176 NULL, /* _may_bounce */ 177 _bus_dmamap_create, 178 _bus_dmamap_destroy, 179 _bus_dmamap_load, 180 _bus_dmamap_load_mbuf, 181 _bus_dmamap_load_uio, 182 _bus_dmamap_load_raw, 183 _bus_dmamap_unload, 184 #if defined(_LP64) || defined(PAE) 185 _bus_dmamap_sync, 186 #else 187 NULL, 188 #endif 189 _bus_dmamem_alloc, 190 _bus_dmamem_free, 191 _bus_dmamem_map, 192 _bus_dmamem_unmap, 193 _bus_dmamem_mmap, 194 }; 195 196 #ifdef _LP64 197 struct x86_bus_dma_tag pci_bus_dma64_tag = { 198 0, 199 0, 200 0, 201 NULL, /* _may_bounce */ 202 _bus_dmamap_create, 203 _bus_dmamap_destroy, 204 _bus_dmamap_load, 205 _bus_dmamap_load_mbuf, 206 _bus_dmamap_load_uio, 207 _bus_dmamap_load_raw, 208 _bus_dmamap_unload, 209 NULL, 210 _bus_dmamem_alloc, 211 _bus_dmamem_free, 212 _bus_dmamem_map, 213 _bus_dmamem_unmap, 214 _bus_dmamem_mmap, 215 }; 216 #endif 217 218 void 219 pci_attach_hook(parent, self, pba) 220 struct device *parent, *self; 221 struct pcibus_attach_args *pba; 222 { 223 224 if (pba->pba_bus == 0) 225 printf(": configuration mode %d", pci_mode); 226 #ifdef MPBIOS 227 mpbios_pci_attach_hook(parent, self, pba); 228 #endif 229 #ifdef MPACPI 230 mpacpi_pci_attach_hook(parent, self, pba); 231 #endif 232 } 233 234 int 235 pci_bus_maxdevs(pc, busno) 236 pci_chipset_tag_t pc; 237 int busno; 238 { 239 240 /* 241 * Bus number is irrelevant. If Configuration Mechanism 2 is in 242 * use, can only have devices 0-15 on any bus. If Configuration 243 * Mechanism 1 is in use, can have devices 0-32 (i.e. the `normal' 244 * range). 245 */ 246 if (pci_mode == 2) 247 return (16); 248 else 249 return (32); 250 } 251 252 pcitag_t 253 pci_make_tag(pc, bus, device, function) 254 pci_chipset_tag_t pc; 255 int bus, device, function; 256 { 257 pcitag_t tag; 258 259 #ifndef PCI_CONF_MODE 260 switch (pci_mode) { 261 case 1: 262 goto mode1; 263 case 2: 264 goto mode2; 265 default: 266 panic("pci_make_tag: mode not configured"); 267 } 268 #endif 269 270 #if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 1) 271 #ifndef PCI_CONF_MODE 272 mode1: 273 #endif 274 if (bus >= 256 || device >= 32 || function >= 8) 275 panic("pci_make_tag: bad request"); 276 277 tag.mode1 = PCI_MODE1_ENABLE | 278 (bus << 16) | (device << 11) | (function << 8); 279 return tag; 280 #endif 281 282 #if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 2) 283 #ifndef PCI_CONF_MODE 284 mode2: 285 #endif 286 if (bus >= 256 || device >= 16 || function >= 8) 287 panic("pci_make_tag: bad request"); 288 289 tag.mode2.port = 0xc000 | (device << 8); 290 tag.mode2.enable = 0xf0 | (function << 1); 291 tag.mode2.forward = bus; 292 return tag; 293 #endif 294 } 295 296 void 297 pci_decompose_tag(pc, tag, bp, dp, fp) 298 pci_chipset_tag_t pc; 299 pcitag_t tag; 300 int *bp, *dp, *fp; 301 { 302 303 #ifndef PCI_CONF_MODE 304 switch (pci_mode) { 305 case 1: 306 goto mode1; 307 case 2: 308 goto mode2; 309 default: 310 panic("pci_decompose_tag: mode not configured"); 311 } 312 #endif 313 314 #if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 1) 315 #ifndef PCI_CONF_MODE 316 mode1: 317 #endif 318 if (bp != NULL) 319 *bp = (tag.mode1 >> 16) & 0xff; 320 if (dp != NULL) 321 *dp = (tag.mode1 >> 11) & 0x1f; 322 if (fp != NULL) 323 *fp = (tag.mode1 >> 8) & 0x7; 324 return; 325 #endif 326 327 #if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 2) 328 #ifndef PCI_CONF_MODE 329 mode2: 330 #endif 331 if (bp != NULL) 332 *bp = tag.mode2.forward & 0xff; 333 if (dp != NULL) 334 *dp = (tag.mode2.port >> 8) & 0xf; 335 if (fp != NULL) 336 *fp = (tag.mode2.enable >> 1) & 0x7; 337 #endif 338 } 339 340 pcireg_t 341 pci_conf_read(pc, tag, reg) 342 pci_chipset_tag_t pc; 343 pcitag_t tag; 344 int reg; 345 { 346 pcireg_t data; 347 int s; 348 349 #ifndef PCI_CONF_MODE 350 switch (pci_mode) { 351 case 1: 352 goto mode1; 353 case 2: 354 goto mode2; 355 default: 356 panic("pci_conf_read: mode not configured"); 357 } 358 #endif 359 360 #if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 1) 361 #ifndef PCI_CONF_MODE 362 mode1: 363 #endif 364 PCI_CONF_LOCK(s); 365 outl(PCI_MODE1_ADDRESS_REG, tag.mode1 | reg); 366 data = inl(PCI_MODE1_DATA_REG); 367 outl(PCI_MODE1_ADDRESS_REG, 0); 368 PCI_CONF_UNLOCK(s); 369 return data; 370 #endif 371 372 #if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 2) 373 #ifndef PCI_CONF_MODE 374 mode2: 375 #endif 376 PCI_CONF_LOCK(s); 377 outb(PCI_MODE2_ENABLE_REG, tag.mode2.enable); 378 outb(PCI_MODE2_FORWARD_REG, tag.mode2.forward); 379 data = inl(tag.mode2.port | reg); 380 outb(PCI_MODE2_ENABLE_REG, 0); 381 PCI_CONF_UNLOCK(s); 382 return data; 383 #endif 384 } 385 386 void 387 pci_conf_write(pc, tag, reg, data) 388 pci_chipset_tag_t pc; 389 pcitag_t tag; 390 int reg; 391 pcireg_t data; 392 { 393 int s; 394 395 #ifndef PCI_CONF_MODE 396 switch (pci_mode) { 397 case 1: 398 goto mode1; 399 case 2: 400 goto mode2; 401 default: 402 panic("pci_conf_write: mode not configured"); 403 } 404 #endif 405 406 #if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 1) 407 #ifndef PCI_CONF_MODE 408 mode1: 409 #endif 410 PCI_CONF_LOCK(s); 411 outl(PCI_MODE1_ADDRESS_REG, tag.mode1 | reg); 412 outl(PCI_MODE1_DATA_REG, data); 413 outl(PCI_MODE1_ADDRESS_REG, 0); 414 PCI_CONF_UNLOCK(s); 415 return; 416 #endif 417 418 #if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 2) 419 #ifndef PCI_CONF_MODE 420 mode2: 421 #endif 422 PCI_CONF_LOCK(s); 423 outb(PCI_MODE2_ENABLE_REG, tag.mode2.enable); 424 outb(PCI_MODE2_FORWARD_REG, tag.mode2.forward); 425 outl(tag.mode2.port | reg, data); 426 outb(PCI_MODE2_ENABLE_REG, 0); 427 PCI_CONF_UNLOCK(s); 428 #endif 429 } 430 431 int 432 pci_mode_detect() 433 { 434 435 #ifdef PCI_CONF_MODE 436 #if (PCI_CONF_MODE == 1) || (PCI_CONF_MODE == 2) 437 return (pci_mode = PCI_CONF_MODE); 438 #else 439 #error Invalid PCI configuration mode. 440 #endif 441 #else 442 u_int32_t sav, val; 443 int i; 444 pcireg_t idreg; 445 446 if (pci_mode != -1) 447 return pci_mode; 448 449 /* 450 * We try to divine which configuration mode the host bridge wants. 451 */ 452 453 sav = inl(PCI_MODE1_ADDRESS_REG); 454 455 pci_mode = 1; /* assume this for now */ 456 /* 457 * catch some known buggy implementations of mode 1 458 */ 459 for (i = 0; i < sizeof(pcim1_quirk_tbl) / sizeof(pcim1_quirk_tbl[0]); 460 i++) { 461 pcitag_t t; 462 463 if (!pcim1_quirk_tbl[i].tag) 464 break; 465 t.mode1 = pcim1_quirk_tbl[i].tag; 466 idreg = pci_conf_read(0, t, PCI_ID_REG); /* needs "pci_mode" */ 467 if (idreg == pcim1_quirk_tbl[i].id) { 468 #ifdef DEBUG 469 printf("known mode 1 PCI chipset (%08x)\n", 470 idreg); 471 #endif 472 return (pci_mode); 473 } 474 } 475 476 /* 477 * Strong check for standard compliant mode 1: 478 * 1. bit 31 ("enable") can be set 479 * 2. byte/word access does not affect register 480 */ 481 outl(PCI_MODE1_ADDRESS_REG, PCI_MODE1_ENABLE); 482 outb(PCI_MODE1_ADDRESS_REG + 3, 0); 483 outw(PCI_MODE1_ADDRESS_REG + 2, 0); 484 val = inl(PCI_MODE1_ADDRESS_REG); 485 if ((val & 0x80fffffc) != PCI_MODE1_ENABLE) { 486 #ifdef DEBUG 487 printf("pci_mode_detect: mode 1 enable failed (%x)\n", 488 val); 489 #endif 490 goto not1; 491 } 492 outl(PCI_MODE1_ADDRESS_REG, 0); 493 val = inl(PCI_MODE1_ADDRESS_REG); 494 if ((val & 0x80fffffc) != 0) 495 goto not1; 496 return (pci_mode); 497 not1: 498 outl(PCI_MODE1_ADDRESS_REG, sav); 499 500 /* 501 * This mode 2 check is quite weak (and known to give false 502 * positives on some Compaq machines). 503 * However, this doesn't matter, because this is the 504 * last test, and simply no PCI devices will be found if 505 * this happens. 506 */ 507 outb(PCI_MODE2_ENABLE_REG, 0); 508 outb(PCI_MODE2_FORWARD_REG, 0); 509 if (inb(PCI_MODE2_ENABLE_REG) != 0 || 510 inb(PCI_MODE2_FORWARD_REG) != 0) 511 goto not2; 512 return (pci_mode = 2); 513 not2: 514 515 return (pci_mode = 0); 516 #endif 517 } 518 519 /* 520 * Determine which flags should be passed to the primary PCI bus's 521 * autoconfiguration node. We use this to detect broken chipsets 522 * which cannot safely use memory-mapped device access. 523 */ 524 int 525 pci_bus_flags() 526 { 527 int rval = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED | 528 PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY | PCI_FLAGS_MWI_OKAY; 529 int device, maxndevs; 530 pcitag_t tag; 531 pcireg_t id; 532 533 maxndevs = pci_bus_maxdevs(NULL, 0); 534 535 for (device = 0; device < maxndevs; device++) { 536 tag = pci_make_tag(NULL, 0, device, 0); 537 id = pci_conf_read(NULL, tag, PCI_ID_REG); 538 539 /* Invalid vendor ID value? */ 540 if (PCI_VENDOR(id) == PCI_VENDOR_INVALID) 541 continue; 542 /* XXX Not invalid, but we've done this ~forever. */ 543 if (PCI_VENDOR(id) == 0) 544 continue; 545 546 switch (PCI_VENDOR(id)) { 547 case PCI_VENDOR_SIS: 548 switch (PCI_PRODUCT(id)) { 549 case PCI_PRODUCT_SIS_85C496: 550 goto disable_mem; 551 } 552 break; 553 } 554 } 555 556 return (rval); 557 558 disable_mem: 559 printf("Warning: broken PCI-Host bridge detected; " 560 "disabling memory-mapped access\n"); 561 rval &= ~(PCI_FLAGS_MEM_ENABLED|PCI_FLAGS_MRL_OKAY|PCI_FLAGS_MRM_OKAY| 562 PCI_FLAGS_MWI_OKAY); 563 return (rval); 564 } 565 566 void 567 pci_device_foreach(pci_chipset_tag_t pc, int maxbus, 568 void (*func)(pci_chipset_tag_t, pcitag_t, void *), void *context) 569 { 570 pci_device_foreach_min(pc, 0, maxbus, func, context); 571 } 572 573 void 574 pci_device_foreach_min(pci_chipset_tag_t pc, int minbus, int maxbus, 575 void (*func)(pci_chipset_tag_t, pcitag_t, void *), void *context) 576 { 577 const struct pci_quirkdata *qd; 578 int bus, device, function, maxdevs, nfuncs; 579 pcireg_t id, bhlcr; 580 pcitag_t tag; 581 582 for (bus = minbus; bus <= maxbus; bus++) { 583 maxdevs = pci_bus_maxdevs(pc, bus); 584 for (device = 0; device < maxdevs; device++) { 585 tag = pci_make_tag(pc, bus, device, 0); 586 id = pci_conf_read(pc, tag, PCI_ID_REG); 587 588 /* Invalid vendor ID value? */ 589 if (PCI_VENDOR(id) == PCI_VENDOR_INVALID) 590 continue; 591 /* XXX Not invalid, but we've done this ~forever. */ 592 if (PCI_VENDOR(id) == 0) 593 continue; 594 595 qd = pci_lookup_quirkdata(PCI_VENDOR(id), 596 PCI_PRODUCT(id)); 597 598 bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG); 599 if (PCI_HDRTYPE_MULTIFN(bhlcr) || 600 (qd != NULL && 601 (qd->quirks & PCI_QUIRK_MULTIFUNCTION) != 0)) 602 nfuncs = 8; 603 else 604 nfuncs = 1; 605 606 for (function = 0; function < nfuncs; function++) { 607 tag = pci_make_tag(pc, bus, device, function); 608 id = pci_conf_read(pc, tag, PCI_ID_REG); 609 610 /* Invalid vendor ID value? */ 611 if (PCI_VENDOR(id) == PCI_VENDOR_INVALID) 612 continue; 613 /* 614 * XXX Not invalid, but we've done this 615 * ~forever. 616 */ 617 if (PCI_VENDOR(id) == 0) 618 continue; 619 (*func)(pc, tag, context); 620 } 621 } 622 } 623 } 624 625 void 626 pci_bridge_foreach(pci_chipset_tag_t pc, int minbus, int maxbus, 627 void (*func)(pci_chipset_tag_t, pcitag_t, void *), void *ctx) 628 { 629 struct pci_bridge_hook_arg bridge_hook; 630 631 bridge_hook.func = func; 632 bridge_hook.arg = ctx; 633 634 pci_device_foreach_min(pc, minbus, maxbus, pci_bridge_hook, 635 &bridge_hook); 636 } 637 638 static void 639 pci_bridge_hook(pci_chipset_tag_t pc, pcitag_t tag, void *ctx) 640 { 641 struct pci_bridge_hook_arg *bridge_hook = (void *)ctx; 642 pcireg_t reg; 643 644 reg = pci_conf_read(pc, tag, PCI_CLASS_REG); 645 if (PCI_CLASS(reg) == PCI_CLASS_BRIDGE && 646 (PCI_SUBCLASS(reg) == PCI_SUBCLASS_BRIDGE_PCI || 647 PCI_SUBCLASS(reg) == PCI_SUBCLASS_BRIDGE_CARDBUS)) { 648 (*bridge_hook->func)(pc, tag, bridge_hook->arg); 649 } 650 } 651