xref: /netbsd-src/sys/arch/x86/pci/pci_intr_machdep.c (revision 267197ec1eebfcb9810ea27a89625b6ddf68e3e7)
1 /*	$NetBSD: pci_intr_machdep.c,v 1.7 2008/01/04 18:38:31 ad Exp $	*/
2 
3 /*-
4  * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9  * NASA Ames Research Center.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. All advertising materials mentioning features or use of this software
20  *    must display the following acknowledgement:
21  *	This product includes software developed by the NetBSD
22  *	Foundation, Inc. and its contributors.
23  * 4. Neither the name of The NetBSD Foundation nor the names of its
24  *    contributors may be used to endorse or promote products derived
25  *    from this software without specific prior written permission.
26  *
27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37  * POSSIBILITY OF SUCH DAMAGE.
38  */
39 
40 /*
41  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
42  * Copyright (c) 1994 Charles M. Hannum.  All rights reserved.
43  *
44  * Redistribution and use in source and binary forms, with or without
45  * modification, are permitted provided that the following conditions
46  * are met:
47  * 1. Redistributions of source code must retain the above copyright
48  *    notice, this list of conditions and the following disclaimer.
49  * 2. Redistributions in binary form must reproduce the above copyright
50  *    notice, this list of conditions and the following disclaimer in the
51  *    documentation and/or other materials provided with the distribution.
52  * 3. All advertising materials mentioning features or use of this software
53  *    must display the following acknowledgement:
54  *	This product includes software developed by Charles M. Hannum.
55  * 4. The name of the author may not be used to endorse or promote products
56  *    derived from this software without specific prior written permission.
57  *
58  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
59  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
60  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
61  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
62  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
63  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
64  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
65  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
66  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
67  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
68  */
69 
70 /*
71  * Machine-specific functions for PCI autoconfiguration.
72  *
73  * On PCs, there are two methods of generating PCI configuration cycles.
74  * We try to detect the appropriate mechanism for this machine and set
75  * up a few function pointers to access the correct method directly.
76  *
77  * The configuration method can be hard-coded in the config file by
78  * using `options PCI_CONF_MODE=N', where `N' is the configuration mode
79  * as defined section 3.6.4.1, `Generating Configuration Cycles'.
80  */
81 
82 #include <sys/cdefs.h>
83 __KERNEL_RCSID(0, "$NetBSD: pci_intr_machdep.c,v 1.7 2008/01/04 18:38:31 ad Exp $");
84 
85 #include <sys/types.h>
86 #include <sys/param.h>
87 #include <sys/time.h>
88 #include <sys/systm.h>
89 #include <sys/errno.h>
90 #include <sys/device.h>
91 #include <sys/intr.h>
92 
93 #include <uvm/uvm_extern.h>
94 
95 #include <dev/pci/pcivar.h>
96 
97 #include "ioapic.h"
98 #include "eisa.h"
99 #include "acpi.h"
100 #include "opt_mpbios.h"
101 #include "opt_acpi.h"
102 
103 #if NIOAPIC > 0 || NACPI > 0
104 #include <machine/i82093var.h>
105 #include <machine/mpconfig.h>
106 #include <machine/mpbiosvar.h>
107 #include <machine/pic.h>
108 #endif
109 
110 #ifdef MPBIOS
111 #include <machine/mpbiosvar.h>
112 #endif
113 
114 #if NACPI > 0
115 #include <machine/mpacpi.h>
116 #endif
117 
118 int
119 pci_intr_map(pa, ihp)
120 	struct pci_attach_args *pa;
121 	pci_intr_handle_t *ihp;
122 {
123 	int pin = pa->pa_intrpin;
124 	int line = pa->pa_intrline;
125 #if NIOAPIC > 0 || NACPI > 0
126 	int rawpin = pa->pa_rawintrpin;
127 	pci_chipset_tag_t pc = pa->pa_pc;
128 	int bus, dev, func;
129 #endif
130 
131 	if (pin == 0) {
132 		/* No IRQ used. */
133 		goto bad;
134 	}
135 
136 	*ihp = 0;
137 
138 	if (pin > PCI_INTERRUPT_PIN_MAX) {
139 		printf("pci_intr_map: bad interrupt pin %d\n", pin);
140 		goto bad;
141 	}
142 
143 #if NIOAPIC > 0 || NACPI > 0
144 	pci_decompose_tag(pc, pa->pa_tag, &bus, &dev, &func);
145 	if (mp_busses != NULL) {
146 		if (intr_find_mpmapping(bus, (dev<<2)|(rawpin-1), ihp) == 0) {
147 			if ((*ihp & 0xff) == 0)
148 				*ihp |= line;
149 			return 0;
150 		}
151 		/*
152 		 * No explicit PCI mapping found. This is not fatal,
153 		 * we'll try the ISA (or possibly EISA) mappings next.
154 		 */
155 	}
156 #endif
157 
158 	/*
159 	 * Section 6.2.4, `Miscellaneous Functions', says that 255 means
160 	 * `unknown' or `no connection' on a PC.  We assume that a device with
161 	 * `no connection' either doesn't have an interrupt (in which case the
162 	 * pin number should be 0, and would have been noticed above), or
163 	 * wasn't configured by the BIOS (in which case we punt, since there's
164 	 * no real way we can know how the interrupt lines are mapped in the
165 	 * hardware).
166 	 *
167 	 * XXX
168 	 * Since IRQ 0 is only used by the clock, and we can't actually be sure
169 	 * that the BIOS did its job, we also recognize that as meaning that
170 	 * the BIOS has not configured the device.
171 	 */
172 	if (line == 0 || line == X86_PCI_INTERRUPT_LINE_NO_CONNECTION) {
173 		printf("pci_intr_map: no mapping for pin %c (line=%02x)\n",
174 		       '@' + pin, line);
175 		goto bad;
176 	} else {
177 		if (line >= NUM_LEGACY_IRQS) {
178 			printf("pci_intr_map: bad interrupt line %d\n", line);
179 			goto bad;
180 		}
181 		if (line == 2) {
182 			printf("pci_intr_map: changed line 2 to line 9\n");
183 			line = 9;
184 		}
185 	}
186 #if NIOAPIC > 0 || NACPI > 0
187 	if (mp_busses != NULL) {
188 		if (intr_find_mpmapping(mp_isa_bus, line, ihp) == 0) {
189 			if ((*ihp & 0xff) == 0)
190 				*ihp |= line;
191 			return 0;
192 		}
193 #if NEISA > 0
194 		if (intr_find_mpmapping(mp_eisa_bus, line, ihp) == 0) {
195 			if ((*ihp & 0xff) == 0)
196 				*ihp |= line;
197 			return 0;
198 		}
199 #endif
200 		printf("pci_intr_map: bus %d dev %d func %d pin %d; line %d\n",
201 		    bus, dev, func, pin, line);
202 		printf("pci_intr_map: no MP mapping found\n");
203 	}
204 #endif
205 
206 	*ihp = line;
207 	return 0;
208 
209 bad:
210 	*ihp = -1;
211 	return 1;
212 }
213 
214 const char *
215 pci_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih)
216 {
217 	return intr_string(ih);
218 }
219 
220 
221 const struct evcnt *
222 pci_intr_evcnt(pci_chipset_tag_t pc, pci_intr_handle_t ih)
223 {
224 
225 	/* XXX for now, no evcnt parent reported */
226 	return NULL;
227 }
228 
229 void *
230 pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih,
231     int level, int (*func)(void *), void *arg)
232 {
233 	int pin, irq;
234 	struct pic *pic;
235 
236 	pic = &i8259_pic;
237 	pin = irq = ih;
238 
239 #if NIOAPIC > 0
240 	if (ih & APIC_INT_VIA_APIC) {
241 		pic = (struct pic *)ioapic_find(APIC_IRQ_APIC(ih));
242 		if (pic == NULL) {
243 			printf("pci_intr_establish: bad ioapic %d\n",
244 			    APIC_IRQ_APIC(ih));
245 			return NULL;
246 		}
247 		pin = APIC_IRQ_PIN(ih);
248 		irq = APIC_IRQ_LEGACY_IRQ(ih);
249 		if (irq < 0 || irq >= NUM_LEGACY_IRQS)
250 			irq = -1;
251 	}
252 #endif
253 
254 	return intr_establish(irq, pic, pin, IST_LEVEL, level, func, arg);
255 }
256 
257 void
258 pci_intr_disestablish(pci_chipset_tag_t pc, void *cookie)
259 {
260 
261 	intr_disestablish(cookie);
262 }
263