1*9709f2afSjmcneill /* $NetBSD: pci_addr_fixup.h,v 1.1 2008/05/18 02:06:14 jmcneill Exp $ */ 2*9709f2afSjmcneill 3*9709f2afSjmcneill /*- 4*9709f2afSjmcneill * Copyright (c) 2000 UCHIYAMA Yasushi. All rights reserved. 5*9709f2afSjmcneill * 6*9709f2afSjmcneill * Redistribution and use in source and binary forms, with or without 7*9709f2afSjmcneill * modification, are permitted provided that the following conditions 8*9709f2afSjmcneill * are met: 9*9709f2afSjmcneill * 1. Redistributions of source code must retain the above copyright 10*9709f2afSjmcneill * notice, this list of conditions and the following disclaimer. 11*9709f2afSjmcneill * 2. Redistributions in binary form must reproduce the above copyright 12*9709f2afSjmcneill * notice, this list of conditions and the following disclaimer in the 13*9709f2afSjmcneill * documentation and/or other materials provided with the distribution. 14*9709f2afSjmcneill * 3. The name of the author may not be used to endorse or promote products 15*9709f2afSjmcneill * derived from this software without specific prior written permission. 16*9709f2afSjmcneill * 17*9709f2afSjmcneill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18*9709f2afSjmcneill * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19*9709f2afSjmcneill * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20*9709f2afSjmcneill * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21*9709f2afSjmcneill * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22*9709f2afSjmcneill * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23*9709f2afSjmcneill * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24*9709f2afSjmcneill * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25*9709f2afSjmcneill * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26*9709f2afSjmcneill * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27*9709f2afSjmcneill */ 28*9709f2afSjmcneill 29*9709f2afSjmcneill struct pciaddr { 30*9709f2afSjmcneill struct extent *extent_mem; 31*9709f2afSjmcneill struct extent *extent_port; 32*9709f2afSjmcneill bus_addr_t mem_alloc_start; 33*9709f2afSjmcneill bus_addr_t port_alloc_start; 34*9709f2afSjmcneill int nbogus; 35*9709f2afSjmcneill }; 36*9709f2afSjmcneill 37*9709f2afSjmcneill extern struct pciaddr pciaddr; 38*9709f2afSjmcneill 39*9709f2afSjmcneill void pci_addr_fixup(pci_chipset_tag_t, int); 40*9709f2afSjmcneill 41*9709f2afSjmcneill /* for cardbus stuff */ 42*9709f2afSjmcneill typedef int (*pciaddr_resource_manage_func_t) 43*9709f2afSjmcneill (pci_chipset_tag_t, pcitag_t, int, void *, int, 44*9709f2afSjmcneill bus_addr_t *, bus_size_t); 45*9709f2afSjmcneill 46*9709f2afSjmcneill void pciaddr_resource_manage(pci_chipset_tag_t, pcitag_t, 47*9709f2afSjmcneill pciaddr_resource_manage_func_t, 48*9709f2afSjmcneill void *); 49*9709f2afSjmcneill 50*9709f2afSjmcneill void pciaddr_print_devid(pci_chipset_tag_t, pcitag_t); 51*9709f2afSjmcneill 52*9709f2afSjmcneill bus_addr_t pciaddr_ioaddr(uint32_t); 53