xref: /netbsd-src/sys/arch/x86/pci/fwhrng.c (revision 7788a0781fe6ff2cce37368b4578a7ade0850cb1)
1 /*	$NetBSD: fwhrng.c,v 1.5 2012/02/02 19:43:01 tls Exp $	*/
2 
3 /*
4  * Copyright (c) 2000 Michael Shalayeff
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
20  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22  * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
25  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
26  * THE POSSIBILITY OF SUCH DAMAGE.
27  *
28  *	from OpenBSD: pchb.c,v 1.23 2000/10/23 20:07:30 deraadt Exp
29  */
30 
31 #include <sys/cdefs.h>
32 __KERNEL_RCSID(0, "$NetBSD: fwhrng.c,v 1.5 2012/02/02 19:43:01 tls Exp $");
33 
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/device.h>
37 #include <sys/time.h>
38 #include <sys/rnd.h>
39 
40 #include <sys/bus.h>
41 
42 #include <arch/x86/pci/i82802reg.h>
43 
44 struct fwhrng_softc {
45 	device_t sc_dev;
46 
47 	bus_space_tag_t sc_st;
48 	bus_space_handle_t sc_sh;
49 
50 	struct callout sc_rnd_ch;
51 	krndsource_t sc_rnd_source;
52 
53 	int sc_rnd_i;
54 	uint32_t sc_rnd_ax;
55 };
56 
57 static int fwhrng_match(device_t, cfdata_t, void *);
58 static void fwhrng_attach(device_t, device_t, void *);
59 static int fwhrng_detach(device_t, int);
60 
61 static void fwhrng_callout(void *v);
62 
63 #define	FWHRNG_RETRIES		1000
64 #define	FWHRNG_MIN_SAMPLES	10
65 
66 CFATTACH_DECL_NEW(fwhrng, sizeof(struct fwhrng_softc),
67     fwhrng_match, fwhrng_attach, fwhrng_detach, NULL);
68 
69 static int
70 fwhrng_match(device_t parent, cfdata_t match, void *aux)
71 {
72 	bus_space_tag_t bst;
73 	bus_space_handle_t bsh;
74 	int ret;
75 	uint8_t id0, id1, data0, data1;
76 
77 	ret = 0;
78 
79 	bst = x86_bus_space_mem;
80 
81 	/* read chip ID */
82 	if (bus_space_map(bst, I82802AB_MEMBASE, I82802AB_WINSIZE, 0, &bsh))
83 		return 0;
84 
85 	bus_space_write_1(bst, bsh, 0, 0xff); /* reset */
86 	data0 = bus_space_read_1(bst, bsh, 0);
87 	data1 = bus_space_read_1(bst, bsh, 1);
88 	bus_space_write_1(bst, bsh, 0, 0x90); /* enter read id */
89 	id0 = bus_space_read_1(bst, bsh, 0);
90 	id1 = bus_space_read_1(bst, bsh, 1);
91 	bus_space_write_1(bst, bsh, 0, 0xff); /* reset */
92 
93 	bus_space_unmap(bst, bsh, I82802AB_WINSIZE);
94 
95 	aprint_debug_dev(parent, "fwh: data %02x,%02x, id %02x,%02x\n",
96 	    data0, data1, id0, id1);
97 
98 	/* unlikely to have these match if we actually read the ID */
99 	if ((id0 == data0) && (id1 == data1))
100 		return 0;
101 
102 	/* check for chips with RNG */
103 	if (!(id0 == I82802_MFG))
104 		return 0;
105 	if (!((id1 == I82802AB_ID) || (id1 == I82802AC_ID)))
106 		return 0;
107 
108 	/* check for RNG presence */
109 	if (bus_space_map(bst, I82802AC_REGBASE, I82802AC_WINSIZE, 0, &bsh))
110 		return 0;
111 	data0 = bus_space_read_1(bst, bsh, I82802_RNG_HSR);
112 	bus_space_unmap(bst, bsh, I82802AC_WINSIZE);
113 	if ((data0 & I82802_RNG_HSR_PRESENT) == I82802_RNG_HSR_PRESENT)
114 		return 1;
115 
116 	return 0;
117 }
118 
119 static void
120 fwhrng_attach(device_t parent, device_t self, void *aux)
121 {
122 	struct fwhrng_softc *sc;
123 	int i, j, count_ff;
124 	uint8_t reg8;
125 
126 	sc = device_private(self);
127 	sc->sc_dev = self;
128 
129 	aprint_naive("\n");
130 	aprint_normal(": Intel Firmware Hub Random Number Generator\n");
131 
132 	sc->sc_st = x86_bus_space_mem;
133 
134 	if (bus_space_map(sc->sc_st, I82802AC_REGBASE, I82802AC_WINSIZE, 0,
135 	    &sc->sc_sh) != 0) {
136 		aprint_error_dev(self, "unable to map registers\n");
137 		return;
138 	}
139 
140 	/* Enable the RNG. */
141 	reg8 = bus_space_read_1(sc->sc_st, sc->sc_sh, I82802_RNG_HSR);
142 	bus_space_write_1(sc->sc_st, sc->sc_sh, I82802_RNG_HSR,
143 	    reg8 | I82802_RNG_HSR_ENABLE);
144 	reg8 = bus_space_read_1(sc->sc_st, sc->sc_sh, I82802_RNG_HSR);
145 	if ((reg8 & I82802_RNG_HSR_ENABLE) == 0) {
146 		aprint_error_dev(self, "unable to enable\n");
147 		bus_space_unmap(sc->sc_st, sc->sc_sh, I82802AC_WINSIZE);
148 		return;
149 	}
150 
151 	/* Check to see if we can read data from the RNG. */
152 	count_ff = 0;
153 	for (j = 0; j < FWHRNG_MIN_SAMPLES; ++j) {
154 		for (i = 0; i < FWHRNG_RETRIES; i++) {
155 			reg8 = bus_space_read_1(sc->sc_st, sc->sc_sh,
156 			    I82802_RNG_DSR);
157 			if (!(reg8 & I82802_RNG_DSR_VALID)) {
158 				delay(10);
159 				continue;
160 			}
161 			reg8 = bus_space_read_1(sc->sc_st, sc->sc_sh,
162 			    I82802_RNG_DR);
163 			break;
164 		}
165 		if (i == FWHRNG_RETRIES) {
166 			bus_space_unmap(sc->sc_st, sc->sc_sh, I82802AC_WINSIZE);
167 			aprint_verbose_dev(sc->sc_dev,
168 			    "timeout reading test samples, RNG disabled.\n");
169 			return;
170 		}
171 		if (reg8 == 0xff)
172 			++count_ff;
173 	}
174 
175 	if (count_ff == FWHRNG_MIN_SAMPLES) {
176 		/* Disable the RNG. */
177 		reg8 = bus_space_read_1(sc->sc_st, sc->sc_sh, I82802_RNG_HSR);
178 		bus_space_write_1(sc->sc_st, sc->sc_sh, I82802_RNG_HSR,
179 		    reg8 & ~I82802_RNG_HSR_ENABLE);
180 		bus_space_unmap(sc->sc_st, sc->sc_sh, I82802AC_WINSIZE);
181 		aprint_error_dev(sc->sc_dev,
182 		    "returns constant 0xff stream, RNG disabled.\n");
183 		return;
184 	}
185 
186 	/*
187 	 * Should test entropy source to ensure
188 	 * that it passes the Statistical Random
189 	 * Number Generator Tests in section 4.11.1,
190 	 * FIPS PUB 140-1.
191 	 *
192 	 *	http://csrc.nist.gov/fips/fips1401.htm
193 	 */
194 
195 	aprint_debug_dev(sc->sc_dev, "random number generator enabled\n");
196 
197 	callout_init(&sc->sc_rnd_ch, 0);
198 	/* FWH is polled for entropy, so no estimate is available. */
199 	rnd_attach_source(&sc->sc_rnd_source, device_xname(sc->sc_dev),
200 	    RND_TYPE_RNG, RND_FLAG_NO_ESTIMATE);
201 	sc->sc_rnd_i = sizeof(sc->sc_rnd_ax);
202 	fwhrng_callout(sc);
203 
204 	return;
205 }
206 
207 static int
208 fwhrng_detach(device_t self, int flags)
209 {
210 	struct fwhrng_softc *sc;
211 	uint8_t reg8;
212 
213 	sc = device_private(self);
214 
215 	rnd_detach_source(&sc->sc_rnd_source);
216 
217 	callout_stop(&sc->sc_rnd_ch);
218 	callout_destroy(&sc->sc_rnd_ch);
219 
220 	/* Disable the RNG. */
221 	reg8 = bus_space_read_1(sc->sc_st, sc->sc_sh, I82802_RNG_HSR);
222 	bus_space_write_1(sc->sc_st, sc->sc_sh, I82802_RNG_HSR,
223 	    reg8 & ~I82802_RNG_HSR_ENABLE);
224 
225 	bus_space_unmap(sc->sc_st, sc->sc_sh, I82802AC_WINSIZE);
226 
227 	return 0;
228 }
229 
230 static void
231 fwhrng_callout(void *v)
232 {
233 	struct fwhrng_softc *sc = v;
234 
235 	if ((bus_space_read_1(sc->sc_st, sc->sc_sh, I82802_RNG_DSR) &
236 	     I82802_RNG_DSR_VALID) != 0) {
237 		sc->sc_rnd_ax = (sc->sc_rnd_ax << NBBY) |
238 		    bus_space_read_1(sc->sc_st, sc->sc_sh, I82802_RNG_DR);
239 		if (--sc->sc_rnd_i == 0) {
240 			sc->sc_rnd_i = sizeof(sc->sc_rnd_ax);
241 			rnd_add_data(&sc->sc_rnd_source, &sc->sc_rnd_ax,
242 			    sizeof(sc->sc_rnd_ax),
243 			    sizeof(sc->sc_rnd_ax) * NBBY);
244 		}
245 	}
246 	callout_reset(&sc->sc_rnd_ch, 1, fwhrng_callout, sc);
247 }
248