xref: /netbsd-src/sys/arch/x86/pci/amdsmn.c (revision ccd9df534e375a4366c5b55f23782053c7a98d82)
1 /*	$NetBSD: amdsmn.c,v 1.17 2023/07/28 02:28:33 msaitoh Exp $	*/
2 
3 /*-
4  * Copyright (c) 2017, 2019 Conrad Meyer <cem@FreeBSD.org>
5  * All rights reserved.
6  *
7  * NetBSD port by Ian Clark <mrrooster@gmail.com>
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
20  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
21  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
22  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
23  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
24  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
26  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
27  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28  * POSSIBILITY OF SUCH DAMAGE.
29  */
30 
31 #include <sys/cdefs.h>
32 __KERNEL_RCSID(0, "$NetBSD: amdsmn.c,v 1.17 2023/07/28 02:28:33 msaitoh Exp $ ");
33 
34 /*
35  * Driver for the AMD Family 15h (model 60+) and 17h CPU
36  * System Management Network.
37  */
38 
39 #include <sys/param.h>
40 #include <sys/device.h>
41 #include <sys/errno.h>
42 #include <sys/mutex.h>
43 #include <sys/systm.h>
44 #include <sys/cpu.h>
45 #include <sys/module.h>
46 
47 #include <machine/specialreg.h>
48 
49 #include <dev/pci/pcireg.h>
50 #include <dev/pci/pcivar.h>
51 #include <dev/pci/pcidevs.h>
52 
53 #include "amdsmn.h"
54 #include "ioconf.h"
55 
56 #define	F15H_SMN_ADDR_REG	0xb8
57 #define	F15H_SMN_DATA_REG	0xbc
58 #define	F17H_SMN_ADDR_REG	0x60
59 #define	F17H_SMN_DATA_REG	0x64
60 
61 struct amdsmn_softc {
62 	kmutex_t smn_lock;
63 	uint8_t smn_addr_reg;
64 	uint8_t smn_data_reg;
65 	struct pci_attach_args pa;
66 	pci_chipset_tag_t pc;
67 	pcitag_t pcitag;
68 };
69 
70 static const struct pciid {
71 	uint16_t	amdsmn_deviceid;
72 	uint8_t		amdsmn_addr_reg;
73 	uint8_t		amdsmn_data_reg;
74 } amdsmn_ids[] = {
75 	{
76 		.amdsmn_deviceid = PCI_PRODUCT_AMD_F15_6X_RC,
77 		.amdsmn_addr_reg = F15H_SMN_ADDR_REG,
78 		.amdsmn_data_reg = F15H_SMN_DATA_REG,
79 	},
80 	{
81 		.amdsmn_deviceid = PCI_PRODUCT_AMD_F17_RC,
82 		.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
83 		.amdsmn_data_reg = F17H_SMN_DATA_REG,
84 	},
85 	{
86 		.amdsmn_deviceid = PCI_PRODUCT_AMD_F17_1X_RC,
87 		.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
88 		.amdsmn_data_reg = F17H_SMN_DATA_REG,
89 	},
90 	{
91 		.amdsmn_deviceid = PCI_PRODUCT_AMD_F17_6X_RC,
92 		.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
93 		.amdsmn_data_reg = F17H_SMN_DATA_REG,
94 	},
95 	{
96 		.amdsmn_deviceid = PCI_PRODUCT_AMD_F17_7X_RC, /* or F19_0X */
97 		.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
98 		.amdsmn_data_reg = F17H_SMN_DATA_REG,
99 	},
100 	{
101 		.amdsmn_deviceid = PCI_PRODUCT_AMD_F17_AX_RC, /* or F19_4X */
102 		.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
103 		.amdsmn_data_reg = F17H_SMN_DATA_REG,
104 	},
105 	{
106 		.amdsmn_deviceid = PCI_PRODUCT_AMD_F19_1X_RC,
107 		.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
108 		.amdsmn_data_reg = F17H_SMN_DATA_REG,
109 	},
110 	{
111 		.amdsmn_deviceid = PCI_PRODUCT_AMD_F19_6X_RC,
112 		.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
113 		.amdsmn_data_reg = F17H_SMN_DATA_REG,
114 	},
115 	{
116 		.amdsmn_deviceid = PCI_PRODUCT_AMD_F19_7X_RC,
117 		.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
118 		.amdsmn_data_reg = F17H_SMN_DATA_REG,
119 	},
120 };
121 
122 static int amdsmn_match(device_t, cfdata_t, void *);
123 static void amdsmn_attach(device_t, device_t, void *);
124 static int amdsmn_rescan(device_t, const char *, const int *);
125 static int amdsmn_detach(device_t, int);
126 static int amdsmn_misc_search(device_t, cfdata_t, const int *, void *);
127 
128 CFATTACH_DECL3_NEW(amdsmn, sizeof(struct amdsmn_softc), amdsmn_match,
129     amdsmn_attach, amdsmn_detach, NULL, amdsmn_rescan, NULL, 0);
130 
131 static int
132 amdsmn_match(device_t parent, cfdata_t match, void *aux)
133 {
134 	struct pci_attach_args *pa = aux;
135 	size_t i;
136 
137 	if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_AMD)
138 		return 0;
139 
140 	for (i = 0; i < __arraycount(amdsmn_ids); i++)
141 		if (PCI_PRODUCT(pa->pa_id) == amdsmn_ids[i].amdsmn_deviceid)
142 			return 2;
143 
144 	return 0;
145 }
146 
147 static int
148 amdsmn_misc_search(device_t parent, cfdata_t cf, const int *locs, void *aux)
149 {
150 	if (config_probe(parent, cf, aux))
151 		config_attach(parent, cf, aux, NULL,
152 		    CFARGS(.locators = locs));
153 
154 	return 0;
155 }
156 
157 static void
158 amdsmn_attach(device_t parent, device_t self, void *aux)
159 {
160 	struct amdsmn_softc *sc = device_private(self);
161 	struct pci_attach_args *pa = aux;
162 	size_t i;
163 
164 	mutex_init(&sc->smn_lock, MUTEX_DEFAULT, IPL_NONE);
165 	sc->pa = *pa;
166 	sc->pc = pa->pa_pc;
167 	sc->pcitag = pa->pa_tag;
168 
169 	for (i = 0; i < __arraycount(amdsmn_ids); i++)
170 		if (PCI_PRODUCT(pa->pa_id) == amdsmn_ids[i].amdsmn_deviceid) {
171 			sc->smn_addr_reg = amdsmn_ids[i].amdsmn_addr_reg;
172 			sc->smn_data_reg = amdsmn_ids[i].amdsmn_data_reg;
173 		}
174 
175 	// aprint_normal(": AMD Family 17h System Management Network\n");
176 	aprint_normal(": AMD System Management Network\n");
177 
178 	pmf_device_register(self, NULL, NULL);
179 	amdsmn_rescan(self, NULL, NULL);
180 }
181 
182 static int
183 amdsmn_rescan(device_t self, const char *ifattr, const int *locators)
184 {
185 	struct amdsmn_softc *sc = device_private(self);
186 
187 	config_search(self, &sc->pa,
188 	    CFARGS(.search = amdsmn_misc_search));
189 
190 	return 0;
191 }
192 
193 static int
194 amdsmn_detach(device_t self, int flags)
195 {
196 	struct amdsmn_softc *sc = device_private(self);
197 
198 	pmf_device_deregister(self);
199 
200 	mutex_destroy(&sc->smn_lock);
201 	aprint_normal_dev(self,"detach!\n");
202 
203 	return 0;
204 }
205 
206 int
207 amdsmn_read(device_t dev, uint32_t addr, uint32_t *value)
208 {
209 	struct amdsmn_softc *sc = device_private(dev);
210 
211 	mutex_enter(&sc->smn_lock);
212 	pci_conf_write(sc->pc, sc->pcitag, sc->smn_addr_reg, addr);
213 	*value = pci_conf_read(sc->pc, sc->pcitag, sc->smn_data_reg);
214 	mutex_exit(&sc->smn_lock);
215 
216 	return 0;
217 }
218 
219 int
220 amdsmn_write(device_t dev, uint32_t addr, uint32_t value)
221 {
222 	struct amdsmn_softc *sc = device_private(dev);
223 
224 	mutex_enter(&sc->smn_lock);
225 	pci_conf_write(sc->pc, sc->pcitag, sc->smn_addr_reg, addr);
226 	pci_conf_write(sc->pc, sc->pcitag, sc->smn_data_reg, value);
227 	mutex_exit(&sc->smn_lock);
228 
229 	return 0;
230 }
231 
232 MODULE(MODULE_CLASS_DRIVER, amdsmn, "pci");
233 
234 #ifdef _MODULE
235 #include "ioconf.c"
236 #endif
237 
238 static int
239 amdsmn_modcmd(modcmd_t cmd, void *opaque)
240 {
241 	int error = 0;
242 
243 #ifdef _MODULE
244 	switch (cmd) {
245 	case MODULE_CMD_INIT:
246 		error = config_init_component(cfdriver_ioconf_amdsmn,
247 		    cfattach_ioconf_amdsmn, cfdata_ioconf_amdsmn);
248 		break;
249 	case MODULE_CMD_FINI:
250 		error = config_fini_component(cfdriver_ioconf_amdsmn,
251 		    cfattach_ioconf_amdsmn, cfdata_ioconf_amdsmn);
252 		break;
253 	default:
254 		error = ENOTTY;
255 		break;
256 	}
257 #endif
258 
259 	return error;
260 }
261 
262