xref: /netbsd-src/sys/arch/x86/pci/amdsmn.c (revision aef5eb5f59cdfe8314f1b5f78ac04eb144e44010)
1 /*	$NetBSD: amdsmn.c,v 1.14 2022/10/01 15:50:05 msaitoh Exp $	*/
2 
3 /*-
4  * Copyright (c) 2017, 2019 Conrad Meyer <cem@FreeBSD.org>
5  * All rights reserved.
6  *
7  * NetBSD port by Ian Clark <mrrooster@gmail.com>
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
20  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
21  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
22  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
23  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
24  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
26  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
27  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28  * POSSIBILITY OF SUCH DAMAGE.
29  */
30 
31 #include <sys/cdefs.h>
32 __KERNEL_RCSID(0, "$NetBSD: amdsmn.c,v 1.14 2022/10/01 15:50:05 msaitoh Exp $ ");
33 
34 /*
35  * Driver for the AMD Family 15h (model 60+) and 17h CPU
36  * System Management Network.
37  */
38 
39 #include <sys/param.h>
40 #include <sys/device.h>
41 #include <sys/errno.h>
42 #include <sys/mutex.h>
43 #include <sys/systm.h>
44 #include <sys/cpu.h>
45 #include <sys/module.h>
46 
47 #include <machine/specialreg.h>
48 
49 #include <dev/pci/pcireg.h>
50 #include <dev/pci/pcivar.h>
51 #include <dev/pci/pcidevs.h>
52 
53 #include "amdsmn.h"
54 #include "ioconf.h"
55 
56 #define	F15H_SMN_ADDR_REG	0xb8
57 #define	F15H_SMN_DATA_REG	0xbc
58 #define	F17H_SMN_ADDR_REG	0x60
59 #define	F17H_SMN_DATA_REG	0x64
60 
61 struct amdsmn_softc {
62 	kmutex_t smn_lock;
63 	uint8_t smn_addr_reg;
64 	uint8_t smn_data_reg;
65 	struct pci_attach_args pa;
66 	pci_chipset_tag_t pc;
67 	pcitag_t pcitag;
68 };
69 
70 static const struct pciid {
71 	uint16_t	amdsmn_deviceid;
72 	uint8_t		amdsmn_addr_reg;
73 	uint8_t		amdsmn_data_reg;
74 } amdsmn_ids[] = {
75 	{
76 		.amdsmn_deviceid = PCI_PRODUCT_AMD_F15_6X_RC,
77 		.amdsmn_addr_reg = F15H_SMN_ADDR_REG,
78 		.amdsmn_data_reg = F15H_SMN_DATA_REG,
79 	},
80 	{
81 		.amdsmn_deviceid = PCI_PRODUCT_AMD_F17_RC,
82 		.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
83 		.amdsmn_data_reg = F17H_SMN_DATA_REG,
84 	},
85 	{
86 		.amdsmn_deviceid = PCI_PRODUCT_AMD_F17_1X_RC,
87 		.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
88 		.amdsmn_data_reg = F17H_SMN_DATA_REG,
89 	},
90 	{
91 		.amdsmn_deviceid = PCI_PRODUCT_AMD_F17_6X_RC,
92 		.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
93 		.amdsmn_data_reg = F17H_SMN_DATA_REG,
94 	},
95 	{
96 		.amdsmn_deviceid = PCI_PRODUCT_AMD_F17_7X_RC,
97 		.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
98 		.amdsmn_data_reg = F17H_SMN_DATA_REG,
99 	},
100 	{
101 		.amdsmn_deviceid = PCI_PRODUCT_AMD_F19_6X_RC,
102 		.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
103 		.amdsmn_data_reg = F17H_SMN_DATA_REG,
104 	},
105 };
106 
107 static int amdsmn_match(device_t, cfdata_t, void *);
108 static void amdsmn_attach(device_t, device_t, void *);
109 static int amdsmn_rescan(device_t, const char *, const int *);
110 static int amdsmn_detach(device_t, int);
111 static int amdsmn_misc_search(device_t, cfdata_t, const int *, void *);
112 
113 CFATTACH_DECL3_NEW(amdsmn, sizeof(struct amdsmn_softc), amdsmn_match,
114     amdsmn_attach, amdsmn_detach, NULL, amdsmn_rescan, NULL, 0);
115 
116 static int
117 amdsmn_match(device_t parent, cfdata_t match, void *aux)
118 {
119 	struct pci_attach_args *pa = aux;
120 	size_t i;
121 
122 	if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_AMD)
123 		return 0;
124 
125 	for (i = 0; i < __arraycount(amdsmn_ids); i++)
126 		if (PCI_PRODUCT(pa->pa_id) == amdsmn_ids[i].amdsmn_deviceid)
127 			return 2;
128 
129 	return 0;
130 }
131 
132 static int
133 amdsmn_misc_search(device_t parent, cfdata_t cf, const int *locs, void *aux)
134 {
135 	if (config_probe(parent, cf, aux))
136 		config_attach(parent, cf, aux, NULL,
137 		    CFARGS(.locators = locs));
138 
139 	return 0;
140 }
141 
142 static void
143 amdsmn_attach(device_t parent, device_t self, void *aux)
144 {
145 	struct amdsmn_softc *sc = device_private(self);
146 	struct pci_attach_args *pa = aux;
147 	size_t i;
148 
149 	mutex_init(&sc->smn_lock, MUTEX_DEFAULT, IPL_NONE);
150 	sc->pa = *pa;
151 	sc->pc = pa->pa_pc;
152 	sc->pcitag = pa->pa_tag;
153 
154 	for (i = 0; i < __arraycount(amdsmn_ids); i++)
155 		if (PCI_PRODUCT(pa->pa_id) == amdsmn_ids[i].amdsmn_deviceid) {
156 			sc->smn_addr_reg = amdsmn_ids[i].amdsmn_addr_reg;
157 			sc->smn_data_reg = amdsmn_ids[i].amdsmn_data_reg;
158 		}
159 
160 	// aprint_normal(": AMD Family 17h System Management Network\n");
161 	aprint_normal(": AMD System Management Network\n");
162 	amdsmn_rescan(self, NULL, NULL);
163 }
164 
165 static int
166 amdsmn_rescan(device_t self, const char *ifattr, const int *locators)
167 {
168 	struct amdsmn_softc *sc = device_private(self);
169 
170 	config_search(self, &sc->pa,
171 	    CFARGS(.search = amdsmn_misc_search));
172 
173 	return 0;
174 }
175 
176 static int
177 amdsmn_detach(device_t self, int flags)
178 {
179 	struct amdsmn_softc *sc = device_private(self);
180 
181 	mutex_destroy(&sc->smn_lock);
182 	aprint_normal_dev(self,"detach!\n");
183 
184 	return 0;
185 }
186 
187 int
188 amdsmn_read(device_t dev, uint32_t addr, uint32_t *value)
189 {
190 	struct amdsmn_softc *sc = device_private(dev);
191 
192 	mutex_enter(&sc->smn_lock);
193 	pci_conf_write(sc->pc, sc->pcitag, sc->smn_addr_reg, addr);
194 	*value = pci_conf_read(sc->pc, sc->pcitag, sc->smn_data_reg);
195 	mutex_exit(&sc->smn_lock);
196 
197 	return 0;
198 }
199 
200 int
201 amdsmn_write(device_t dev, uint32_t addr, uint32_t value)
202 {
203 	struct amdsmn_softc *sc = device_private(dev);
204 
205 	mutex_enter(&sc->smn_lock);
206 	pci_conf_write(sc->pc, sc->pcitag, sc->smn_addr_reg, addr);
207 	pci_conf_write(sc->pc, sc->pcitag, sc->smn_data_reg, value);
208 	mutex_exit(&sc->smn_lock);
209 
210 	return 0;
211 }
212 
213 MODULE(MODULE_CLASS_DRIVER, amdsmn, "pci");
214 
215 #ifdef _MODULE
216 #include "ioconf.c"
217 #endif
218 
219 static int
220 amdsmn_modcmd(modcmd_t cmd, void *opaque)
221 {
222 	int error = 0;
223 
224 #ifdef _MODULE
225 	switch (cmd) {
226 	case MODULE_CMD_INIT:
227 		error = config_init_component(cfdriver_ioconf_amdsmn,
228 		    cfattach_ioconf_amdsmn, cfdata_ioconf_amdsmn);
229 		break;
230 	case MODULE_CMD_FINI:
231 		error = config_fini_component(cfdriver_ioconf_amdsmn,
232 		    cfattach_ioconf_amdsmn, cfdata_ioconf_amdsmn);
233 		break;
234 	default:
235 		error = ENOTTY;
236 		break;
237 	}
238 #endif
239 
240 	return error;
241 }
242 
243