xref: /netbsd-src/sys/arch/x86/isa/isa_machdep.c (revision cac8e449158efc7261bebc8657cbb0125a2cfdde)
1 /*	$NetBSD: isa_machdep.c,v 1.23 2008/07/03 14:02:25 drochner Exp $	*/
2 
3 /*-
4  * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Charles M. Hannum and by Jason R. Thorpe of the Numerical Aerospace
9  * Simulation Facility, NASA Ames Research Center.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30  * POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 /*-
34  * Copyright (c) 1991 The Regents of the University of California.
35  * All rights reserved.
36  *
37  * This code is derived from software contributed to Berkeley by
38  * William Jolitz.
39  *
40  * Redistribution and use in source and binary forms, with or without
41  * modification, are permitted provided that the following conditions
42  * are met:
43  * 1. Redistributions of source code must retain the above copyright
44  *    notice, this list of conditions and the following disclaimer.
45  * 2. Redistributions in binary form must reproduce the above copyright
46  *    notice, this list of conditions and the following disclaimer in the
47  *    documentation and/or other materials provided with the distribution.
48  * 3. Neither the name of the University nor the names of its contributors
49  *    may be used to endorse or promote products derived from this software
50  *    without specific prior written permission.
51  *
52  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
53  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
54  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
55  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
56  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
57  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
58  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
59  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
60  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
61  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
62  * SUCH DAMAGE.
63  *
64  *	@(#)isa.c	7.2 (Berkeley) 5/13/91
65  */
66 
67 #include <sys/cdefs.h>
68 __KERNEL_RCSID(0, "$NetBSD: isa_machdep.c,v 1.23 2008/07/03 14:02:25 drochner Exp $");
69 
70 #include <sys/param.h>
71 #include <sys/systm.h>
72 #include <sys/kernel.h>
73 #include <sys/syslog.h>
74 #include <sys/device.h>
75 #include <sys/malloc.h>
76 #include <sys/proc.h>
77 #include <sys/mbuf.h>
78 
79 #include <machine/bus.h>
80 #include <machine/bus_private.h>
81 
82 #include <machine/pio.h>
83 #include <machine/cpufunc.h>
84 
85 #include <dev/isa/isareg.h>
86 #include <dev/isa/isavar.h>
87 
88 #include <uvm/uvm_extern.h>
89 
90 #include "ioapic.h"
91 
92 #if NIOAPIC > 0
93 #include <machine/i82093var.h>
94 #include <machine/mpbiosvar.h>
95 #endif
96 
97 static int _isa_dma_may_bounce(bus_dma_tag_t, bus_dmamap_t, int, int *);
98 
99 struct x86_bus_dma_tag isa_bus_dma_tag = {
100 	0,				/* _tag_needs_free */
101 	ISA_DMA_BOUNCE_THRESHOLD,	/* _bounce_thresh */
102 	0,				/* _bounce_alloc_lo */
103 	ISA_DMA_BOUNCE_THRESHOLD,	/* _bounce_alloc_hi */
104 	_isa_dma_may_bounce,
105 	_bus_dmamap_create,
106 	_bus_dmamap_destroy,
107 	_bus_dmamap_load,
108 	_bus_dmamap_load_mbuf,
109 	_bus_dmamap_load_uio,
110 	_bus_dmamap_load_raw,
111 	_bus_dmamap_unload,
112 	_bus_dmamap_sync,
113 	_bus_dmamem_alloc,
114 	_bus_dmamem_free,
115 	_bus_dmamem_map,
116 	_bus_dmamem_unmap,
117 	_bus_dmamem_mmap,
118 	_bus_dmatag_subregion,
119 	_bus_dmatag_destroy,
120 };
121 
122 #define	IDTVEC(name)	__CONCAT(X,name)
123 typedef void (vector) __P((void));
124 extern vector *IDTVEC(intr)[];
125 
126 #define	LEGAL_IRQ(x)	((x) >= 0 && (x) < NUM_LEGACY_IRQS && (x) != 2)
127 
128 int
129 isa_intr_alloc(isa_chipset_tag_t ic, int mask, int type, int *irq)
130 {
131 	extern kmutex_t x86_intr_lock;
132 	int i, tmp, bestirq, count;
133 	struct intrhand **p, *q;
134 	struct intrsource *isp;
135 	struct cpu_info *ci;
136 
137 	if (type == IST_NONE)
138 		panic("intr_alloc: bogus type");
139 
140 	ci = &cpu_info_primary;
141 
142 	bestirq = -1;
143 	count = -1;
144 
145 	/* some interrupts should never be dynamically allocated */
146 	mask &= 0xdef8;
147 
148 	/*
149 	 * XXX some interrupts will be used later (6 for fdc, 12 for pms).
150 	 * the right answer is to do "breadth-first" searching of devices.
151 	 */
152 	mask &= 0xefbf;
153 
154 	mutex_enter(&x86_intr_lock);
155 
156 	for (i = 0; i < NUM_LEGACY_IRQS; i++) {
157 		if (LEGAL_IRQ(i) == 0 || (mask & (1<<i)) == 0)
158 			continue;
159 		isp = ci->ci_isources[i];
160 		if (isp == NULL) {
161 			/*
162 			 * if nothing's using the irq, just return it
163 			 */
164 			*irq = i;
165 			mutex_exit(&x86_intr_lock);
166 			return (0);
167 		}
168 
169 		switch(isp->is_type) {
170 		case IST_EDGE:
171 		case IST_LEVEL:
172 			if (type != isp->is_type)
173 				continue;
174 			/*
175 			 * if the irq is shareable, count the number of other
176 			 * handlers, and if it's smaller than the last irq like
177 			 * this, remember it
178 			 *
179 			 * XXX We should probably also consider the
180 			 * interrupt level and stick IPL_TTY with other
181 			 * IPL_TTY, etc.
182 			 */
183 			for (p = &isp->is_handlers, tmp = 0; (q = *p) != NULL;
184 			     p = &q->ih_next, tmp++)
185 				;
186 			if ((bestirq == -1) || (count > tmp)) {
187 				bestirq = i;
188 				count = tmp;
189 			}
190 			break;
191 
192 		case IST_PULSE:
193 			/* this just isn't shareable */
194 			continue;
195 		}
196 	}
197 
198 	mutex_exit(&x86_intr_lock);
199 
200 	if (bestirq == -1)
201 		return (1);
202 
203 	*irq = bestirq;
204 
205 	return (0);
206 }
207 
208 const struct evcnt *
209 isa_intr_evcnt(isa_chipset_tag_t ic, int irq)
210 {
211 
212 	/* XXX for now, no evcnt parent reported */
213 	return NULL;
214 }
215 
216 void *
217 isa_intr_establish(
218     isa_chipset_tag_t ic,
219     int irq,
220     int type,
221     int level,
222     int (*ih_fun)(void *),
223     void *ih_arg
224 )
225 {
226 	struct pic *pic;
227 	int pin;
228 #if NIOAPIC > 0
229 	int mpih;
230 	struct ioapic_softc *ioapic;
231 #endif
232 
233 	pin = irq;
234 	pic = &i8259_pic;
235 
236 #if NIOAPIC > 0
237 	if (mp_busses != NULL) {
238 		if (intr_find_mpmapping(mp_isa_bus, irq, &mpih) == 0 ||
239 		    intr_find_mpmapping(mp_eisa_bus, irq, &mpih) == 0) {
240 			if (!APIC_IRQ_ISLEGACY(mpih)) {
241 				pin = APIC_IRQ_PIN(mpih);
242 				ioapic = ioapic_find(APIC_IRQ_APIC(mpih));
243 				if (ioapic == NULL) {
244 					printf("isa_intr_establish: "
245 					       "unknown apic %d\n",
246 					    APIC_IRQ_APIC(mpih));
247 					return NULL;
248 				}
249 				pic = &ioapic->sc_pic;
250 			}
251 		} else
252 			printf("isa_intr_establish: no MP mapping found\n");
253 	}
254 #endif
255 	return intr_establish(irq, pic, pin, type, level, ih_fun, ih_arg, false);
256 }
257 
258 /*
259  * Deregister an interrupt handler.
260  */
261 void
262 isa_intr_disestablish(isa_chipset_tag_t ic, void *arg)
263 {
264 	struct intrhand *ih = arg;
265 
266 	if (!LEGAL_IRQ(ih->ih_pin))
267 		panic("intr_disestablish: bogus irq");
268 
269 	intr_disestablish(ih);
270 }
271 
272 void
273 isa_attach_hook(device_t parent, device_t self,
274     struct isabus_attach_args *iba)
275 {
276 	extern struct x86_isa_chipset x86_isa_chipset;
277 	extern int isa_has_been_seen;
278 
279 	/*
280 	 * Notify others that might need to know that the ISA bus
281 	 * has now been attached.
282 	 */
283 	if (isa_has_been_seen)
284 		panic("isaattach: ISA bus already seen!");
285 	isa_has_been_seen = 1;
286 
287 	/*
288 	 * Since we can only have one ISA bus, we just use a single
289 	 * statically allocated ISA chipset structure.  Pass it up
290 	 * now.
291 	 */
292 	iba->iba_ic = &x86_isa_chipset;
293 }
294 
295 int
296 isa_mem_alloc(bus_space_tag_t t, bus_size_t size, bus_size_t align,
297 		bus_addr_t boundary, int flags, bus_addr_t *addrp, bus_space_handle_t *bshp)
298 {
299 
300 	/*
301 	 * Allocate physical address space in the ISA hole.
302 	 */
303 	return (bus_space_alloc(t, IOM_BEGIN, IOM_END - 1, size, align,
304 	    boundary, flags, addrp, bshp));
305 }
306 
307 void
308 isa_mem_free(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t size)
309 {
310 
311 	bus_space_free(t, bsh, size);
312 }
313 
314 /*
315  * ISA only has 24-bits of address space.  This means
316  * we can't DMA to pages over 16M.  In order to DMA to
317  * arbitrary buffers, we use "bounce buffers" - pages
318  * in memory below the 16M boundary.  On DMA reads,
319  * DMA happens to the bounce buffers, and is copied into
320  * the caller's buffer.  On writes, data is copied into
321  * but bounce buffer, and the DMA happens from those
322  * pages.  To software using the DMA mapping interface,
323  * this looks simply like a data cache.
324  *
325  * If we have more than 16M of RAM in the system, we may
326  * need bounce buffers.  We check and remember that here.
327  *
328  * There are exceptions, however.  VLB devices can do
329  * 32-bit DMA, and indicate that here.
330  *
331  * ...or, there is an opposite case.  The most segments
332  * a transfer will require is (maxxfer / PAGE_SIZE) + 1.  If
333  * the caller can't handle that many segments (e.g. the
334  * ISA DMA controller), we may have to bounce it as well.
335  */
336 static int
337 _isa_dma_may_bounce(bus_dma_tag_t t, bus_dmamap_t map, int flags,
338     int *cookieflagsp)
339 {
340 	if ((flags & ISABUS_DMA_32BIT) != 0)
341 		map->_dm_bounce_thresh = 0;
342 
343 	if (((map->_dm_size / PAGE_SIZE) + 1) > map->_dm_segcnt)
344 		*cookieflagsp |= X86_DMA_MIGHT_NEED_BOUNCE;
345 	return 0;
346 }
347