xref: /netbsd-src/sys/arch/x86/isa/clock.c (revision 8b0f9554ff8762542c4defc4f70e1eb76fb508fa)
1 /*	$NetBSD: clock.c,v 1.15 2007/12/09 20:27:49 jmcneill Exp $	*/
2 
3 /*-
4  * Copyright (c) 1990 The Regents of the University of California.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to Berkeley by
8  * William Jolitz and Don Ahn.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. Neither the name of the University nor the names of its contributors
19  *    may be used to endorse or promote products derived from this software
20  *    without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32  * SUCH DAMAGE.
33  *
34  *	@(#)clock.c	7.2 (Berkeley) 5/12/91
35  */
36 /*-
37  * Copyright (c) 1993, 1994 Charles M. Hannum.
38  *
39  * This code is derived from software contributed to Berkeley by
40  * William Jolitz and Don Ahn.
41  *
42  * Redistribution and use in source and binary forms, with or without
43  * modification, are permitted provided that the following conditions
44  * are met:
45  * 1. Redistributions of source code must retain the above copyright
46  *    notice, this list of conditions and the following disclaimer.
47  * 2. Redistributions in binary form must reproduce the above copyright
48  *    notice, this list of conditions and the following disclaimer in the
49  *    documentation and/or other materials provided with the distribution.
50  * 3. All advertising materials mentioning features or use of this software
51  *    must display the following acknowledgement:
52  *	This product includes software developed by the University of
53  *	California, Berkeley and its contributors.
54  * 4. Neither the name of the University nor the names of its contributors
55  *    may be used to endorse or promote products derived from this software
56  *    without specific prior written permission.
57  *
58  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
59  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
60  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
61  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
62  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
63  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
64  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
65  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
66  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
67  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
68  * SUCH DAMAGE.
69  *
70  *	@(#)clock.c	7.2 (Berkeley) 5/12/91
71  */
72 /*
73  * Mach Operating System
74  * Copyright (c) 1991,1990,1989 Carnegie Mellon University
75  * All Rights Reserved.
76  *
77  * Permission to use, copy, modify and distribute this software and its
78  * documentation is hereby granted, provided that both the copyright
79  * notice and this permission notice appear in all copies of the
80  * software, derivative works or modified versions, and any portions
81  * thereof, and that both notices appear in supporting documentation.
82  *
83  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
84  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
85  * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
86  *
87  * Carnegie Mellon requests users of this software to return to
88  *
89  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
90  *  School of Computer Science
91  *  Carnegie Mellon University
92  *  Pittsburgh PA 15213-3890
93  *
94  * any improvements or extensions that they make and grant Carnegie Mellon
95  * the rights to redistribute these changes.
96  */
97 /*
98   Copyright 1988, 1989 by Intel Corporation, Santa Clara, California.
99 
100 		All Rights Reserved
101 
102 Permission to use, copy, modify, and distribute this software and
103 its documentation for any purpose and without fee is hereby
104 granted, provided that the above copyright notice appears in all
105 copies and that both the copyright notice and this permission notice
106 appear in supporting documentation, and that the name of Intel
107 not be used in advertising or publicity pertaining to distribution
108 of the software without specific, written prior permission.
109 
110 INTEL DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
111 INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS,
112 IN NO EVENT SHALL INTEL BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
113 CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
114 LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
115 NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
116 WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
117 */
118 
119 /*
120  * Primitive clock interrupt routines.
121  */
122 
123 #include <sys/cdefs.h>
124 __KERNEL_RCSID(0, "$NetBSD: clock.c,v 1.15 2007/12/09 20:27:49 jmcneill Exp $");
125 
126 /* #define CLOCKDEBUG */
127 /* #define CLOCK_PARANOIA */
128 
129 #include "opt_multiprocessor.h"
130 #include "opt_ntp.h"
131 
132 #include <sys/param.h>
133 #include <sys/systm.h>
134 #include <sys/time.h>
135 #include <sys/timetc.h>
136 #include <sys/kernel.h>
137 #include <sys/device.h>
138 #include <sys/mutex.h>
139 
140 #include <machine/cpu.h>
141 #include <machine/intr.h>
142 #include <machine/pio.h>
143 #include <machine/cpufunc.h>
144 
145 #include <dev/isa/isareg.h>
146 #include <dev/isa/isavar.h>
147 #include <dev/ic/mc146818reg.h>
148 #include <dev/ic/i8253reg.h>
149 #include <i386/isa/nvram.h>
150 #include <x86/x86/tsc.h>
151 #include <dev/clock_subr.h>
152 #include <machine/specialreg.h>
153 
154 #include "config_time.h"		/* for CONFIG_TIME */
155 
156 #ifndef __x86_64__
157 #include "mca.h"
158 #endif
159 #if NMCA > 0
160 #include <machine/mca_machdep.h>	/* for MCA_system */
161 #endif
162 
163 #include "pcppi.h"
164 #if (NPCPPI > 0)
165 #include <dev/isa/pcppivar.h>
166 
167 int sysbeepmatch(struct device *, struct cfdata *, void *);
168 void sysbeepattach(struct device *, struct device *, void *);
169 
170 CFATTACH_DECL(sysbeep, sizeof(struct device),
171     sysbeepmatch, sysbeepattach, NULL, NULL);
172 
173 static int ppi_attached;
174 static pcppi_tag_t ppicookie;
175 #endif /* PCPPI */
176 
177 #ifdef CLOCKDEBUG
178 int clock_debug = 0;
179 #define DPRINTF(arg) if (clock_debug) printf arg
180 #else
181 #define DPRINTF(arg)
182 #endif
183 
184 /* Used by lapic.c */
185 unsigned int	gettick(void);
186 void		sysbeep(int, int);
187 static void     tickle_tc(void);
188 
189 static int	clockintr(void *, struct intrframe *);
190 static void	rtcinit(void);
191 static int	rtcget(mc_todregs *);
192 static void	rtcput(mc_todregs *);
193 
194 static int	cmoscheck(void);
195 
196 static int	clock_expandyear(int);
197 
198 static unsigned int	gettick_broken_latch(void);
199 
200 static volatile uint32_t i8254_lastcount;
201 static volatile uint32_t i8254_offset;
202 static volatile int i8254_ticked;
203 
204 /* to protect TC timer variables */
205 static __cpu_simple_lock_t tmr_lock = __SIMPLELOCK_UNLOCKED;
206 
207 inline u_int mc146818_read(void *, u_int);
208 inline void mc146818_write(void *, u_int, u_int);
209 
210 u_int i8254_get_timecount(struct timecounter *);
211 static void rtc_register(void);
212 
213 static struct timecounter i8254_timecounter = {
214 	i8254_get_timecount,	/* get_timecount */
215 	0,			/* no poll_pps */
216 	~0u,			/* counter_mask */
217 	TIMER_FREQ,		/* frequency */
218 	"i8254",		/* name */
219 	100,			/* quality */
220 	NULL,			/* prev */
221 	NULL,			/* next */
222 };
223 
224 /* XXX use sc? */
225 inline u_int
226 mc146818_read(void *sc, u_int reg)
227 {
228 
229 	outb(IO_RTC, reg);
230 	return (inb(IO_RTC+1));
231 }
232 
233 /* XXX use sc? */
234 inline void
235 mc146818_write(void *sc, u_int reg, u_int datum)
236 {
237 
238 	outb(IO_RTC, reg);
239 	outb(IO_RTC+1, datum);
240 }
241 
242 u_long rtclock_tval;		/* i8254 reload value for countdown */
243 int    rtclock_init = 0;
244 
245 int clock_broken_latch = 0;
246 
247 #ifdef CLOCK_PARANOIA
248 static int ticks[6];
249 #endif
250 /*
251  * i8254 latch check routine:
252  *     National Geode (formerly Cyrix MediaGX) has a serious bug in
253  *     its built-in i8254-compatible clock module.
254  *     machdep sets the variable 'clock_broken_latch' to indicate it.
255  */
256 
257 static unsigned int
258 gettick_broken_latch(void)
259 {
260 	int v1, v2, v3;
261 	int w1, w2, w3;
262 	int s;
263 
264 	/* Don't want someone screwing with the counter while we're here. */
265 	s = splhigh();
266 	__cpu_simple_lock(&tmr_lock);
267 	v1 = inb(IO_TIMER1+TIMER_CNTR0);
268 	v1 |= inb(IO_TIMER1+TIMER_CNTR0) << 8;
269 	v2 = inb(IO_TIMER1+TIMER_CNTR0);
270 	v2 |= inb(IO_TIMER1+TIMER_CNTR0) << 8;
271 	v3 = inb(IO_TIMER1+TIMER_CNTR0);
272 	v3 |= inb(IO_TIMER1+TIMER_CNTR0) << 8;
273 	__cpu_simple_unlock(&tmr_lock);
274 	splx(s);
275 
276 #ifdef CLOCK_PARANOIA
277 	if (clock_debug) {
278 		ticks[0] = ticks[3];
279 		ticks[1] = ticks[4];
280 		ticks[2] = ticks[5];
281 		ticks[3] = v1;
282 		ticks[4] = v2;
283 		ticks[5] = v3;
284 	}
285 #endif
286 
287 	if (v1 >= v2 && v2 >= v3 && v1 - v3 < 0x200)
288 		return (v2);
289 
290 #define _swap_val(a, b) do { \
291 	int c = a; \
292 	a = b; \
293 	b = c; \
294 } while (0)
295 
296 	/*
297 	 * sort v1 v2 v3
298 	 */
299 	if (v1 < v2)
300 		_swap_val(v1, v2);
301 	if (v2 < v3)
302 		_swap_val(v2, v3);
303 	if (v1 < v2)
304 		_swap_val(v1, v2);
305 
306 	/*
307 	 * compute the middle value
308 	 */
309 
310 	if (v1 - v3 < 0x200)
311 		return (v2);
312 
313 	w1 = v2 - v3;
314 	w2 = v3 - v1 + rtclock_tval;
315 	w3 = v1 - v2;
316 	if (w1 >= w2) {
317 		if (w1 >= w3)
318 		        return (v1);
319 	} else {
320 		if (w2 >= w3)
321 			return (v2);
322 	}
323 	return (v3);
324 }
325 
326 /* minimal initialization, enough for delay() */
327 void
328 initrtclock(u_long freq)
329 {
330 	u_long tval;
331 
332 	/*
333 	 * Compute timer_count, the count-down count the timer will be
334 	 * set to.  Also, correctly round
335 	 * this by carrying an extra bit through the division.
336 	 */
337 	tval = (freq * 2) / (u_long) hz;
338 	tval = (tval / 2) + (tval & 0x1);
339 
340 	/* initialize 8254 clock */
341 	outb(IO_TIMER1+TIMER_MODE, TIMER_SEL0|TIMER_RATEGEN|TIMER_16BIT);
342 
343 	/* Correct rounding will buy us a better precision in timekeeping */
344 	outb(IO_TIMER1+TIMER_CNTR0, tval % 256);
345 	outb(IO_TIMER1+TIMER_CNTR0, tval / 256);
346 
347 	rtclock_tval = tval ? tval : 0xFFFF;
348 	rtclock_init = 1;
349 }
350 
351 void
352 startrtclock(void)
353 {
354 	int s;
355 
356 	if (!rtclock_init)
357 		initrtclock(TIMER_FREQ);
358 
359 	/* Check diagnostic status */
360 	if ((s = mc146818_read(NULL, NVRAM_DIAG)) != 0) { /* XXX softc */
361 		char bits[128];
362 		printf("RTC BIOS diagnostic error %s\n",
363 		    bitmask_snprintf(s, NVRAM_DIAG_BITS, bits, sizeof(bits)));
364 	}
365 
366 	tc_init(&i8254_timecounter);
367 
368 	init_TSC();
369 	rtc_register();
370 }
371 
372 /*
373  * Must be called at splsched().
374  */
375 static void
376 tickle_tc(void)
377 {
378 #if defined(MULTIPROCESSOR)
379 	struct cpu_info *ci = curcpu();
380 	/*
381 	 * If we are not the primary CPU, we're not allowed to do
382 	 * any more work.
383 	 */
384 	if (CPU_IS_PRIMARY(ci) == 0)
385 		return;
386 #endif
387 	if (rtclock_tval && timecounter->tc_get_timecount == i8254_get_timecount) {
388 		__cpu_simple_lock(&tmr_lock);
389 		if (i8254_ticked)
390 			i8254_ticked    = 0;
391 		else {
392 			i8254_offset   += rtclock_tval;
393 			i8254_lastcount = 0;
394 		}
395 		__cpu_simple_unlock(&tmr_lock);
396 	}
397 
398 }
399 
400 static int
401 clockintr(void *arg, struct intrframe *frame)
402 {
403 	tickle_tc();
404 
405 	hardclock((struct clockframe *)frame);
406 
407 #if NMCA > 0
408 	if (MCA_system) {
409 		/* Reset PS/2 clock interrupt by asserting bit 7 of port 0x61 */
410 		outb(0x61, inb(0x61) | 0x80);
411 	}
412 #endif
413 	return -1;
414 }
415 
416 u_int
417 i8254_get_timecount(struct timecounter *tc)
418 {
419 	u_int count;
420 	uint16_t rdval;
421 	int s;
422 
423 	/* Don't want someone screwing with the counter while we're here. */
424 	s = splhigh();
425 	__cpu_simple_lock(&tmr_lock);
426 	/* Select timer0 and latch counter value. */
427 	outb(IO_TIMER1 + TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
428 	/* insb to make the read atomic */
429 	insb(IO_TIMER1+TIMER_CNTR0, &rdval, 2);
430 	count = rtclock_tval - rdval;
431 	if (rtclock_tval && (count < i8254_lastcount || !i8254_ticked)) {
432 		i8254_ticked = 1;
433 		i8254_offset += rtclock_tval;
434 	}
435 	i8254_lastcount = count;
436 	count += i8254_offset;
437 	__cpu_simple_unlock(&tmr_lock);
438 	splx(s);
439 
440 	return (count);
441 }
442 
443 unsigned int
444 gettick(void)
445 {
446 	uint16_t rdval;
447 	int s;
448 
449 	if (clock_broken_latch)
450 		return (gettick_broken_latch());
451 
452 	/* Don't want someone screwing with the counter while we're here. */
453 	s = splhigh();
454 	__cpu_simple_lock(&tmr_lock);
455 	/* Select counter 0 and latch it. */
456 	outb(IO_TIMER1+TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
457 	/* insb to make the read atomic */
458 	insb(IO_TIMER1+TIMER_CNTR0, &rdval, 2);
459 	__cpu_simple_unlock(&tmr_lock);
460 	splx(s);
461 
462 	return rdval;
463 }
464 
465 /*
466  * Wait approximately `n' microseconds.
467  * Relies on timer 1 counting down from (TIMER_FREQ / hz) at TIMER_FREQ Hz.
468  * Note: timer had better have been programmed before this is first used!
469  * (Note that we use `rate generator' mode, which counts at 1:1; `square
470  * wave' mode counts at 2:1).
471  * Don't rely on this being particularly accurate.
472  */
473 void
474 i8254_delay(unsigned int n)
475 {
476 	unsigned int cur_tick, initial_tick;
477 	int remaining;
478 	static const int delaytab[26] = {
479 		 0,  2,  3,  4,  5,  6,  7,  9, 10, 11,
480 		12, 13, 15, 16, 17, 18, 19, 21, 22, 23,
481 		24, 25, 27, 28, 29, 30,
482 	};
483 
484 	/* allow DELAY() to be used before startrtclock() */
485 	if (!rtclock_init)
486 		initrtclock(TIMER_FREQ);
487 
488 	/*
489 	 * Read the counter first, so that the rest of the setup overhead is
490 	 * counted.
491 	 */
492 	initial_tick = gettick();
493 
494 	if (n <= 25)
495 		remaining = delaytab[n];
496 	else if (n <= UINT_MAX / TIMER_FREQ) {
497 		/*
498 		 * For unsigned arithmetic, division can be replaced with
499 		 * multiplication with the inverse and a shift.
500 		 */
501 		remaining = n * TIMER_FREQ / 1000000;
502 	} else {
503 		/* This is a very long delay.
504 		 * Being slow here doesn't matter.
505 		 */
506 		remaining = (unsigned long long) n * TIMER_FREQ / 1000000;
507 	}
508 
509 	while (remaining > 0) {
510 #ifdef CLOCK_PARANOIA
511 		int delta;
512 		cur_tick = gettick();
513 		if (cur_tick > initial_tick)
514 			delta = rtclock_tval - (cur_tick - initial_tick);
515 		else
516 			delta = initial_tick - cur_tick;
517 		if (delta < 0 || delta >= rtclock_tval / 2) {
518 			DPRINTF(("delay: ignore ticks %.4x-%.4x",
519 				 initial_tick, cur_tick));
520 			if (clock_broken_latch) {
521 				DPRINTF(("  (%.4x %.4x %.4x %.4x %.4x %.4x)\n",
522 				         ticks[0], ticks[1], ticks[2],
523 				         ticks[3], ticks[4], ticks[5]));
524 			} else {
525 				DPRINTF(("\n"));
526 			}
527 		} else
528 			remaining -= delta;
529 #else
530 		cur_tick = gettick();
531 		if (cur_tick > initial_tick)
532 			remaining -= rtclock_tval - (cur_tick - initial_tick);
533 		else
534 			remaining -= initial_tick - cur_tick;
535 #endif
536 		initial_tick = cur_tick;
537 	}
538 }
539 
540 #if (NPCPPI > 0)
541 int
542 sysbeepmatch(struct device *parent, struct cfdata *match,
543     void *aux)
544 {
545 	return (!ppi_attached);
546 }
547 
548 void
549 sysbeepattach(struct device *parent, struct device *self,
550     void *aux)
551 {
552 	aprint_naive("\n");
553 	aprint_normal("\n");
554 
555 	ppicookie = ((struct pcppi_attach_args *)aux)->pa_cookie;
556 	ppi_attached = 1;
557 
558 	if (!pmf_device_register(self, NULL, NULL))
559 		aprint_error_dev(self, "couldn't establish power handler\n");
560 }
561 #endif
562 
563 void
564 sysbeep(int pitch, int period)
565 {
566 #if (NPCPPI > 0)
567 	if (ppi_attached)
568 		pcppi_bell(ppicookie, pitch, period, 0);
569 #endif
570 }
571 
572 void
573 i8254_initclocks(void)
574 {
575 
576 	/*
577 	 * XXX If you're doing strange things with multiple clocks, you might
578 	 * want to keep track of clock handlers.
579 	 */
580 	(void)isa_intr_establish(NULL, 0, IST_PULSE, IPL_CLOCK,
581 	    (int (*)(void *))clockintr, 0);
582 }
583 
584 static void
585 rtcinit(void)
586 {
587 	static int first_rtcopen_ever = 1;
588 
589 	if (!first_rtcopen_ever)
590 		return;
591 	first_rtcopen_ever = 0;
592 
593 	mc146818_write(NULL, MC_REGA,			/* XXX softc */
594 	    MC_BASE_32_KHz | MC_RATE_1024_Hz);
595 	mc146818_write(NULL, MC_REGB, MC_REGB_24HR);	/* XXX softc */
596 }
597 
598 static int
599 rtcget(mc_todregs *regs)
600 {
601 
602 	rtcinit();
603 	if ((mc146818_read(NULL, MC_REGD) & MC_REGD_VRT) == 0) /* XXX softc */
604 		return (-1);
605 	MC146818_GETTOD(NULL, regs);			/* XXX softc */
606 	return (0);
607 }
608 
609 static void
610 rtcput(mc_todregs *regs)
611 {
612 
613 	rtcinit();
614 	MC146818_PUTTOD(NULL, regs);			/* XXX softc */
615 }
616 
617 /*
618  * check whether the CMOS layout is "standard"-like (ie, not PS/2-like),
619  * to be called at splclock()
620  */
621 static int
622 cmoscheck(void)
623 {
624 	int i;
625 	unsigned short cksum = 0;
626 
627 	for (i = 0x10; i <= 0x2d; i++)
628 		cksum += mc146818_read(NULL, i); /* XXX softc */
629 
630 	return (cksum == (mc146818_read(NULL, 0x2e) << 8)
631 			  + mc146818_read(NULL, 0x2f));
632 }
633 
634 #if NMCA > 0
635 /*
636  * Check whether the CMOS layout is PS/2 like, to be called at splclock().
637  */
638 static int cmoscheckps2(void);
639 static int
640 cmoscheckps2(void)
641 {
642 #if 0
643 	/* Disabled until I find out the CRC checksum algorithm IBM uses */
644 	int i;
645 	unsigned short cksum = 0;
646 
647 	for (i = 0x10; i <= 0x31; i++)
648 		cksum += mc146818_read(NULL, i); /* XXX softc */
649 
650 	return (cksum == (mc146818_read(NULL, 0x32) << 8)
651 			  + mc146818_read(NULL, 0x33));
652 #else
653 	/* Check 'incorrect checksum' bit of IBM PS/2 Diagnostic Status Byte */
654 	return ((mc146818_read(NULL, NVRAM_DIAG) & (1<<6)) == 0);
655 #endif
656 }
657 #endif /* NMCA > 0 */
658 
659 /*
660  * patchable to control century byte handling:
661  * 1: always update
662  * -1: never touch
663  * 0: try to figure out itself
664  */
665 int rtc_update_century = 0;
666 
667 /*
668  * Expand a two-digit year as read from the clock chip
669  * into full width.
670  * Being here, deal with the CMOS century byte.
671  */
672 static int centb = NVRAM_CENTURY;
673 static int
674 clock_expandyear(int clockyear)
675 {
676 	int s, clockcentury, cmoscentury;
677 
678 	clockcentury = (clockyear < 70) ? 20 : 19;
679 	clockyear += 100 * clockcentury;
680 
681 	if (rtc_update_century < 0)
682 		return (clockyear);
683 
684 	s = splclock();
685 	if (cmoscheck())
686 		cmoscentury = mc146818_read(NULL, NVRAM_CENTURY);
687 #if NMCA > 0
688 	else if (MCA_system && cmoscheckps2())
689 		cmoscentury = mc146818_read(NULL, (centb = 0x37));
690 #endif
691 	else
692 		cmoscentury = 0;
693 	splx(s);
694 	if (!cmoscentury) {
695 #ifdef DIAGNOSTIC
696 		printf("clock: unknown CMOS layout\n");
697 #endif
698 		return (clockyear);
699 	}
700 	cmoscentury = bcdtobin(cmoscentury);
701 
702 	if (cmoscentury != clockcentury) {
703 		/* XXX note: saying "century is 20" might confuse the naive. */
704 		printf("WARNING: NVRAM century is %d but RTC year is %d\n",
705 		       cmoscentury, clockyear);
706 
707 		/* Kludge to roll over century. */
708 		if ((rtc_update_century > 0) ||
709 		    ((cmoscentury == 19) && (clockcentury == 20) &&
710 		     (clockyear == 2000))) {
711 			printf("WARNING: Setting NVRAM century to %d\n",
712 			       clockcentury);
713 			s = splclock();
714 			mc146818_write(NULL, centb, bintobcd(clockcentury));
715 			splx(s);
716 		}
717 	} else if (cmoscentury == 19 && rtc_update_century == 0)
718 		rtc_update_century = 1; /* will update later in resettodr() */
719 
720 	return (clockyear);
721 }
722 
723 static int
724 rtc_get_ymdhms(todr_chip_handle_t tch, struct clock_ymdhms *dt)
725 {
726 	int s;
727 	mc_todregs rtclk;
728 
729 	s = splclock();
730 	if (rtcget(&rtclk)) {
731 		splx(s);
732 		return -1;
733 	}
734 	splx(s);
735 
736 	dt->dt_sec = bcdtobin(rtclk[MC_SEC]);
737 	dt->dt_min = bcdtobin(rtclk[MC_MIN]);
738 	dt->dt_hour = bcdtobin(rtclk[MC_HOUR]);
739 	dt->dt_day = bcdtobin(rtclk[MC_DOM]);
740 	dt->dt_mon = bcdtobin(rtclk[MC_MONTH]);
741 	dt->dt_year = clock_expandyear(bcdtobin(rtclk[MC_YEAR]));
742 
743 	return 0;
744 }
745 
746 static int
747 rtc_set_ymdhms(todr_chip_handle_t tch, struct clock_ymdhms *dt)
748 {
749 	mc_todregs rtclk;
750 	int century;
751 	int s;
752 
753 	s = splclock();
754 	if (rtcget(&rtclk))
755 		memset(&rtclk, 0, sizeof(rtclk));
756 	splx(s);
757 
758 	rtclk[MC_SEC] = bintobcd(dt->dt_sec);
759 	rtclk[MC_MIN] = bintobcd(dt->dt_min);
760 	rtclk[MC_HOUR] = bintobcd(dt->dt_hour);
761 	rtclk[MC_DOW] = dt->dt_wday + 1;
762 	rtclk[MC_YEAR] = bintobcd(dt->dt_year % 100);
763 	rtclk[MC_MONTH] = bintobcd(dt->dt_mon);
764 	rtclk[MC_DOM] = bintobcd(dt->dt_day);
765 
766 #ifdef DEBUG_CLOCK
767 	printf("setclock: %x/%x/%x %x:%x:%x\n", rtclk[MC_YEAR], rtclk[MC_MONTH],
768 	   rtclk[MC_DOM], rtclk[MC_HOUR], rtclk[MC_MIN], rtclk[MC_SEC]);
769 #endif
770 	s = splclock();
771 	rtcput(&rtclk);
772 	if (rtc_update_century > 0) {
773 		century = bintobcd(dt->dt_year / 100);
774 		mc146818_write(NULL, centb, century); /* XXX softc */
775 	}
776 	splx(s);
777 	return 0;
778 
779 }
780 
781 static void
782 rtc_register(void)
783 {
784 	static struct todr_chip_handle	tch;
785 	tch.todr_gettime_ymdhms = rtc_get_ymdhms;
786 	tch.todr_settime_ymdhms = rtc_set_ymdhms;
787 	tch.todr_setwen = NULL;
788 
789 	todr_attach(&tch);
790 }
791 
792 void
793 setstatclockrate(int arg)
794 {
795 }
796