xref: /netbsd-src/sys/arch/x86/isa/clock.c (revision 8ac07aec990b9d2e483062509d0a9fa5b4f57cf2)
1 /*	$NetBSD: clock.c,v 1.28 2008/04/06 12:19:36 cherry Exp $	*/
2 
3 /*-
4  * Copyright (c) 1990 The Regents of the University of California.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to Berkeley by
8  * William Jolitz and Don Ahn.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. Neither the name of the University nor the names of its contributors
19  *    may be used to endorse or promote products derived from this software
20  *    without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32  * SUCH DAMAGE.
33  *
34  *	@(#)clock.c	7.2 (Berkeley) 5/12/91
35  */
36 /*-
37  * Copyright (c) 1993, 1994 Charles M. Hannum.
38  *
39  * This code is derived from software contributed to Berkeley by
40  * William Jolitz and Don Ahn.
41  *
42  * Redistribution and use in source and binary forms, with or without
43  * modification, are permitted provided that the following conditions
44  * are met:
45  * 1. Redistributions of source code must retain the above copyright
46  *    notice, this list of conditions and the following disclaimer.
47  * 2. Redistributions in binary form must reproduce the above copyright
48  *    notice, this list of conditions and the following disclaimer in the
49  *    documentation and/or other materials provided with the distribution.
50  * 3. All advertising materials mentioning features or use of this software
51  *    must display the following acknowledgement:
52  *	This product includes software developed by the University of
53  *	California, Berkeley and its contributors.
54  * 4. Neither the name of the University nor the names of its contributors
55  *    may be used to endorse or promote products derived from this software
56  *    without specific prior written permission.
57  *
58  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
59  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
60  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
61  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
62  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
63  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
64  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
65  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
66  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
67  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
68  * SUCH DAMAGE.
69  *
70  *	@(#)clock.c	7.2 (Berkeley) 5/12/91
71  */
72 /*
73  * Mach Operating System
74  * Copyright (c) 1991,1990,1989 Carnegie Mellon University
75  * All Rights Reserved.
76  *
77  * Permission to use, copy, modify and distribute this software and its
78  * documentation is hereby granted, provided that both the copyright
79  * notice and this permission notice appear in all copies of the
80  * software, derivative works or modified versions, and any portions
81  * thereof, and that both notices appear in supporting documentation.
82  *
83  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
84  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
85  * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
86  *
87  * Carnegie Mellon requests users of this software to return to
88  *
89  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
90  *  School of Computer Science
91  *  Carnegie Mellon University
92  *  Pittsburgh PA 15213-3890
93  *
94  * any improvements or extensions that they make and grant Carnegie Mellon
95  * the rights to redistribute these changes.
96  */
97 /*
98   Copyright 1988, 1989 by Intel Corporation, Santa Clara, California.
99 
100 		All Rights Reserved
101 
102 Permission to use, copy, modify, and distribute this software and
103 its documentation for any purpose and without fee is hereby
104 granted, provided that the above copyright notice appears in all
105 copies and that both the copyright notice and this permission notice
106 appear in supporting documentation, and that the name of Intel
107 not be used in advertising or publicity pertaining to distribution
108 of the software without specific, written prior permission.
109 
110 INTEL DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
111 INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS,
112 IN NO EVENT SHALL INTEL BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
113 CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
114 LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
115 NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
116 WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
117 */
118 
119 /*
120  * Primitive clock interrupt routines.
121  */
122 
123 #include <sys/cdefs.h>
124 __KERNEL_RCSID(0, "$NetBSD: clock.c,v 1.28 2008/04/06 12:19:36 cherry Exp $");
125 
126 /* #define CLOCKDEBUG */
127 /* #define CLOCK_PARANOIA */
128 
129 #include "opt_multiprocessor.h"
130 #include "opt_ntp.h"
131 
132 #include <sys/param.h>
133 #include <sys/systm.h>
134 #include <sys/time.h>
135 #include <sys/timetc.h>
136 #include <sys/kernel.h>
137 #include <sys/device.h>
138 #include <sys/mutex.h>
139 #include <sys/cpu.h>
140 #include <sys/intr.h>
141 
142 #include <machine/pio.h>
143 #include <machine/cpufunc.h>
144 #include <machine/lock.h>
145 
146 #include <dev/isa/isareg.h>
147 #include <dev/isa/isavar.h>
148 #include <dev/ic/mc146818reg.h>
149 #include <dev/ic/i8253reg.h>
150 #include <i386/isa/nvram.h>
151 #include <x86/x86/tsc.h>
152 #include <x86/lock.h>
153 #include <dev/clock_subr.h>
154 #include <machine/specialreg.h>
155 
156 #ifndef __x86_64__
157 #include "mca.h"
158 #endif
159 #if NMCA > 0
160 #include <machine/mca_machdep.h>	/* for MCA_system */
161 #endif
162 
163 #include "pcppi.h"
164 #if (NPCPPI > 0)
165 #include <dev/isa/pcppivar.h>
166 
167 int sysbeepmatch(device_t, cfdata_t, void *);
168 void sysbeepattach(device_t, device_t, void *);
169 int sysbeepdetach(device_t, int);
170 
171 CFATTACH_DECL_NEW(sysbeep, 0,
172     sysbeepmatch, sysbeepattach, sysbeepdetach, NULL);
173 
174 static int ppi_attached;
175 static pcppi_tag_t ppicookie;
176 #endif /* PCPPI */
177 
178 #ifdef CLOCKDEBUG
179 int clock_debug = 0;
180 #define DPRINTF(arg) if (clock_debug) printf arg
181 #else
182 #define DPRINTF(arg)
183 #endif
184 
185 /* Used by lapic.c */
186 unsigned int	gettick(void);
187 void		sysbeep(int, int);
188 static void     tickle_tc(void);
189 
190 static int	clockintr(void *, struct intrframe *);
191 static void	rtcinit(void);
192 static int	rtcget(mc_todregs *);
193 static void	rtcput(mc_todregs *);
194 
195 static int	cmoscheck(void);
196 
197 static int	clock_expandyear(int);
198 int 		sysbeepdetach(device_t, int);
199 
200 static unsigned int	gettick_broken_latch(void);
201 
202 static volatile uint32_t i8254_lastcount;
203 static volatile uint32_t i8254_offset;
204 static volatile int i8254_ticked;
205 
206 /* to protect TC timer variables */
207 static __cpu_simple_lock_t tmr_lock = __SIMPLELOCK_UNLOCKED;
208 
209 inline u_int mc146818_read(void *, u_int);
210 inline void mc146818_write(void *, u_int, u_int);
211 
212 u_int i8254_get_timecount(struct timecounter *);
213 static void rtc_register(void);
214 
215 static struct timecounter i8254_timecounter = {
216 	i8254_get_timecount,	/* get_timecount */
217 	0,			/* no poll_pps */
218 	~0u,			/* counter_mask */
219 	TIMER_FREQ,		/* frequency */
220 	"i8254",		/* name */
221 	100,			/* quality */
222 	NULL,			/* private data */
223 	NULL,			/* next */
224 };
225 
226 /* XXX use sc? */
227 inline u_int
228 mc146818_read(void *sc, u_int reg)
229 {
230 
231 	outb(IO_RTC, reg);
232 	return (inb(IO_RTC+1));
233 }
234 
235 /* XXX use sc? */
236 inline void
237 mc146818_write(void *sc, u_int reg, u_int datum)
238 {
239 
240 	outb(IO_RTC, reg);
241 	outb(IO_RTC+1, datum);
242 }
243 
244 u_long rtclock_tval;		/* i8254 reload value for countdown */
245 int    rtclock_init = 0;
246 
247 int clock_broken_latch = 0;
248 
249 #ifdef CLOCK_PARANOIA
250 static int ticks[6];
251 #endif
252 /*
253  * i8254 latch check routine:
254  *     National Geode (formerly Cyrix MediaGX) has a serious bug in
255  *     its built-in i8254-compatible clock module.
256  *     machdep sets the variable 'clock_broken_latch' to indicate it.
257  */
258 
259 static unsigned int
260 gettick_broken_latch(void)
261 {
262 	int v1, v2, v3;
263 	int w1, w2, w3;
264 	int s;
265 
266 	/* Don't want someone screwing with the counter while we're here. */
267 	s = splhigh();
268 	__cpu_simple_lock(&tmr_lock);
269 	v1 = inb(IO_TIMER1+TIMER_CNTR0);
270 	v1 |= inb(IO_TIMER1+TIMER_CNTR0) << 8;
271 	v2 = inb(IO_TIMER1+TIMER_CNTR0);
272 	v2 |= inb(IO_TIMER1+TIMER_CNTR0) << 8;
273 	v3 = inb(IO_TIMER1+TIMER_CNTR0);
274 	v3 |= inb(IO_TIMER1+TIMER_CNTR0) << 8;
275 	__cpu_simple_unlock(&tmr_lock);
276 	splx(s);
277 
278 #ifdef CLOCK_PARANOIA
279 	if (clock_debug) {
280 		ticks[0] = ticks[3];
281 		ticks[1] = ticks[4];
282 		ticks[2] = ticks[5];
283 		ticks[3] = v1;
284 		ticks[4] = v2;
285 		ticks[5] = v3;
286 	}
287 #endif
288 
289 	if (v1 >= v2 && v2 >= v3 && v1 - v3 < 0x200)
290 		return (v2);
291 
292 #define _swap_val(a, b) do { \
293 	int c = a; \
294 	a = b; \
295 	b = c; \
296 } while (0)
297 
298 	/*
299 	 * sort v1 v2 v3
300 	 */
301 	if (v1 < v2)
302 		_swap_val(v1, v2);
303 	if (v2 < v3)
304 		_swap_val(v2, v3);
305 	if (v1 < v2)
306 		_swap_val(v1, v2);
307 
308 	/*
309 	 * compute the middle value
310 	 */
311 
312 	if (v1 - v3 < 0x200)
313 		return (v2);
314 
315 	w1 = v2 - v3;
316 	w2 = v3 - v1 + rtclock_tval;
317 	w3 = v1 - v2;
318 	if (w1 >= w2) {
319 		if (w1 >= w3)
320 		        return (v1);
321 	} else {
322 		if (w2 >= w3)
323 			return (v2);
324 	}
325 	return (v3);
326 }
327 
328 /* minimal initialization, enough for delay() */
329 void
330 initrtclock(u_long freq)
331 {
332 	u_long tval;
333 
334 	/*
335 	 * Compute timer_count, the count-down count the timer will be
336 	 * set to.  Also, correctly round
337 	 * this by carrying an extra bit through the division.
338 	 */
339 	tval = (freq * 2) / (u_long) hz;
340 	tval = (tval / 2) + (tval & 0x1);
341 
342 	/* initialize 8254 clock */
343 	outb(IO_TIMER1+TIMER_MODE, TIMER_SEL0|TIMER_RATEGEN|TIMER_16BIT);
344 
345 	/* Correct rounding will buy us a better precision in timekeeping */
346 	outb(IO_TIMER1+TIMER_CNTR0, tval % 256);
347 	outb(IO_TIMER1+TIMER_CNTR0, tval / 256);
348 
349 	rtclock_tval = tval ? tval : 0xFFFF;
350 	rtclock_init = 1;
351 }
352 
353 void
354 startrtclock(void)
355 {
356 	int s;
357 
358 	if (!rtclock_init)
359 		initrtclock(TIMER_FREQ);
360 
361 	/* Check diagnostic status */
362 	if ((s = mc146818_read(NULL, NVRAM_DIAG)) != 0) { /* XXX softc */
363 		char bits[128];
364 		printf("RTC BIOS diagnostic error %s\n",
365 		    bitmask_snprintf(s, NVRAM_DIAG_BITS, bits, sizeof(bits)));
366 	}
367 
368 	tc_init(&i8254_timecounter);
369 
370 	init_TSC();
371 	rtc_register();
372 }
373 
374 /*
375  * Must be called at splsched().
376  */
377 static void
378 tickle_tc(void)
379 {
380 #if defined(MULTIPROCESSOR)
381 	struct cpu_info *ci = curcpu();
382 	/*
383 	 * If we are not the primary CPU, we're not allowed to do
384 	 * any more work.
385 	 */
386 	if (CPU_IS_PRIMARY(ci) == 0)
387 		return;
388 #endif
389 	if (rtclock_tval && timecounter->tc_get_timecount == i8254_get_timecount) {
390 		__cpu_simple_lock(&tmr_lock);
391 		if (i8254_ticked)
392 			i8254_ticked    = 0;
393 		else {
394 			i8254_offset   += rtclock_tval;
395 			i8254_lastcount = 0;
396 		}
397 		__cpu_simple_unlock(&tmr_lock);
398 	}
399 
400 }
401 
402 static int
403 clockintr(void *arg, struct intrframe *frame)
404 {
405 	tickle_tc();
406 
407 	hardclock((struct clockframe *)frame);
408 
409 #if NMCA > 0
410 	if (MCA_system) {
411 		/* Reset PS/2 clock interrupt by asserting bit 7 of port 0x61 */
412 		outb(0x61, inb(0x61) | 0x80);
413 	}
414 #endif
415 	return -1;
416 }
417 
418 u_int
419 i8254_get_timecount(struct timecounter *tc)
420 {
421 	u_int count;
422 	uint16_t rdval;
423 	int s;
424 
425 	/* Don't want someone screwing with the counter while we're here. */
426 	s = splhigh();
427 	__cpu_simple_lock(&tmr_lock);
428 	/* Select timer0 and latch counter value. */
429 	outb(IO_TIMER1 + TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
430 	/* insb to make the read atomic */
431 	insb(IO_TIMER1+TIMER_CNTR0, &rdval, 2);
432 	count = rtclock_tval - rdval;
433 	if (rtclock_tval && (count < i8254_lastcount &&
434 			     (!i8254_ticked || rtclock_tval == 0xFFFF))) {
435 		i8254_ticked = 1;
436 		i8254_offset += rtclock_tval;
437 	}
438 	i8254_lastcount = count;
439 	count += i8254_offset;
440 	__cpu_simple_unlock(&tmr_lock);
441 	splx(s);
442 
443 	return (count);
444 }
445 
446 unsigned int
447 gettick(void)
448 {
449 	uint16_t rdval;
450 	int s;
451 
452 	if (clock_broken_latch)
453 		return (gettick_broken_latch());
454 
455 	/* Don't want someone screwing with the counter while we're here. */
456 	s = splhigh();
457 	__cpu_simple_lock(&tmr_lock);
458 	/* Select counter 0 and latch it. */
459 	outb(IO_TIMER1+TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
460 	/* insb to make the read atomic */
461 	insb(IO_TIMER1+TIMER_CNTR0, &rdval, 2);
462 	__cpu_simple_unlock(&tmr_lock);
463 	splx(s);
464 
465 	return rdval;
466 }
467 
468 /*
469  * Wait approximately `n' microseconds.
470  * Relies on timer 1 counting down from (TIMER_FREQ / hz) at TIMER_FREQ Hz.
471  * Note: timer had better have been programmed before this is first used!
472  * (Note that we use `rate generator' mode, which counts at 1:1; `square
473  * wave' mode counts at 2:1).
474  * Don't rely on this being particularly accurate.
475  */
476 void
477 i8254_delay(unsigned int n)
478 {
479 	unsigned int cur_tick, initial_tick;
480 	int remaining;
481 
482 	/* allow DELAY() to be used before startrtclock() */
483 	if (!rtclock_init)
484 		initrtclock(TIMER_FREQ);
485 
486 	/*
487 	 * Read the counter first, so that the rest of the setup overhead is
488 	 * counted.
489 	 */
490 	initial_tick = gettick();
491 
492 	if (n <= UINT_MAX / TIMER_FREQ) {
493 		/*
494 		 * For unsigned arithmetic, division can be replaced with
495 		 * multiplication with the inverse and a shift.
496 		 */
497 		remaining = n * TIMER_FREQ / 1000000;
498 	} else {
499 		/* This is a very long delay.
500 		 * Being slow here doesn't matter.
501 		 */
502 		remaining = (unsigned long long) n * TIMER_FREQ / 1000000;
503 	}
504 
505 	while (remaining > 0) {
506 #ifdef CLOCK_PARANOIA
507 		int delta;
508 		cur_tick = gettick();
509 		if (cur_tick > initial_tick)
510 			delta = rtclock_tval - (cur_tick - initial_tick);
511 		else
512 			delta = initial_tick - cur_tick;
513 		if (delta < 0 || delta >= rtclock_tval / 2) {
514 			DPRINTF(("delay: ignore ticks %.4x-%.4x",
515 				 initial_tick, cur_tick));
516 			if (clock_broken_latch) {
517 				DPRINTF(("  (%.4x %.4x %.4x %.4x %.4x %.4x)\n",
518 				         ticks[0], ticks[1], ticks[2],
519 				         ticks[3], ticks[4], ticks[5]));
520 			} else {
521 				DPRINTF(("\n"));
522 			}
523 		} else
524 			remaining -= delta;
525 #else
526 		cur_tick = gettick();
527 		if (cur_tick > initial_tick)
528 			remaining -= rtclock_tval - (cur_tick - initial_tick);
529 		else
530 			remaining -= initial_tick - cur_tick;
531 #endif
532 		initial_tick = cur_tick;
533 	}
534 }
535 
536 #if (NPCPPI > 0)
537 int
538 sysbeepmatch(device_t parent, cfdata_t match, void *aux)
539 {
540 	return (!ppi_attached);
541 }
542 
543 void
544 sysbeepattach(device_t parent, device_t self, void *aux)
545 {
546 	aprint_naive("\n");
547 	aprint_normal("\n");
548 
549 	ppicookie = ((struct pcppi_attach_args *)aux)->pa_cookie;
550 	ppi_attached = 1;
551 
552 	if (!pmf_device_register(self, NULL, NULL))
553 		aprint_error_dev(self, "couldn't establish power handler\n");
554 }
555 
556 int
557 sysbeepdetach(device_t self, int flags)
558 {
559 	pmf_device_deregister(self);
560 	ppi_attached = 0;
561 	return 0;
562 }
563 #endif
564 
565 void
566 sysbeep(int pitch, int period)
567 {
568 #if (NPCPPI > 0)
569 	if (ppi_attached)
570 		pcppi_bell(ppicookie, pitch, period, 0);
571 #endif
572 }
573 
574 void
575 i8254_initclocks(void)
576 {
577 
578 	/*
579 	 * XXX If you're doing strange things with multiple clocks, you might
580 	 * want to keep track of clock handlers.
581 	 */
582 	(void)isa_intr_establish(NULL, 0, IST_PULSE, IPL_CLOCK,
583 	    (int (*)(void *))clockintr, 0);
584 }
585 
586 static void
587 rtcinit(void)
588 {
589 	static int first_rtcopen_ever = 1;
590 
591 	if (!first_rtcopen_ever)
592 		return;
593 	first_rtcopen_ever = 0;
594 
595 	mc146818_write(NULL, MC_REGA,			/* XXX softc */
596 	    MC_BASE_32_KHz | MC_RATE_1024_Hz);
597 	mc146818_write(NULL, MC_REGB, MC_REGB_24HR);	/* XXX softc */
598 }
599 
600 static int
601 rtcget(mc_todregs *regs)
602 {
603 
604 	rtcinit();
605 	if ((mc146818_read(NULL, MC_REGD) & MC_REGD_VRT) == 0) /* XXX softc */
606 		return (-1);
607 	MC146818_GETTOD(NULL, regs);			/* XXX softc */
608 	return (0);
609 }
610 
611 static void
612 rtcput(mc_todregs *regs)
613 {
614 
615 	rtcinit();
616 	MC146818_PUTTOD(NULL, regs);			/* XXX softc */
617 }
618 
619 /*
620  * check whether the CMOS layout is "standard"-like (ie, not PS/2-like),
621  * to be called at splclock()
622  */
623 static int
624 cmoscheck(void)
625 {
626 	int i;
627 	unsigned short cksum = 0;
628 
629 	for (i = 0x10; i <= 0x2d; i++)
630 		cksum += mc146818_read(NULL, i); /* XXX softc */
631 
632 	return (cksum == (mc146818_read(NULL, 0x2e) << 8)
633 			  + mc146818_read(NULL, 0x2f));
634 }
635 
636 #if NMCA > 0
637 /*
638  * Check whether the CMOS layout is PS/2 like, to be called at splclock().
639  */
640 static int cmoscheckps2(void);
641 static int
642 cmoscheckps2(void)
643 {
644 #if 0
645 	/* Disabled until I find out the CRC checksum algorithm IBM uses */
646 	int i;
647 	unsigned short cksum = 0;
648 
649 	for (i = 0x10; i <= 0x31; i++)
650 		cksum += mc146818_read(NULL, i); /* XXX softc */
651 
652 	return (cksum == (mc146818_read(NULL, 0x32) << 8)
653 			  + mc146818_read(NULL, 0x33));
654 #else
655 	/* Check 'incorrect checksum' bit of IBM PS/2 Diagnostic Status Byte */
656 	return ((mc146818_read(NULL, NVRAM_DIAG) & (1<<6)) == 0);
657 #endif
658 }
659 #endif /* NMCA > 0 */
660 
661 /*
662  * patchable to control century byte handling:
663  * 1: always update
664  * -1: never touch
665  * 0: try to figure out itself
666  */
667 int rtc_update_century = 0;
668 
669 /*
670  * Expand a two-digit year as read from the clock chip
671  * into full width.
672  * Being here, deal with the CMOS century byte.
673  */
674 static int centb = NVRAM_CENTURY;
675 static int
676 clock_expandyear(int clockyear)
677 {
678 	int s, clockcentury, cmoscentury;
679 
680 	clockcentury = (clockyear < 70) ? 20 : 19;
681 	clockyear += 100 * clockcentury;
682 
683 	if (rtc_update_century < 0)
684 		return (clockyear);
685 
686 	s = splclock();
687 	if (cmoscheck())
688 		cmoscentury = mc146818_read(NULL, NVRAM_CENTURY);
689 #if NMCA > 0
690 	else if (MCA_system && cmoscheckps2())
691 		cmoscentury = mc146818_read(NULL, (centb = 0x37));
692 #endif
693 	else
694 		cmoscentury = 0;
695 	splx(s);
696 	if (!cmoscentury) {
697 #ifdef DIAGNOSTIC
698 		printf("clock: unknown CMOS layout\n");
699 #endif
700 		return (clockyear);
701 	}
702 	cmoscentury = bcdtobin(cmoscentury);
703 
704 	if (cmoscentury != clockcentury) {
705 		/* XXX note: saying "century is 20" might confuse the naive. */
706 		printf("WARNING: NVRAM century is %d but RTC year is %d\n",
707 		       cmoscentury, clockyear);
708 
709 		/* Kludge to roll over century. */
710 		if ((rtc_update_century > 0) ||
711 		    ((cmoscentury == 19) && (clockcentury == 20) &&
712 		     (clockyear == 2000))) {
713 			printf("WARNING: Setting NVRAM century to %d\n",
714 			       clockcentury);
715 			s = splclock();
716 			mc146818_write(NULL, centb, bintobcd(clockcentury));
717 			splx(s);
718 		}
719 	} else if (cmoscentury == 19 && rtc_update_century == 0)
720 		rtc_update_century = 1; /* will update later in resettodr() */
721 
722 	return (clockyear);
723 }
724 
725 static int
726 rtc_get_ymdhms(todr_chip_handle_t tch, struct clock_ymdhms *dt)
727 {
728 	int s;
729 	mc_todregs rtclk;
730 
731 	s = splclock();
732 	if (rtcget(&rtclk)) {
733 		splx(s);
734 		return -1;
735 	}
736 	splx(s);
737 
738 	dt->dt_sec = bcdtobin(rtclk[MC_SEC]);
739 	dt->dt_min = bcdtobin(rtclk[MC_MIN]);
740 	dt->dt_hour = bcdtobin(rtclk[MC_HOUR]);
741 	dt->dt_day = bcdtobin(rtclk[MC_DOM]);
742 	dt->dt_mon = bcdtobin(rtclk[MC_MONTH]);
743 	dt->dt_year = clock_expandyear(bcdtobin(rtclk[MC_YEAR]));
744 
745 	return 0;
746 }
747 
748 static int
749 rtc_set_ymdhms(todr_chip_handle_t tch, struct clock_ymdhms *dt)
750 {
751 	mc_todregs rtclk;
752 	int century;
753 	int s;
754 
755 	s = splclock();
756 	if (rtcget(&rtclk))
757 		memset(&rtclk, 0, sizeof(rtclk));
758 	splx(s);
759 
760 	rtclk[MC_SEC] = bintobcd(dt->dt_sec);
761 	rtclk[MC_MIN] = bintobcd(dt->dt_min);
762 	rtclk[MC_HOUR] = bintobcd(dt->dt_hour);
763 	rtclk[MC_DOW] = dt->dt_wday + 1;
764 	rtclk[MC_YEAR] = bintobcd(dt->dt_year % 100);
765 	rtclk[MC_MONTH] = bintobcd(dt->dt_mon);
766 	rtclk[MC_DOM] = bintobcd(dt->dt_day);
767 
768 #ifdef DEBUG_CLOCK
769 	printf("setclock: %x/%x/%x %x:%x:%x\n", rtclk[MC_YEAR], rtclk[MC_MONTH],
770 	   rtclk[MC_DOM], rtclk[MC_HOUR], rtclk[MC_MIN], rtclk[MC_SEC]);
771 #endif
772 	s = splclock();
773 	rtcput(&rtclk);
774 	if (rtc_update_century > 0) {
775 		century = bintobcd(dt->dt_year / 100);
776 		mc146818_write(NULL, centb, century); /* XXX softc */
777 	}
778 	splx(s);
779 	return 0;
780 
781 }
782 
783 static void
784 rtc_register(void)
785 {
786 	static struct todr_chip_handle	tch;
787 	tch.todr_gettime_ymdhms = rtc_get_ymdhms;
788 	tch.todr_settime_ymdhms = rtc_set_ymdhms;
789 	tch.todr_setwen = NULL;
790 
791 	todr_attach(&tch);
792 }
793 
794 void
795 setstatclockrate(int arg)
796 {
797 }
798