xref: /netbsd-src/sys/arch/x86/isa/clock.c (revision 404fbe5fb94ca1e054339640cabb2801ce52dd30)
1 /*	$NetBSD: clock.c,v 1.31 2008/12/16 22:35:28 christos Exp $	*/
2 
3 /*-
4  * Copyright (c) 1990 The Regents of the University of California.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to Berkeley by
8  * William Jolitz and Don Ahn.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. Neither the name of the University nor the names of its contributors
19  *    may be used to endorse or promote products derived from this software
20  *    without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32  * SUCH DAMAGE.
33  *
34  *	@(#)clock.c	7.2 (Berkeley) 5/12/91
35  */
36 /*-
37  * Copyright (c) 1993, 1994 Charles M. Hannum.
38  *
39  * This code is derived from software contributed to Berkeley by
40  * William Jolitz and Don Ahn.
41  *
42  * Redistribution and use in source and binary forms, with or without
43  * modification, are permitted provided that the following conditions
44  * are met:
45  * 1. Redistributions of source code must retain the above copyright
46  *    notice, this list of conditions and the following disclaimer.
47  * 2. Redistributions in binary form must reproduce the above copyright
48  *    notice, this list of conditions and the following disclaimer in the
49  *    documentation and/or other materials provided with the distribution.
50  * 3. All advertising materials mentioning features or use of this software
51  *    must display the following acknowledgement:
52  *	This product includes software developed by the University of
53  *	California, Berkeley and its contributors.
54  * 4. Neither the name of the University nor the names of its contributors
55  *    may be used to endorse or promote products derived from this software
56  *    without specific prior written permission.
57  *
58  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
59  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
60  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
61  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
62  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
63  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
64  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
65  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
66  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
67  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
68  * SUCH DAMAGE.
69  *
70  *	@(#)clock.c	7.2 (Berkeley) 5/12/91
71  */
72 /*
73  * Mach Operating System
74  * Copyright (c) 1991,1990,1989 Carnegie Mellon University
75  * All Rights Reserved.
76  *
77  * Permission to use, copy, modify and distribute this software and its
78  * documentation is hereby granted, provided that both the copyright
79  * notice and this permission notice appear in all copies of the
80  * software, derivative works or modified versions, and any portions
81  * thereof, and that both notices appear in supporting documentation.
82  *
83  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
84  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
85  * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
86  *
87  * Carnegie Mellon requests users of this software to return to
88  *
89  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
90  *  School of Computer Science
91  *  Carnegie Mellon University
92  *  Pittsburgh PA 15213-3890
93  *
94  * any improvements or extensions that they make and grant Carnegie Mellon
95  * the rights to redistribute these changes.
96  */
97 /*
98   Copyright 1988, 1989 by Intel Corporation, Santa Clara, California.
99 
100 		All Rights Reserved
101 
102 Permission to use, copy, modify, and distribute this software and
103 its documentation for any purpose and without fee is hereby
104 granted, provided that the above copyright notice appears in all
105 copies and that both the copyright notice and this permission notice
106 appear in supporting documentation, and that the name of Intel
107 not be used in advertising or publicity pertaining to distribution
108 of the software without specific, written prior permission.
109 
110 INTEL DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
111 INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS,
112 IN NO EVENT SHALL INTEL BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
113 CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
114 LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
115 NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
116 WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
117 */
118 
119 /*
120  * Primitive clock interrupt routines.
121  */
122 
123 #include <sys/cdefs.h>
124 __KERNEL_RCSID(0, "$NetBSD: clock.c,v 1.31 2008/12/16 22:35:28 christos Exp $");
125 
126 /* #define CLOCKDEBUG */
127 /* #define CLOCK_PARANOIA */
128 
129 #include "opt_multiprocessor.h"
130 #include "opt_ntp.h"
131 
132 #include <sys/param.h>
133 #include <sys/systm.h>
134 #include <sys/time.h>
135 #include <sys/timetc.h>
136 #include <sys/kernel.h>
137 #include <sys/device.h>
138 #include <sys/mutex.h>
139 #include <sys/cpu.h>
140 #include <sys/intr.h>
141 
142 #include <machine/pio.h>
143 #include <machine/cpufunc.h>
144 #include <machine/lock.h>
145 
146 #include <dev/isa/isareg.h>
147 #include <dev/isa/isavar.h>
148 #include <dev/ic/mc146818reg.h>
149 #include <dev/ic/i8253reg.h>
150 #include <i386/isa/nvram.h>
151 #include <x86/x86/tsc.h>
152 #include <x86/lock.h>
153 #include <dev/clock_subr.h>
154 #include <machine/specialreg.h>
155 
156 #ifndef __x86_64__
157 #include "mca.h"
158 #endif
159 #if NMCA > 0
160 #include <machine/mca_machdep.h>	/* for MCA_system */
161 #endif
162 
163 #include "pcppi.h"
164 #if (NPCPPI > 0)
165 #include <dev/isa/pcppivar.h>
166 
167 int sysbeepmatch(device_t, cfdata_t, void *);
168 void sysbeepattach(device_t, device_t, void *);
169 int sysbeepdetach(device_t, int);
170 
171 CFATTACH_DECL_NEW(sysbeep, 0,
172     sysbeepmatch, sysbeepattach, sysbeepdetach, NULL);
173 
174 static int ppi_attached;
175 static pcppi_tag_t ppicookie;
176 #endif /* PCPPI */
177 
178 #ifdef CLOCKDEBUG
179 int clock_debug = 0;
180 #define DPRINTF(arg) if (clock_debug) printf arg
181 #else
182 #define DPRINTF(arg)
183 #endif
184 
185 /* Used by lapic.c */
186 unsigned int	gettick(void);
187 void		sysbeep(int, int);
188 static void     tickle_tc(void);
189 
190 static int	clockintr(void *, struct intrframe *);
191 static void	rtcinit(void);
192 static int	rtcget(mc_todregs *);
193 static void	rtcput(mc_todregs *);
194 
195 static int	cmoscheck(void);
196 
197 static int	clock_expandyear(int);
198 int 		sysbeepdetach(device_t, int);
199 
200 static unsigned int	gettick_broken_latch(void);
201 
202 static volatile uint32_t i8254_lastcount;
203 static volatile uint32_t i8254_offset;
204 static volatile int i8254_ticked;
205 
206 /* to protect TC timer variables */
207 static __cpu_simple_lock_t tmr_lock = __SIMPLELOCK_UNLOCKED;
208 
209 inline u_int mc146818_read(void *, u_int);
210 inline void mc146818_write(void *, u_int, u_int);
211 
212 u_int i8254_get_timecount(struct timecounter *);
213 static void rtc_register(void);
214 
215 static struct timecounter i8254_timecounter = {
216 	i8254_get_timecount,	/* get_timecount */
217 	0,			/* no poll_pps */
218 	~0u,			/* counter_mask */
219 	TIMER_FREQ,		/* frequency */
220 	"i8254",		/* name */
221 	100,			/* quality */
222 	NULL,			/* private data */
223 	NULL,			/* next */
224 };
225 
226 /* XXX use sc? */
227 inline u_int
228 mc146818_read(void *sc, u_int reg)
229 {
230 
231 	outb(IO_RTC, reg);
232 	return (inb(IO_RTC+1));
233 }
234 
235 /* XXX use sc? */
236 inline void
237 mc146818_write(void *sc, u_int reg, u_int datum)
238 {
239 
240 	outb(IO_RTC, reg);
241 	outb(IO_RTC+1, datum);
242 }
243 
244 u_long rtclock_tval;		/* i8254 reload value for countdown */
245 int    rtclock_init = 0;
246 
247 int clock_broken_latch = 0;
248 
249 #ifdef CLOCK_PARANOIA
250 static int ticks[6];
251 #endif
252 /*
253  * i8254 latch check routine:
254  *     National Geode (formerly Cyrix MediaGX) has a serious bug in
255  *     its built-in i8254-compatible clock module.
256  *     machdep sets the variable 'clock_broken_latch' to indicate it.
257  */
258 
259 static unsigned int
260 gettick_broken_latch(void)
261 {
262 	int v1, v2, v3;
263 	int w1, w2, w3;
264 	int s;
265 
266 	/* Don't want someone screwing with the counter while we're here. */
267 	s = splhigh();
268 	__cpu_simple_lock(&tmr_lock);
269 	v1 = inb(IO_TIMER1+TIMER_CNTR0);
270 	v1 |= inb(IO_TIMER1+TIMER_CNTR0) << 8;
271 	v2 = inb(IO_TIMER1+TIMER_CNTR0);
272 	v2 |= inb(IO_TIMER1+TIMER_CNTR0) << 8;
273 	v3 = inb(IO_TIMER1+TIMER_CNTR0);
274 	v3 |= inb(IO_TIMER1+TIMER_CNTR0) << 8;
275 	__cpu_simple_unlock(&tmr_lock);
276 	splx(s);
277 
278 #ifdef CLOCK_PARANOIA
279 	if (clock_debug) {
280 		ticks[0] = ticks[3];
281 		ticks[1] = ticks[4];
282 		ticks[2] = ticks[5];
283 		ticks[3] = v1;
284 		ticks[4] = v2;
285 		ticks[5] = v3;
286 	}
287 #endif
288 
289 	if (v1 >= v2 && v2 >= v3 && v1 - v3 < 0x200)
290 		return (v2);
291 
292 #define _swap_val(a, b) do { \
293 	int c = a; \
294 	a = b; \
295 	b = c; \
296 } while (0)
297 
298 	/*
299 	 * sort v1 v2 v3
300 	 */
301 	if (v1 < v2)
302 		_swap_val(v1, v2);
303 	if (v2 < v3)
304 		_swap_val(v2, v3);
305 	if (v1 < v2)
306 		_swap_val(v1, v2);
307 
308 	/*
309 	 * compute the middle value
310 	 */
311 
312 	if (v1 - v3 < 0x200)
313 		return (v2);
314 
315 	w1 = v2 - v3;
316 	w2 = v3 - v1 + rtclock_tval;
317 	w3 = v1 - v2;
318 	if (w1 >= w2) {
319 		if (w1 >= w3)
320 		        return (v1);
321 	} else {
322 		if (w2 >= w3)
323 			return (v2);
324 	}
325 	return (v3);
326 }
327 
328 /* minimal initialization, enough for delay() */
329 void
330 initrtclock(u_long freq)
331 {
332 	u_long tval;
333 
334 	/*
335 	 * Compute timer_count, the count-down count the timer will be
336 	 * set to.  Also, correctly round
337 	 * this by carrying an extra bit through the division.
338 	 */
339 	tval = (freq * 2) / (u_long) hz;
340 	tval = (tval / 2) + (tval & 0x1);
341 
342 	/* initialize 8254 clock */
343 	outb(IO_TIMER1+TIMER_MODE, TIMER_SEL0|TIMER_RATEGEN|TIMER_16BIT);
344 
345 	/* Correct rounding will buy us a better precision in timekeeping */
346 	outb(IO_TIMER1+TIMER_CNTR0, tval % 256);
347 	outb(IO_TIMER1+TIMER_CNTR0, tval / 256);
348 
349 	rtclock_tval = tval ? tval : 0xFFFF;
350 	rtclock_init = 1;
351 }
352 
353 void
354 startrtclock(void)
355 {
356 	int s;
357 
358 	if (!rtclock_init)
359 		initrtclock(TIMER_FREQ);
360 
361 	/* Check diagnostic status */
362 	if ((s = mc146818_read(NULL, NVRAM_DIAG)) != 0) { /* XXX softc */
363 		char bits[128];
364 		snprintb(bits, sizeof(bits), NVRAM_DIAG_BITS, s);
365 		printf("RTC BIOS diagnostic error %s\n", bits);
366 	}
367 
368 	tc_init(&i8254_timecounter);
369 	rtc_register();
370 }
371 
372 /*
373  * Must be called at splsched().
374  */
375 static void
376 tickle_tc(void)
377 {
378 #if defined(MULTIPROCESSOR)
379 	struct cpu_info *ci = curcpu();
380 	/*
381 	 * If we are not the primary CPU, we're not allowed to do
382 	 * any more work.
383 	 */
384 	if (CPU_IS_PRIMARY(ci) == 0)
385 		return;
386 #endif
387 	if (rtclock_tval && timecounter->tc_get_timecount == i8254_get_timecount) {
388 		__cpu_simple_lock(&tmr_lock);
389 		if (i8254_ticked)
390 			i8254_ticked    = 0;
391 		else {
392 			i8254_offset   += rtclock_tval;
393 			i8254_lastcount = 0;
394 		}
395 		__cpu_simple_unlock(&tmr_lock);
396 	}
397 
398 }
399 
400 static int
401 clockintr(void *arg, struct intrframe *frame)
402 {
403 	tickle_tc();
404 
405 	hardclock((struct clockframe *)frame);
406 
407 #if NMCA > 0
408 	if (MCA_system) {
409 		/* Reset PS/2 clock interrupt by asserting bit 7 of port 0x61 */
410 		outb(0x61, inb(0x61) | 0x80);
411 	}
412 #endif
413 	return -1;
414 }
415 
416 u_int
417 i8254_get_timecount(struct timecounter *tc)
418 {
419 	u_int count;
420 	uint16_t rdval;
421 	u_long psl;
422 
423 	/* Don't want someone screwing with the counter while we're here. */
424 	psl = x86_read_psl();
425 	x86_disable_intr();
426 	__cpu_simple_lock(&tmr_lock);
427 	/* Select timer0 and latch counter value. */
428 	outb(IO_TIMER1 + TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
429 	/* insb to make the read atomic */
430 	rdval = inb(IO_TIMER1+TIMER_CNTR0);
431 	rdval |= (inb(IO_TIMER1+TIMER_CNTR0) << 8);
432 	count = rtclock_tval - rdval;
433 	if (rtclock_tval && (count < i8254_lastcount &&
434 			     (!i8254_ticked || rtclock_tval == 0xFFFF))) {
435 		i8254_ticked = 1;
436 		i8254_offset += rtclock_tval;
437 	}
438 	i8254_lastcount = count;
439 	count += i8254_offset;
440 	__cpu_simple_unlock(&tmr_lock);
441 	x86_write_psl(psl);
442 
443 	return (count);
444 }
445 
446 unsigned int
447 gettick(void)
448 {
449 	uint16_t rdval;
450 	u_long psl;
451 
452 	if (clock_broken_latch)
453 		return (gettick_broken_latch());
454 
455 	/* Don't want someone screwing with the counter while we're here. */
456 	psl = x86_read_psl();
457 	x86_disable_intr();
458 	__cpu_simple_lock(&tmr_lock);
459 	/* Select counter 0 and latch it. */
460 	outb(IO_TIMER1+TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
461 	rdval = inb(IO_TIMER1+TIMER_CNTR0);
462 	rdval |= (inb(IO_TIMER1+TIMER_CNTR0) << 8);
463 	__cpu_simple_unlock(&tmr_lock);
464 	x86_write_psl(psl);
465 
466 	return rdval;
467 }
468 
469 /*
470  * Wait approximately `n' microseconds.
471  * Relies on timer 1 counting down from (TIMER_FREQ / hz) at TIMER_FREQ Hz.
472  * Note: timer had better have been programmed before this is first used!
473  * (Note that we use `rate generator' mode, which counts at 1:1; `square
474  * wave' mode counts at 2:1).
475  * Don't rely on this being particularly accurate.
476  */
477 void
478 i8254_delay(unsigned int n)
479 {
480 	unsigned int cur_tick, initial_tick;
481 	int remaining;
482 
483 	/* allow DELAY() to be used before startrtclock() */
484 	if (!rtclock_init)
485 		initrtclock(TIMER_FREQ);
486 
487 	/*
488 	 * Read the counter first, so that the rest of the setup overhead is
489 	 * counted.
490 	 */
491 	initial_tick = gettick();
492 
493 	if (n <= UINT_MAX / TIMER_FREQ) {
494 		/*
495 		 * For unsigned arithmetic, division can be replaced with
496 		 * multiplication with the inverse and a shift.
497 		 */
498 		remaining = n * TIMER_FREQ / 1000000;
499 	} else {
500 		/* This is a very long delay.
501 		 * Being slow here doesn't matter.
502 		 */
503 		remaining = (unsigned long long) n * TIMER_FREQ / 1000000;
504 	}
505 
506 	while (remaining > 1) {
507 #ifdef CLOCK_PARANOIA
508 		int delta;
509 		cur_tick = gettick();
510 		if (cur_tick > initial_tick)
511 			delta = rtclock_tval - (cur_tick - initial_tick);
512 		else
513 			delta = initial_tick - cur_tick;
514 		if (delta < 0 || delta >= rtclock_tval / 2) {
515 			DPRINTF(("delay: ignore ticks %.4x-%.4x",
516 				 initial_tick, cur_tick));
517 			if (clock_broken_latch) {
518 				DPRINTF(("  (%.4x %.4x %.4x %.4x %.4x %.4x)\n",
519 				         ticks[0], ticks[1], ticks[2],
520 				         ticks[3], ticks[4], ticks[5]));
521 			} else {
522 				DPRINTF(("\n"));
523 			}
524 		} else
525 			remaining -= delta;
526 #else
527 		cur_tick = gettick();
528 		if (cur_tick > initial_tick)
529 			remaining -= rtclock_tval - (cur_tick - initial_tick);
530 		else
531 			remaining -= initial_tick - cur_tick;
532 #endif
533 		initial_tick = cur_tick;
534 	}
535 }
536 
537 #if (NPCPPI > 0)
538 int
539 sysbeepmatch(device_t parent, cfdata_t match, void *aux)
540 {
541 	return (!ppi_attached);
542 }
543 
544 void
545 sysbeepattach(device_t parent, device_t self, void *aux)
546 {
547 	aprint_naive("\n");
548 	aprint_normal("\n");
549 
550 	ppicookie = ((struct pcppi_attach_args *)aux)->pa_cookie;
551 	ppi_attached = 1;
552 
553 	if (!pmf_device_register(self, NULL, NULL))
554 		aprint_error_dev(self, "couldn't establish power handler\n");
555 }
556 
557 int
558 sysbeepdetach(device_t self, int flags)
559 {
560 	pmf_device_deregister(self);
561 	ppi_attached = 0;
562 	return 0;
563 }
564 #endif
565 
566 void
567 sysbeep(int pitch, int period)
568 {
569 #if (NPCPPI > 0)
570 	if (ppi_attached)
571 		pcppi_bell(ppicookie, pitch, period, 0);
572 #endif
573 }
574 
575 void
576 i8254_initclocks(void)
577 {
578 
579 	/*
580 	 * XXX If you're doing strange things with multiple clocks, you might
581 	 * want to keep track of clock handlers.
582 	 */
583 	(void)isa_intr_establish(NULL, 0, IST_PULSE, IPL_CLOCK,
584 	    (int (*)(void *))clockintr, 0);
585 }
586 
587 static void
588 rtcinit(void)
589 {
590 	static int first_rtcopen_ever = 1;
591 
592 	if (!first_rtcopen_ever)
593 		return;
594 	first_rtcopen_ever = 0;
595 
596 	mc146818_write(NULL, MC_REGA,			/* XXX softc */
597 	    MC_BASE_32_KHz | MC_RATE_1024_Hz);
598 	mc146818_write(NULL, MC_REGB, MC_REGB_24HR);	/* XXX softc */
599 }
600 
601 static int
602 rtcget(mc_todregs *regs)
603 {
604 
605 	rtcinit();
606 	if ((mc146818_read(NULL, MC_REGD) & MC_REGD_VRT) == 0) /* XXX softc */
607 		return (-1);
608 	MC146818_GETTOD(NULL, regs);			/* XXX softc */
609 	return (0);
610 }
611 
612 static void
613 rtcput(mc_todregs *regs)
614 {
615 
616 	rtcinit();
617 	MC146818_PUTTOD(NULL, regs);			/* XXX softc */
618 }
619 
620 /*
621  * check whether the CMOS layout is "standard"-like (ie, not PS/2-like),
622  * to be called at splclock()
623  */
624 static int
625 cmoscheck(void)
626 {
627 	int i;
628 	unsigned short cksum = 0;
629 
630 	for (i = 0x10; i <= 0x2d; i++)
631 		cksum += mc146818_read(NULL, i); /* XXX softc */
632 
633 	return (cksum == (mc146818_read(NULL, 0x2e) << 8)
634 			  + mc146818_read(NULL, 0x2f));
635 }
636 
637 #if NMCA > 0
638 /*
639  * Check whether the CMOS layout is PS/2 like, to be called at splclock().
640  */
641 static int cmoscheckps2(void);
642 static int
643 cmoscheckps2(void)
644 {
645 #if 0
646 	/* Disabled until I find out the CRC checksum algorithm IBM uses */
647 	int i;
648 	unsigned short cksum = 0;
649 
650 	for (i = 0x10; i <= 0x31; i++)
651 		cksum += mc146818_read(NULL, i); /* XXX softc */
652 
653 	return (cksum == (mc146818_read(NULL, 0x32) << 8)
654 			  + mc146818_read(NULL, 0x33));
655 #else
656 	/* Check 'incorrect checksum' bit of IBM PS/2 Diagnostic Status Byte */
657 	return ((mc146818_read(NULL, NVRAM_DIAG) & (1<<6)) == 0);
658 #endif
659 }
660 #endif /* NMCA > 0 */
661 
662 /*
663  * patchable to control century byte handling:
664  * 1: always update
665  * -1: never touch
666  * 0: try to figure out itself
667  */
668 int rtc_update_century = 0;
669 
670 /*
671  * Expand a two-digit year as read from the clock chip
672  * into full width.
673  * Being here, deal with the CMOS century byte.
674  */
675 static int centb = NVRAM_CENTURY;
676 static int
677 clock_expandyear(int clockyear)
678 {
679 	int s, clockcentury, cmoscentury;
680 
681 	clockcentury = (clockyear < 70) ? 20 : 19;
682 	clockyear += 100 * clockcentury;
683 
684 	if (rtc_update_century < 0)
685 		return (clockyear);
686 
687 	s = splclock();
688 	if (cmoscheck())
689 		cmoscentury = mc146818_read(NULL, NVRAM_CENTURY);
690 #if NMCA > 0
691 	else if (MCA_system && cmoscheckps2())
692 		cmoscentury = mc146818_read(NULL, (centb = 0x37));
693 #endif
694 	else
695 		cmoscentury = 0;
696 	splx(s);
697 	if (!cmoscentury) {
698 #ifdef DIAGNOSTIC
699 		printf("clock: unknown CMOS layout\n");
700 #endif
701 		return (clockyear);
702 	}
703 	cmoscentury = bcdtobin(cmoscentury);
704 
705 	if (cmoscentury != clockcentury) {
706 		/* XXX note: saying "century is 20" might confuse the naive. */
707 		printf("WARNING: NVRAM century is %d but RTC year is %d\n",
708 		       cmoscentury, clockyear);
709 
710 		/* Kludge to roll over century. */
711 		if ((rtc_update_century > 0) ||
712 		    ((cmoscentury == 19) && (clockcentury == 20) &&
713 		     (clockyear == 2000))) {
714 			printf("WARNING: Setting NVRAM century to %d\n",
715 			       clockcentury);
716 			s = splclock();
717 			mc146818_write(NULL, centb, bintobcd(clockcentury));
718 			splx(s);
719 		}
720 	} else if (cmoscentury == 19 && rtc_update_century == 0)
721 		rtc_update_century = 1; /* will update later in resettodr() */
722 
723 	return (clockyear);
724 }
725 
726 static int
727 rtc_get_ymdhms(todr_chip_handle_t tch, struct clock_ymdhms *dt)
728 {
729 	int s;
730 	mc_todregs rtclk;
731 
732 	s = splclock();
733 	if (rtcget(&rtclk)) {
734 		splx(s);
735 		return -1;
736 	}
737 	splx(s);
738 
739 	dt->dt_sec = bcdtobin(rtclk[MC_SEC]);
740 	dt->dt_min = bcdtobin(rtclk[MC_MIN]);
741 	dt->dt_hour = bcdtobin(rtclk[MC_HOUR]);
742 	dt->dt_day = bcdtobin(rtclk[MC_DOM]);
743 	dt->dt_mon = bcdtobin(rtclk[MC_MONTH]);
744 	dt->dt_year = clock_expandyear(bcdtobin(rtclk[MC_YEAR]));
745 
746 	return 0;
747 }
748 
749 static int
750 rtc_set_ymdhms(todr_chip_handle_t tch, struct clock_ymdhms *dt)
751 {
752 	mc_todregs rtclk;
753 	int century;
754 	int s;
755 
756 	s = splclock();
757 	if (rtcget(&rtclk))
758 		memset(&rtclk, 0, sizeof(rtclk));
759 	splx(s);
760 
761 	rtclk[MC_SEC] = bintobcd(dt->dt_sec);
762 	rtclk[MC_MIN] = bintobcd(dt->dt_min);
763 	rtclk[MC_HOUR] = bintobcd(dt->dt_hour);
764 	rtclk[MC_DOW] = dt->dt_wday + 1;
765 	rtclk[MC_YEAR] = bintobcd(dt->dt_year % 100);
766 	rtclk[MC_MONTH] = bintobcd(dt->dt_mon);
767 	rtclk[MC_DOM] = bintobcd(dt->dt_day);
768 
769 #ifdef DEBUG_CLOCK
770 	printf("setclock: %x/%x/%x %x:%x:%x\n", rtclk[MC_YEAR], rtclk[MC_MONTH],
771 	   rtclk[MC_DOM], rtclk[MC_HOUR], rtclk[MC_MIN], rtclk[MC_SEC]);
772 #endif
773 	s = splclock();
774 	rtcput(&rtclk);
775 	if (rtc_update_century > 0) {
776 		century = bintobcd(dt->dt_year / 100);
777 		mc146818_write(NULL, centb, century); /* XXX softc */
778 	}
779 	splx(s);
780 	return 0;
781 
782 }
783 
784 static void
785 rtc_register(void)
786 {
787 	static struct todr_chip_handle	tch;
788 	tch.todr_gettime_ymdhms = rtc_get_ymdhms;
789 	tch.todr_settime_ymdhms = rtc_set_ymdhms;
790 	tch.todr_setwen = NULL;
791 
792 	todr_attach(&tch);
793 }
794 
795 void
796 setstatclockrate(int arg)
797 {
798 }
799