xref: /netbsd-src/sys/arch/x86/isa/clock.c (revision 274254cdae52594c1aa480a736aef78313d15c9c)
1 /*	$NetBSD: clock.c,v 1.32 2009/04/07 17:51:46 dyoung Exp $	*/
2 
3 /*-
4  * Copyright (c) 1990 The Regents of the University of California.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to Berkeley by
8  * William Jolitz and Don Ahn.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. Neither the name of the University nor the names of its contributors
19  *    may be used to endorse or promote products derived from this software
20  *    without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32  * SUCH DAMAGE.
33  *
34  *	@(#)clock.c	7.2 (Berkeley) 5/12/91
35  */
36 /*-
37  * Copyright (c) 1993, 1994 Charles M. Hannum.
38  *
39  * This code is derived from software contributed to Berkeley by
40  * William Jolitz and Don Ahn.
41  *
42  * Redistribution and use in source and binary forms, with or without
43  * modification, are permitted provided that the following conditions
44  * are met:
45  * 1. Redistributions of source code must retain the above copyright
46  *    notice, this list of conditions and the following disclaimer.
47  * 2. Redistributions in binary form must reproduce the above copyright
48  *    notice, this list of conditions and the following disclaimer in the
49  *    documentation and/or other materials provided with the distribution.
50  * 3. All advertising materials mentioning features or use of this software
51  *    must display the following acknowledgement:
52  *	This product includes software developed by the University of
53  *	California, Berkeley and its contributors.
54  * 4. Neither the name of the University nor the names of its contributors
55  *    may be used to endorse or promote products derived from this software
56  *    without specific prior written permission.
57  *
58  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
59  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
60  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
61  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
62  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
63  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
64  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
65  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
66  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
67  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
68  * SUCH DAMAGE.
69  *
70  *	@(#)clock.c	7.2 (Berkeley) 5/12/91
71  */
72 /*
73  * Mach Operating System
74  * Copyright (c) 1991,1990,1989 Carnegie Mellon University
75  * All Rights Reserved.
76  *
77  * Permission to use, copy, modify and distribute this software and its
78  * documentation is hereby granted, provided that both the copyright
79  * notice and this permission notice appear in all copies of the
80  * software, derivative works or modified versions, and any portions
81  * thereof, and that both notices appear in supporting documentation.
82  *
83  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
84  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
85  * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
86  *
87  * Carnegie Mellon requests users of this software to return to
88  *
89  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
90  *  School of Computer Science
91  *  Carnegie Mellon University
92  *  Pittsburgh PA 15213-3890
93  *
94  * any improvements or extensions that they make and grant Carnegie Mellon
95  * the rights to redistribute these changes.
96  */
97 /*
98   Copyright 1988, 1989 by Intel Corporation, Santa Clara, California.
99 
100 		All Rights Reserved
101 
102 Permission to use, copy, modify, and distribute this software and
103 its documentation for any purpose and without fee is hereby
104 granted, provided that the above copyright notice appears in all
105 copies and that both the copyright notice and this permission notice
106 appear in supporting documentation, and that the name of Intel
107 not be used in advertising or publicity pertaining to distribution
108 of the software without specific, written prior permission.
109 
110 INTEL DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
111 INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS,
112 IN NO EVENT SHALL INTEL BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
113 CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
114 LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
115 NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
116 WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
117 */
118 
119 /*
120  * Primitive clock interrupt routines.
121  */
122 
123 #include <sys/cdefs.h>
124 __KERNEL_RCSID(0, "$NetBSD: clock.c,v 1.32 2009/04/07 17:51:46 dyoung Exp $");
125 
126 /* #define CLOCKDEBUG */
127 /* #define CLOCK_PARANOIA */
128 
129 #include "opt_multiprocessor.h"
130 #include "opt_ntp.h"
131 
132 #include <sys/param.h>
133 #include <sys/systm.h>
134 #include <sys/time.h>
135 #include <sys/timetc.h>
136 #include <sys/kernel.h>
137 #include <sys/device.h>
138 #include <sys/mutex.h>
139 #include <sys/cpu.h>
140 #include <sys/intr.h>
141 
142 #include <machine/pio.h>
143 #include <machine/cpufunc.h>
144 #include <machine/lock.h>
145 
146 #include <dev/isa/isareg.h>
147 #include <dev/isa/isavar.h>
148 #include <dev/ic/mc146818reg.h>
149 #include <dev/ic/i8253reg.h>
150 #include <i386/isa/nvram.h>
151 #include <x86/x86/tsc.h>
152 #include <x86/lock.h>
153 #include <dev/clock_subr.h>
154 #include <machine/specialreg.h>
155 
156 #ifndef __x86_64__
157 #include "mca.h"
158 #endif
159 #if NMCA > 0
160 #include <machine/mca_machdep.h>	/* for MCA_system */
161 #endif
162 
163 #include "pcppi.h"
164 #if (NPCPPI > 0)
165 #include <dev/isa/pcppivar.h>
166 
167 int sysbeepmatch(device_t, cfdata_t, void *);
168 void sysbeepattach(device_t, device_t, void *);
169 int sysbeepdetach(device_t, int);
170 
171 CFATTACH_DECL3_NEW(sysbeep, 0,
172     sysbeepmatch, sysbeepattach, sysbeepdetach, NULL, NULL, NULL,
173     DVF_DETACH_SHUTDOWN);
174 
175 static int ppi_attached;
176 static pcppi_tag_t ppicookie;
177 #endif /* PCPPI */
178 
179 #ifdef CLOCKDEBUG
180 int clock_debug = 0;
181 #define DPRINTF(arg) if (clock_debug) printf arg
182 #else
183 #define DPRINTF(arg)
184 #endif
185 
186 /* Used by lapic.c */
187 unsigned int	gettick(void);
188 void		sysbeep(int, int);
189 static void     tickle_tc(void);
190 
191 static int	clockintr(void *, struct intrframe *);
192 static void	rtcinit(void);
193 static int	rtcget(mc_todregs *);
194 static void	rtcput(mc_todregs *);
195 
196 static int	cmoscheck(void);
197 
198 static int	clock_expandyear(int);
199 int 		sysbeepdetach(device_t, int);
200 
201 static unsigned int	gettick_broken_latch(void);
202 
203 static volatile uint32_t i8254_lastcount;
204 static volatile uint32_t i8254_offset;
205 static volatile int i8254_ticked;
206 
207 /* to protect TC timer variables */
208 static __cpu_simple_lock_t tmr_lock = __SIMPLELOCK_UNLOCKED;
209 
210 inline u_int mc146818_read(void *, u_int);
211 inline void mc146818_write(void *, u_int, u_int);
212 
213 u_int i8254_get_timecount(struct timecounter *);
214 static void rtc_register(void);
215 
216 static struct timecounter i8254_timecounter = {
217 	i8254_get_timecount,	/* get_timecount */
218 	0,			/* no poll_pps */
219 	~0u,			/* counter_mask */
220 	TIMER_FREQ,		/* frequency */
221 	"i8254",		/* name */
222 	100,			/* quality */
223 	NULL,			/* private data */
224 	NULL,			/* next */
225 };
226 
227 /* XXX use sc? */
228 inline u_int
229 mc146818_read(void *sc, u_int reg)
230 {
231 
232 	outb(IO_RTC, reg);
233 	return (inb(IO_RTC+1));
234 }
235 
236 /* XXX use sc? */
237 inline void
238 mc146818_write(void *sc, u_int reg, u_int datum)
239 {
240 
241 	outb(IO_RTC, reg);
242 	outb(IO_RTC+1, datum);
243 }
244 
245 u_long rtclock_tval;		/* i8254 reload value for countdown */
246 int    rtclock_init = 0;
247 
248 int clock_broken_latch = 0;
249 
250 #ifdef CLOCK_PARANOIA
251 static int ticks[6];
252 #endif
253 /*
254  * i8254 latch check routine:
255  *     National Geode (formerly Cyrix MediaGX) has a serious bug in
256  *     its built-in i8254-compatible clock module.
257  *     machdep sets the variable 'clock_broken_latch' to indicate it.
258  */
259 
260 static unsigned int
261 gettick_broken_latch(void)
262 {
263 	int v1, v2, v3;
264 	int w1, w2, w3;
265 	int s;
266 
267 	/* Don't want someone screwing with the counter while we're here. */
268 	s = splhigh();
269 	__cpu_simple_lock(&tmr_lock);
270 	v1 = inb(IO_TIMER1+TIMER_CNTR0);
271 	v1 |= inb(IO_TIMER1+TIMER_CNTR0) << 8;
272 	v2 = inb(IO_TIMER1+TIMER_CNTR0);
273 	v2 |= inb(IO_TIMER1+TIMER_CNTR0) << 8;
274 	v3 = inb(IO_TIMER1+TIMER_CNTR0);
275 	v3 |= inb(IO_TIMER1+TIMER_CNTR0) << 8;
276 	__cpu_simple_unlock(&tmr_lock);
277 	splx(s);
278 
279 #ifdef CLOCK_PARANOIA
280 	if (clock_debug) {
281 		ticks[0] = ticks[3];
282 		ticks[1] = ticks[4];
283 		ticks[2] = ticks[5];
284 		ticks[3] = v1;
285 		ticks[4] = v2;
286 		ticks[5] = v3;
287 	}
288 #endif
289 
290 	if (v1 >= v2 && v2 >= v3 && v1 - v3 < 0x200)
291 		return (v2);
292 
293 #define _swap_val(a, b) do { \
294 	int c = a; \
295 	a = b; \
296 	b = c; \
297 } while (0)
298 
299 	/*
300 	 * sort v1 v2 v3
301 	 */
302 	if (v1 < v2)
303 		_swap_val(v1, v2);
304 	if (v2 < v3)
305 		_swap_val(v2, v3);
306 	if (v1 < v2)
307 		_swap_val(v1, v2);
308 
309 	/*
310 	 * compute the middle value
311 	 */
312 
313 	if (v1 - v3 < 0x200)
314 		return (v2);
315 
316 	w1 = v2 - v3;
317 	w2 = v3 - v1 + rtclock_tval;
318 	w3 = v1 - v2;
319 	if (w1 >= w2) {
320 		if (w1 >= w3)
321 		        return (v1);
322 	} else {
323 		if (w2 >= w3)
324 			return (v2);
325 	}
326 	return (v3);
327 }
328 
329 /* minimal initialization, enough for delay() */
330 void
331 initrtclock(u_long freq)
332 {
333 	u_long tval;
334 
335 	/*
336 	 * Compute timer_count, the count-down count the timer will be
337 	 * set to.  Also, correctly round
338 	 * this by carrying an extra bit through the division.
339 	 */
340 	tval = (freq * 2) / (u_long) hz;
341 	tval = (tval / 2) + (tval & 0x1);
342 
343 	/* initialize 8254 clock */
344 	outb(IO_TIMER1+TIMER_MODE, TIMER_SEL0|TIMER_RATEGEN|TIMER_16BIT);
345 
346 	/* Correct rounding will buy us a better precision in timekeeping */
347 	outb(IO_TIMER1+TIMER_CNTR0, tval % 256);
348 	outb(IO_TIMER1+TIMER_CNTR0, tval / 256);
349 
350 	rtclock_tval = tval ? tval : 0xFFFF;
351 	rtclock_init = 1;
352 }
353 
354 void
355 startrtclock(void)
356 {
357 	int s;
358 
359 	if (!rtclock_init)
360 		initrtclock(TIMER_FREQ);
361 
362 	/* Check diagnostic status */
363 	if ((s = mc146818_read(NULL, NVRAM_DIAG)) != 0) { /* XXX softc */
364 		char bits[128];
365 		snprintb(bits, sizeof(bits), NVRAM_DIAG_BITS, s);
366 		printf("RTC BIOS diagnostic error %s\n", bits);
367 	}
368 
369 	tc_init(&i8254_timecounter);
370 	rtc_register();
371 }
372 
373 /*
374  * Must be called at splsched().
375  */
376 static void
377 tickle_tc(void)
378 {
379 #if defined(MULTIPROCESSOR)
380 	struct cpu_info *ci = curcpu();
381 	/*
382 	 * If we are not the primary CPU, we're not allowed to do
383 	 * any more work.
384 	 */
385 	if (CPU_IS_PRIMARY(ci) == 0)
386 		return;
387 #endif
388 	if (rtclock_tval && timecounter->tc_get_timecount == i8254_get_timecount) {
389 		__cpu_simple_lock(&tmr_lock);
390 		if (i8254_ticked)
391 			i8254_ticked    = 0;
392 		else {
393 			i8254_offset   += rtclock_tval;
394 			i8254_lastcount = 0;
395 		}
396 		__cpu_simple_unlock(&tmr_lock);
397 	}
398 
399 }
400 
401 static int
402 clockintr(void *arg, struct intrframe *frame)
403 {
404 	tickle_tc();
405 
406 	hardclock((struct clockframe *)frame);
407 
408 #if NMCA > 0
409 	if (MCA_system) {
410 		/* Reset PS/2 clock interrupt by asserting bit 7 of port 0x61 */
411 		outb(0x61, inb(0x61) | 0x80);
412 	}
413 #endif
414 	return -1;
415 }
416 
417 u_int
418 i8254_get_timecount(struct timecounter *tc)
419 {
420 	u_int count;
421 	uint16_t rdval;
422 	u_long psl;
423 
424 	/* Don't want someone screwing with the counter while we're here. */
425 	psl = x86_read_psl();
426 	x86_disable_intr();
427 	__cpu_simple_lock(&tmr_lock);
428 	/* Select timer0 and latch counter value. */
429 	outb(IO_TIMER1 + TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
430 	/* insb to make the read atomic */
431 	rdval = inb(IO_TIMER1+TIMER_CNTR0);
432 	rdval |= (inb(IO_TIMER1+TIMER_CNTR0) << 8);
433 	count = rtclock_tval - rdval;
434 	if (rtclock_tval && (count < i8254_lastcount &&
435 			     (!i8254_ticked || rtclock_tval == 0xFFFF))) {
436 		i8254_ticked = 1;
437 		i8254_offset += rtclock_tval;
438 	}
439 	i8254_lastcount = count;
440 	count += i8254_offset;
441 	__cpu_simple_unlock(&tmr_lock);
442 	x86_write_psl(psl);
443 
444 	return (count);
445 }
446 
447 unsigned int
448 gettick(void)
449 {
450 	uint16_t rdval;
451 	u_long psl;
452 
453 	if (clock_broken_latch)
454 		return (gettick_broken_latch());
455 
456 	/* Don't want someone screwing with the counter while we're here. */
457 	psl = x86_read_psl();
458 	x86_disable_intr();
459 	__cpu_simple_lock(&tmr_lock);
460 	/* Select counter 0 and latch it. */
461 	outb(IO_TIMER1+TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
462 	rdval = inb(IO_TIMER1+TIMER_CNTR0);
463 	rdval |= (inb(IO_TIMER1+TIMER_CNTR0) << 8);
464 	__cpu_simple_unlock(&tmr_lock);
465 	x86_write_psl(psl);
466 
467 	return rdval;
468 }
469 
470 /*
471  * Wait approximately `n' microseconds.
472  * Relies on timer 1 counting down from (TIMER_FREQ / hz) at TIMER_FREQ Hz.
473  * Note: timer had better have been programmed before this is first used!
474  * (Note that we use `rate generator' mode, which counts at 1:1; `square
475  * wave' mode counts at 2:1).
476  * Don't rely on this being particularly accurate.
477  */
478 void
479 i8254_delay(unsigned int n)
480 {
481 	unsigned int cur_tick, initial_tick;
482 	int remaining;
483 
484 	/* allow DELAY() to be used before startrtclock() */
485 	if (!rtclock_init)
486 		initrtclock(TIMER_FREQ);
487 
488 	/*
489 	 * Read the counter first, so that the rest of the setup overhead is
490 	 * counted.
491 	 */
492 	initial_tick = gettick();
493 
494 	if (n <= UINT_MAX / TIMER_FREQ) {
495 		/*
496 		 * For unsigned arithmetic, division can be replaced with
497 		 * multiplication with the inverse and a shift.
498 		 */
499 		remaining = n * TIMER_FREQ / 1000000;
500 	} else {
501 		/* This is a very long delay.
502 		 * Being slow here doesn't matter.
503 		 */
504 		remaining = (unsigned long long) n * TIMER_FREQ / 1000000;
505 	}
506 
507 	while (remaining > 1) {
508 #ifdef CLOCK_PARANOIA
509 		int delta;
510 		cur_tick = gettick();
511 		if (cur_tick > initial_tick)
512 			delta = rtclock_tval - (cur_tick - initial_tick);
513 		else
514 			delta = initial_tick - cur_tick;
515 		if (delta < 0 || delta >= rtclock_tval / 2) {
516 			DPRINTF(("delay: ignore ticks %.4x-%.4x",
517 				 initial_tick, cur_tick));
518 			if (clock_broken_latch) {
519 				DPRINTF(("  (%.4x %.4x %.4x %.4x %.4x %.4x)\n",
520 				         ticks[0], ticks[1], ticks[2],
521 				         ticks[3], ticks[4], ticks[5]));
522 			} else {
523 				DPRINTF(("\n"));
524 			}
525 		} else
526 			remaining -= delta;
527 #else
528 		cur_tick = gettick();
529 		if (cur_tick > initial_tick)
530 			remaining -= rtclock_tval - (cur_tick - initial_tick);
531 		else
532 			remaining -= initial_tick - cur_tick;
533 #endif
534 		initial_tick = cur_tick;
535 	}
536 }
537 
538 #if (NPCPPI > 0)
539 int
540 sysbeepmatch(device_t parent, cfdata_t match, void *aux)
541 {
542 	return (!ppi_attached);
543 }
544 
545 void
546 sysbeepattach(device_t parent, device_t self, void *aux)
547 {
548 	aprint_naive("\n");
549 	aprint_normal("\n");
550 
551 	ppicookie = ((struct pcppi_attach_args *)aux)->pa_cookie;
552 	ppi_attached = 1;
553 
554 	if (!pmf_device_register(self, NULL, NULL))
555 		aprint_error_dev(self, "couldn't establish power handler\n");
556 }
557 
558 int
559 sysbeepdetach(device_t self, int flags)
560 {
561 	pmf_device_deregister(self);
562 	ppi_attached = 0;
563 	return 0;
564 }
565 #endif
566 
567 void
568 sysbeep(int pitch, int period)
569 {
570 #if (NPCPPI > 0)
571 	if (ppi_attached)
572 		pcppi_bell(ppicookie, pitch, period, 0);
573 #endif
574 }
575 
576 void
577 i8254_initclocks(void)
578 {
579 
580 	/*
581 	 * XXX If you're doing strange things with multiple clocks, you might
582 	 * want to keep track of clock handlers.
583 	 */
584 	(void)isa_intr_establish(NULL, 0, IST_PULSE, IPL_CLOCK,
585 	    (int (*)(void *))clockintr, 0);
586 }
587 
588 static void
589 rtcinit(void)
590 {
591 	static int first_rtcopen_ever = 1;
592 
593 	if (!first_rtcopen_ever)
594 		return;
595 	first_rtcopen_ever = 0;
596 
597 	mc146818_write(NULL, MC_REGA,			/* XXX softc */
598 	    MC_BASE_32_KHz | MC_RATE_1024_Hz);
599 	mc146818_write(NULL, MC_REGB, MC_REGB_24HR);	/* XXX softc */
600 }
601 
602 static int
603 rtcget(mc_todregs *regs)
604 {
605 
606 	rtcinit();
607 	if ((mc146818_read(NULL, MC_REGD) & MC_REGD_VRT) == 0) /* XXX softc */
608 		return (-1);
609 	MC146818_GETTOD(NULL, regs);			/* XXX softc */
610 	return (0);
611 }
612 
613 static void
614 rtcput(mc_todregs *regs)
615 {
616 
617 	rtcinit();
618 	MC146818_PUTTOD(NULL, regs);			/* XXX softc */
619 }
620 
621 /*
622  * check whether the CMOS layout is "standard"-like (ie, not PS/2-like),
623  * to be called at splclock()
624  */
625 static int
626 cmoscheck(void)
627 {
628 	int i;
629 	unsigned short cksum = 0;
630 
631 	for (i = 0x10; i <= 0x2d; i++)
632 		cksum += mc146818_read(NULL, i); /* XXX softc */
633 
634 	return (cksum == (mc146818_read(NULL, 0x2e) << 8)
635 			  + mc146818_read(NULL, 0x2f));
636 }
637 
638 #if NMCA > 0
639 /*
640  * Check whether the CMOS layout is PS/2 like, to be called at splclock().
641  */
642 static int cmoscheckps2(void);
643 static int
644 cmoscheckps2(void)
645 {
646 #if 0
647 	/* Disabled until I find out the CRC checksum algorithm IBM uses */
648 	int i;
649 	unsigned short cksum = 0;
650 
651 	for (i = 0x10; i <= 0x31; i++)
652 		cksum += mc146818_read(NULL, i); /* XXX softc */
653 
654 	return (cksum == (mc146818_read(NULL, 0x32) << 8)
655 			  + mc146818_read(NULL, 0x33));
656 #else
657 	/* Check 'incorrect checksum' bit of IBM PS/2 Diagnostic Status Byte */
658 	return ((mc146818_read(NULL, NVRAM_DIAG) & (1<<6)) == 0);
659 #endif
660 }
661 #endif /* NMCA > 0 */
662 
663 /*
664  * patchable to control century byte handling:
665  * 1: always update
666  * -1: never touch
667  * 0: try to figure out itself
668  */
669 int rtc_update_century = 0;
670 
671 /*
672  * Expand a two-digit year as read from the clock chip
673  * into full width.
674  * Being here, deal with the CMOS century byte.
675  */
676 static int centb = NVRAM_CENTURY;
677 static int
678 clock_expandyear(int clockyear)
679 {
680 	int s, clockcentury, cmoscentury;
681 
682 	clockcentury = (clockyear < 70) ? 20 : 19;
683 	clockyear += 100 * clockcentury;
684 
685 	if (rtc_update_century < 0)
686 		return (clockyear);
687 
688 	s = splclock();
689 	if (cmoscheck())
690 		cmoscentury = mc146818_read(NULL, NVRAM_CENTURY);
691 #if NMCA > 0
692 	else if (MCA_system && cmoscheckps2())
693 		cmoscentury = mc146818_read(NULL, (centb = 0x37));
694 #endif
695 	else
696 		cmoscentury = 0;
697 	splx(s);
698 	if (!cmoscentury) {
699 #ifdef DIAGNOSTIC
700 		printf("clock: unknown CMOS layout\n");
701 #endif
702 		return (clockyear);
703 	}
704 	cmoscentury = bcdtobin(cmoscentury);
705 
706 	if (cmoscentury != clockcentury) {
707 		/* XXX note: saying "century is 20" might confuse the naive. */
708 		printf("WARNING: NVRAM century is %d but RTC year is %d\n",
709 		       cmoscentury, clockyear);
710 
711 		/* Kludge to roll over century. */
712 		if ((rtc_update_century > 0) ||
713 		    ((cmoscentury == 19) && (clockcentury == 20) &&
714 		     (clockyear == 2000))) {
715 			printf("WARNING: Setting NVRAM century to %d\n",
716 			       clockcentury);
717 			s = splclock();
718 			mc146818_write(NULL, centb, bintobcd(clockcentury));
719 			splx(s);
720 		}
721 	} else if (cmoscentury == 19 && rtc_update_century == 0)
722 		rtc_update_century = 1; /* will update later in resettodr() */
723 
724 	return (clockyear);
725 }
726 
727 static int
728 rtc_get_ymdhms(todr_chip_handle_t tch, struct clock_ymdhms *dt)
729 {
730 	int s;
731 	mc_todregs rtclk;
732 
733 	s = splclock();
734 	if (rtcget(&rtclk)) {
735 		splx(s);
736 		return -1;
737 	}
738 	splx(s);
739 
740 	dt->dt_sec = bcdtobin(rtclk[MC_SEC]);
741 	dt->dt_min = bcdtobin(rtclk[MC_MIN]);
742 	dt->dt_hour = bcdtobin(rtclk[MC_HOUR]);
743 	dt->dt_day = bcdtobin(rtclk[MC_DOM]);
744 	dt->dt_mon = bcdtobin(rtclk[MC_MONTH]);
745 	dt->dt_year = clock_expandyear(bcdtobin(rtclk[MC_YEAR]));
746 
747 	return 0;
748 }
749 
750 static int
751 rtc_set_ymdhms(todr_chip_handle_t tch, struct clock_ymdhms *dt)
752 {
753 	mc_todregs rtclk;
754 	int century;
755 	int s;
756 
757 	s = splclock();
758 	if (rtcget(&rtclk))
759 		memset(&rtclk, 0, sizeof(rtclk));
760 	splx(s);
761 
762 	rtclk[MC_SEC] = bintobcd(dt->dt_sec);
763 	rtclk[MC_MIN] = bintobcd(dt->dt_min);
764 	rtclk[MC_HOUR] = bintobcd(dt->dt_hour);
765 	rtclk[MC_DOW] = dt->dt_wday + 1;
766 	rtclk[MC_YEAR] = bintobcd(dt->dt_year % 100);
767 	rtclk[MC_MONTH] = bintobcd(dt->dt_mon);
768 	rtclk[MC_DOM] = bintobcd(dt->dt_day);
769 
770 #ifdef DEBUG_CLOCK
771 	printf("setclock: %x/%x/%x %x:%x:%x\n", rtclk[MC_YEAR], rtclk[MC_MONTH],
772 	   rtclk[MC_DOM], rtclk[MC_HOUR], rtclk[MC_MIN], rtclk[MC_SEC]);
773 #endif
774 	s = splclock();
775 	rtcput(&rtclk);
776 	if (rtc_update_century > 0) {
777 		century = bintobcd(dt->dt_year / 100);
778 		mc146818_write(NULL, centb, century); /* XXX softc */
779 	}
780 	splx(s);
781 	return 0;
782 
783 }
784 
785 static void
786 rtc_register(void)
787 {
788 	static struct todr_chip_handle	tch;
789 	tch.todr_gettime_ymdhms = rtc_get_ymdhms;
790 	tch.todr_settime_ymdhms = rtc_set_ymdhms;
791 	tch.todr_setwen = NULL;
792 
793 	todr_attach(&tch);
794 }
795 
796 void
797 setstatclockrate(int arg)
798 {
799 }
800