1 /* $NetBSD: pmap.h,v 1.33 2010/07/24 00:45:56 jym Exp $ */ 2 3 /* 4 * 5 * Copyright (c) 1997 Charles D. Cranor and Washington University. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgment: 18 * This product includes software developed by Charles D. Cranor and 19 * Washington University. 20 * 4. The name of the author may not be used to endorse or promote products 21 * derived from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 /* 36 * Copyright (c) 2001 Wasabi Systems, Inc. 37 * All rights reserved. 38 * 39 * Written by Frank van der Linden for Wasabi Systems, Inc. 40 * 41 * Redistribution and use in source and binary forms, with or without 42 * modification, are permitted provided that the following conditions 43 * are met: 44 * 1. Redistributions of source code must retain the above copyright 45 * notice, this list of conditions and the following disclaimer. 46 * 2. Redistributions in binary form must reproduce the above copyright 47 * notice, this list of conditions and the following disclaimer in the 48 * documentation and/or other materials provided with the distribution. 49 * 3. All advertising materials mentioning features or use of this software 50 * must display the following acknowledgement: 51 * This product includes software developed for the NetBSD Project by 52 * Wasabi Systems, Inc. 53 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 54 * or promote products derived from this software without specific prior 55 * written permission. 56 * 57 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 58 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 59 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 60 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 61 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 62 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 63 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 64 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 65 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 66 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 67 * POSSIBILITY OF SUCH DAMAGE. 68 */ 69 70 /* 71 * pmap.h: see pmap.c for the history of this pmap module. 72 */ 73 74 #ifndef _X86_PMAP_H_ 75 #define _X86_PMAP_H_ 76 77 #define ptei(VA) (((VA_SIGN_POS(VA)) & L1_MASK) >> L1_SHIFT) 78 79 /* 80 * pl*_pi: index in the ptp page for a pde mapping a VA. 81 * (pl*_i below is the index in the virtual array of all pdes per level) 82 */ 83 #define pl1_pi(VA) (((VA_SIGN_POS(VA)) & L1_MASK) >> L1_SHIFT) 84 #define pl2_pi(VA) (((VA_SIGN_POS(VA)) & L2_MASK) >> L2_SHIFT) 85 #define pl3_pi(VA) (((VA_SIGN_POS(VA)) & L3_MASK) >> L3_SHIFT) 86 #define pl4_pi(VA) (((VA_SIGN_POS(VA)) & L4_MASK) >> L4_SHIFT) 87 88 /* 89 * pl*_i: generate index into pde/pte arrays in virtual space 90 */ 91 #define pl1_i(VA) (((VA_SIGN_POS(VA)) & L1_FRAME) >> L1_SHIFT) 92 #define pl2_i(VA) (((VA_SIGN_POS(VA)) & L2_FRAME) >> L2_SHIFT) 93 #define pl3_i(VA) (((VA_SIGN_POS(VA)) & L3_FRAME) >> L3_SHIFT) 94 #define pl4_i(VA) (((VA_SIGN_POS(VA)) & L4_FRAME) >> L4_SHIFT) 95 #define pl_i(va, lvl) \ 96 (((VA_SIGN_POS(va)) & ptp_masks[(lvl)-1]) >> ptp_shifts[(lvl)-1]) 97 98 #define pl_i_roundup(va, lvl) pl_i((va)+ ~ptp_masks[(lvl)-1], (lvl)) 99 100 /* 101 * PTP macros: 102 * a PTP's index is the PD index of the PDE that points to it 103 * a PTP's offset is the byte-offset in the PTE space that this PTP is at 104 * a PTP's VA is the first VA mapped by that PTP 105 */ 106 107 #define ptp_va2o(va, lvl) (pl_i(va, (lvl)+1) * PAGE_SIZE) 108 109 /* size of a PDP: usually one page, except for PAE */ 110 #ifdef PAE 111 #define PDP_SIZE 4 112 #else 113 #define PDP_SIZE 1 114 #endif 115 116 117 #if defined(_KERNEL) 118 /* 119 * pmap data structures: see pmap.c for details of locking. 120 */ 121 122 /* 123 * we maintain a list of all non-kernel pmaps 124 */ 125 126 LIST_HEAD(pmap_head, pmap); /* struct pmap_head: head of a pmap list */ 127 128 /* 129 * the pmap structure 130 * 131 * note that the pm_obj contains the simple_lock, the reference count, 132 * page list, and number of PTPs within the pmap. 133 * 134 * pm_lock is the same as the spinlock for vm object 0. Changes to 135 * the other objects may only be made if that lock has been taken 136 * (the other object locks are only used when uvm_pagealloc is called) 137 * 138 * XXX If we ever support processor numbers higher than 31, we'll have 139 * XXX to rethink the CPU mask. 140 */ 141 142 struct pmap { 143 struct uvm_object pm_obj[PTP_LEVELS-1]; /* objects for lvl >= 1) */ 144 #define pm_lock pm_obj[0].vmobjlock 145 LIST_ENTRY(pmap) pm_list; /* list (lck by pm_list lock) */ 146 pd_entry_t *pm_pdir; /* VA of PD (lck by object lock) */ 147 paddr_t pm_pdirpa[PDP_SIZE]; /* PA of PDs (read-only after create) */ 148 struct vm_page *pm_ptphint[PTP_LEVELS-1]; 149 /* pointer to a PTP in our pmap */ 150 struct pmap_statistics pm_stats; /* pmap stats (lck by object lock) */ 151 152 #if !defined(__x86_64__) 153 vaddr_t pm_hiexec; /* highest executable mapping */ 154 #endif /* !defined(__x86_64__) */ 155 int pm_flags; /* see below */ 156 157 union descriptor *pm_ldt; /* user-set LDT */ 158 size_t pm_ldt_len; /* size of LDT in bytes */ 159 int pm_ldt_sel; /* LDT selector */ 160 uint32_t pm_cpus; /* mask of CPUs using pmap */ 161 uint32_t pm_kernel_cpus; /* mask of CPUs using kernel part 162 of pmap */ 163 }; 164 165 /* macro to access pm_pdirpa slots */ 166 #ifdef PAE 167 #define pmap_pdirpa(pmap, index) \ 168 ((pmap)->pm_pdirpa[l2tol3(index)] + l2tol2(index) * sizeof(pd_entry_t)) 169 #else 170 #define pmap_pdirpa(pmap, index) \ 171 ((pmap)->pm_pdirpa[0] + (index) * sizeof(pd_entry_t)) 172 #endif 173 174 /* 175 * MD flags that we use for pmap_enter and pmap_kenter_pa: 176 */ 177 178 /* 179 * global kernel variables 180 */ 181 182 /* 183 * PDPpaddr is the physical address of the kernel's PDP. 184 * - i386 non-PAE and amd64: PDPpaddr corresponds directly to the %cr3 185 * value associated to the kernel process, proc0. 186 * - i386 PAE: it still represents the PA of the kernel's PDP (L2). Due to 187 * the L3 PD, it cannot be considered as the equivalent of a %cr3 any more. 188 * - Xen: it corresponds to the PFN of the kernel's PDP. 189 */ 190 extern u_long PDPpaddr; 191 192 extern int pmap_pg_g; /* do we support PG_G? */ 193 extern long nkptp[PTP_LEVELS]; 194 195 /* 196 * macros 197 */ 198 199 #define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count) 200 #define pmap_wired_count(pmap) ((pmap)->pm_stats.wired_count) 201 202 #define pmap_clear_modify(pg) pmap_clear_attrs(pg, PG_M) 203 #define pmap_clear_reference(pg) pmap_clear_attrs(pg, PG_U) 204 #define pmap_copy(DP,SP,D,L,S) 205 #define pmap_is_modified(pg) pmap_test_attrs(pg, PG_M) 206 #define pmap_is_referenced(pg) pmap_test_attrs(pg, PG_U) 207 #define pmap_move(DP,SP,D,L,S) 208 #define pmap_phys_address(ppn) x86_ptob(ppn) 209 #define pmap_valid_entry(E) ((E) & PG_V) /* is PDE or PTE valid? */ 210 211 212 /* 213 * prototypes 214 */ 215 216 void pmap_activate(struct lwp *); 217 void pmap_bootstrap(vaddr_t); 218 bool pmap_clear_attrs(struct vm_page *, unsigned); 219 void pmap_deactivate(struct lwp *); 220 void pmap_page_remove (struct vm_page *); 221 void pmap_remove(struct pmap *, vaddr_t, vaddr_t); 222 bool pmap_test_attrs(struct vm_page *, unsigned); 223 void pmap_write_protect(struct pmap *, vaddr_t, vaddr_t, vm_prot_t); 224 void pmap_load(void); 225 paddr_t pmap_init_tmp_pgtbl(paddr_t); 226 void pmap_remove_all(struct pmap *); 227 void pmap_ldt_sync(struct pmap *); 228 229 void pmap_emap_enter(vaddr_t, paddr_t, vm_prot_t); 230 void pmap_emap_remove(vaddr_t, vsize_t); 231 void pmap_emap_sync(bool); 232 233 void pmap_map_ptes(struct pmap *, struct pmap **, pd_entry_t **, 234 pd_entry_t * const **); 235 void pmap_unmap_ptes(struct pmap *, struct pmap *); 236 237 int pmap_pdes_invalid(vaddr_t, pd_entry_t * const *, pd_entry_t *); 238 239 vaddr_t reserve_dumppages(vaddr_t); /* XXX: not a pmap fn */ 240 241 void pmap_tlb_shootdown(pmap_t, vaddr_t, vaddr_t, pt_entry_t); 242 void pmap_tlb_shootwait(void); 243 244 #define __HAVE_PMAP_EMAP 245 246 #define PMAP_GROWKERNEL /* turn on pmap_growkernel interface */ 247 #define PMAP_FORK /* turn on pmap_fork interface */ 248 249 /* 250 * Do idle page zero'ing uncached to avoid polluting the cache. 251 */ 252 bool pmap_pageidlezero(paddr_t); 253 #define PMAP_PAGEIDLEZERO(pa) pmap_pageidlezero((pa)) 254 255 /* 256 * inline functions 257 */ 258 259 __inline static bool __unused 260 pmap_pdes_valid(vaddr_t va, pd_entry_t * const *pdes, pd_entry_t *lastpde) 261 { 262 return pmap_pdes_invalid(va, pdes, lastpde) == 0; 263 } 264 265 /* 266 * pmap_update_pg: flush one page from the TLB (or flush the whole thing 267 * if hardware doesn't support one-page flushing) 268 */ 269 270 __inline static void __unused 271 pmap_update_pg(vaddr_t va) 272 { 273 invlpg(va); 274 } 275 276 /* 277 * pmap_update_2pg: flush two pages from the TLB 278 */ 279 280 __inline static void __unused 281 pmap_update_2pg(vaddr_t va, vaddr_t vb) 282 { 283 invlpg(va); 284 invlpg(vb); 285 } 286 287 /* 288 * pmap_page_protect: change the protection of all recorded mappings 289 * of a managed page 290 * 291 * => this function is a frontend for pmap_page_remove/pmap_clear_attrs 292 * => we only have to worry about making the page more protected. 293 * unprotecting a page is done on-demand at fault time. 294 */ 295 296 __inline static void __unused 297 pmap_page_protect(struct vm_page *pg, vm_prot_t prot) 298 { 299 if ((prot & VM_PROT_WRITE) == 0) { 300 if (prot & (VM_PROT_READ|VM_PROT_EXECUTE)) { 301 (void) pmap_clear_attrs(pg, PG_RW); 302 } else { 303 pmap_page_remove(pg); 304 } 305 } 306 } 307 308 /* 309 * pmap_protect: change the protection of pages in a pmap 310 * 311 * => this function is a frontend for pmap_remove/pmap_write_protect 312 * => we only have to worry about making the page more protected. 313 * unprotecting a page is done on-demand at fault time. 314 */ 315 316 __inline static void __unused 317 pmap_protect(struct pmap *pmap, vaddr_t sva, vaddr_t eva, vm_prot_t prot) 318 { 319 if ((prot & VM_PROT_WRITE) == 0) { 320 if (prot & (VM_PROT_READ|VM_PROT_EXECUTE)) { 321 pmap_write_protect(pmap, sva, eva, prot); 322 } else { 323 pmap_remove(pmap, sva, eva); 324 } 325 } 326 } 327 328 /* 329 * various address inlines 330 * 331 * vtopte: return a pointer to the PTE mapping a VA, works only for 332 * user and PT addresses 333 * 334 * kvtopte: return a pointer to the PTE mapping a kernel VA 335 */ 336 337 #include <lib/libkern/libkern.h> 338 339 static __inline pt_entry_t * __unused 340 vtopte(vaddr_t va) 341 { 342 343 KASSERT(va < VM_MIN_KERNEL_ADDRESS); 344 345 return (PTE_BASE + pl1_i(va)); 346 } 347 348 static __inline pt_entry_t * __unused 349 kvtopte(vaddr_t va) 350 { 351 pd_entry_t *pde; 352 353 KASSERT(va >= VM_MIN_KERNEL_ADDRESS); 354 355 pde = L2_BASE + pl2_i(va); 356 if (*pde & PG_PS) 357 return ((pt_entry_t *)pde); 358 359 return (PTE_BASE + pl1_i(va)); 360 } 361 362 paddr_t vtophys(vaddr_t); 363 vaddr_t pmap_map(vaddr_t, paddr_t, paddr_t, vm_prot_t); 364 void pmap_cpu_init_early(struct cpu_info *); 365 void pmap_cpu_init_late(struct cpu_info *); 366 bool sse2_idlezero_page(void *); 367 368 369 #ifdef XEN 370 371 #define XPTE_MASK L1_FRAME 372 /* XPTE_SHIFT = L1_SHIFT - log2(sizeof(pt_entry_t)) */ 373 #if defined(__x86_64__) || defined(PAE) 374 #define XPTE_SHIFT 9 375 #else 376 #define XPTE_SHIFT 10 377 #endif 378 379 /* PTE access inline fuctions */ 380 381 /* 382 * Get the machine address of the pointed pte 383 * We use hardware MMU to get value so works only for levels 1-3 384 */ 385 386 static __inline paddr_t 387 xpmap_ptetomach(pt_entry_t *pte) 388 { 389 pt_entry_t *up_pte; 390 vaddr_t va = (vaddr_t) pte; 391 392 va = ((va & XPTE_MASK) >> XPTE_SHIFT) | (vaddr_t) PTE_BASE; 393 up_pte = (pt_entry_t *) va; 394 395 return (paddr_t) (((*up_pte) & PG_FRAME) + (((vaddr_t) pte) & (~PG_FRAME & ~VA_SIGN_MASK))); 396 } 397 398 /* 399 * xpmap_update() 400 * Update an active pt entry with Xen 401 * Equivalent to *pte = npte 402 */ 403 404 static __inline void 405 xpmap_update (pt_entry_t *pte, pt_entry_t npte) 406 { 407 int s = splvm(); 408 409 xpq_queue_pte_update(xpmap_ptetomach(pte), npte); 410 xpq_flush_queue(); 411 splx(s); 412 } 413 414 415 /* Xen helpers to change bits of a pte */ 416 #define XPMAP_UPDATE_DIRECT 1 /* Update direct map entry flags too */ 417 418 paddr_t vtomach(vaddr_t); 419 #define vtomfn(va) (vtomach(va) >> PAGE_SHIFT) 420 421 #endif /* XEN */ 422 423 /* pmap functions with machine addresses */ 424 void pmap_kenter_ma(vaddr_t, paddr_t, vm_prot_t, u_int); 425 int pmap_enter_ma(struct pmap *, vaddr_t, paddr_t, paddr_t, 426 vm_prot_t, u_int, int); 427 bool pmap_extract_ma(pmap_t, vaddr_t, paddr_t *); 428 429 /* 430 * Hooks for the pool allocator. 431 */ 432 #define POOL_VTOPHYS(va) vtophys((vaddr_t) (va)) 433 434 /* 435 * TLB shootdown mailbox. 436 */ 437 438 struct pmap_mbox { 439 volatile void *mb_pointer; 440 volatile uintptr_t mb_addr1; 441 volatile uintptr_t mb_addr2; 442 volatile uintptr_t mb_head; 443 volatile uintptr_t mb_tail; 444 volatile uintptr_t mb_global; 445 }; 446 447 #endif /* _KERNEL */ 448 449 #endif /* _X86_PMAP_H_ */ 450