1 /* $NetBSD: pmap.h,v 1.127 2021/04/30 13:54:26 christos Exp $ */ 2 3 /* 4 * Copyright (c) 1997 Charles D. Cranor and Washington University. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 /* 29 * Copyright (c) 2001 Wasabi Systems, Inc. 30 * All rights reserved. 31 * 32 * Written by Frank van der Linden for Wasabi Systems, Inc. 33 * 34 * Redistribution and use in source and binary forms, with or without 35 * modification, are permitted provided that the following conditions 36 * are met: 37 * 1. Redistributions of source code must retain the above copyright 38 * notice, this list of conditions and the following disclaimer. 39 * 2. Redistributions in binary form must reproduce the above copyright 40 * notice, this list of conditions and the following disclaimer in the 41 * documentation and/or other materials provided with the distribution. 42 * 3. All advertising materials mentioning features or use of this software 43 * must display the following acknowledgement: 44 * This product includes software developed for the NetBSD Project by 45 * Wasabi Systems, Inc. 46 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 47 * or promote products derived from this software without specific prior 48 * written permission. 49 * 50 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 51 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 52 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 53 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 54 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 60 * POSSIBILITY OF SUCH DAMAGE. 61 */ 62 63 /* 64 * pmap.h: see pmap.c for the history of this pmap module. 65 */ 66 67 #ifndef _X86_PMAP_H_ 68 #define _X86_PMAP_H_ 69 70 /* 71 * pl*_pi: index in the ptp page for a pde mapping a VA. 72 * (pl*_i below is the index in the virtual array of all pdes per level) 73 */ 74 #define pl1_pi(VA) (((VA_SIGN_POS(VA)) & L1_MASK) >> L1_SHIFT) 75 #define pl2_pi(VA) (((VA_SIGN_POS(VA)) & L2_MASK) >> L2_SHIFT) 76 #define pl3_pi(VA) (((VA_SIGN_POS(VA)) & L3_MASK) >> L3_SHIFT) 77 #define pl4_pi(VA) (((VA_SIGN_POS(VA)) & L4_MASK) >> L4_SHIFT) 78 #define pl_pi(va, lvl) \ 79 (((VA_SIGN_POS(va)) & ptp_masks[(lvl)-1]) >> ptp_shifts[(lvl)-1]) 80 81 /* 82 * pl*_i: generate index into pde/pte arrays in virtual space 83 * 84 * pl_i(va, X) == plX_i(va) <= pl_i_roundup(va, X) 85 */ 86 #define pl1_i(VA) (((VA_SIGN_POS(VA)) & L1_FRAME) >> L1_SHIFT) 87 #define pl2_i(VA) (((VA_SIGN_POS(VA)) & L2_FRAME) >> L2_SHIFT) 88 #define pl3_i(VA) (((VA_SIGN_POS(VA)) & L3_FRAME) >> L3_SHIFT) 89 #define pl4_i(VA) (((VA_SIGN_POS(VA)) & L4_FRAME) >> L4_SHIFT) 90 #define pl_i(va, lvl) \ 91 (((VA_SIGN_POS(va)) & ptp_frames[(lvl)-1]) >> ptp_shifts[(lvl)-1]) 92 93 #define pl_i_roundup(va, lvl) pl_i((va)+ ~ptp_frames[(lvl)-1], (lvl)) 94 95 /* 96 * PTP macros: 97 * a PTP's index is the PD index of the PDE that points to it 98 * a PTP's offset is the byte-offset in the PTE space that this PTP is at 99 * a PTP's VA is the first VA mapped by that PTP 100 */ 101 102 #define ptp_va2o(va, lvl) (pl_i(va, (lvl)+1) * PAGE_SIZE) 103 104 /* size of a PDP: usually one page, except for PAE */ 105 #ifdef PAE 106 #define PDP_SIZE 4 107 #else 108 #define PDP_SIZE 1 109 #endif 110 111 112 #if defined(_KERNEL) 113 #include <sys/kcpuset.h> 114 #include <sys/rwlock.h> 115 #include <x86/pmap_pv.h> 116 #include <uvm/pmap/pmap_pvt.h> 117 118 #define PATENTRY(n, type) (type << ((n) * 8)) 119 #define PAT_UC 0x0ULL 120 #define PAT_WC 0x1ULL 121 #define PAT_WT 0x4ULL 122 #define PAT_WP 0x5ULL 123 #define PAT_WB 0x6ULL 124 #define PAT_UCMINUS 0x7ULL 125 126 #define BTSEG_NONE 0 127 #define BTSEG_TEXT 1 128 #define BTSEG_RODATA 2 129 #define BTSEG_DATA 3 130 #define BTSPACE_NSEGS 64 131 132 struct bootspace { 133 struct { 134 vaddr_t va; 135 paddr_t pa; 136 size_t sz; 137 } head; 138 139 /* Kernel segments. */ 140 struct { 141 int type; 142 vaddr_t va; 143 paddr_t pa; 144 size_t sz; 145 } segs[BTSPACE_NSEGS]; 146 147 /* 148 * The area used by the early kernel bootstrap. It contains the kernel 149 * symbols, the preloaded modules, the bootstrap tables, and the ISA I/O 150 * mem. 151 */ 152 struct { 153 vaddr_t va; 154 paddr_t pa; 155 size_t sz; 156 } boot; 157 158 /* A magic VA usable by the bootstrap code. */ 159 vaddr_t spareva; 160 161 /* Virtual address of the page directory. */ 162 vaddr_t pdir; 163 164 /* Area dedicated to kernel modules (amd64 only). */ 165 vaddr_t smodule; 166 vaddr_t emodule; 167 }; 168 169 #define SLAREA_USER 0 170 #define SLAREA_PTE 1 171 #define SLAREA_MAIN 2 172 #define SLAREA_PCPU 3 173 #define SLAREA_DMAP 4 174 #define SLAREA_HYPV 5 175 #define SLAREA_ASAN 6 176 #define SLAREA_MSAN 7 177 #define SLAREA_KERN 8 178 #define SLSPACE_NAREAS 9 179 180 struct slotspace { 181 struct { 182 size_t sslot; /* start slot */ 183 size_t nslot; /* # of slots */ 184 bool active; /* area is active */ 185 } area[SLSPACE_NAREAS]; 186 }; 187 188 extern struct slotspace slotspace; 189 190 #include <x86/gdt.h> 191 192 struct pcpu_entry { 193 uint8_t gdt[MAXGDTSIZ]; 194 uint8_t ldt[MAX_USERLDT_SIZE]; 195 uint8_t idt[PAGE_SIZE]; 196 uint8_t tss[PAGE_SIZE]; 197 uint8_t ist0[PAGE_SIZE]; 198 uint8_t ist1[PAGE_SIZE]; 199 uint8_t ist2[PAGE_SIZE]; 200 uint8_t ist3[PAGE_SIZE]; 201 uint8_t rsp0[2 * PAGE_SIZE]; 202 } __packed; 203 204 struct pcpu_area { 205 #ifdef SVS 206 uint8_t utls[PAGE_SIZE]; 207 #endif 208 uint8_t ldt[PAGE_SIZE]; 209 struct pcpu_entry ent[MAXCPUS]; 210 } __packed; 211 212 extern struct pcpu_area *pcpuarea; 213 214 #define PMAP_PCID_KERN 0 215 #define PMAP_PCID_USER 1 216 217 /* 218 * pmap data structures: see pmap.c for details of locking. 219 */ 220 221 /* 222 * we maintain a list of all non-kernel pmaps 223 */ 224 225 LIST_HEAD(pmap_head, pmap); /* struct pmap_head: head of a pmap list */ 226 227 /* 228 * linked list of all non-kernel pmaps 229 */ 230 extern struct pmap_head pmaps; 231 extern kmutex_t pmaps_lock; /* protects pmaps */ 232 233 /* 234 * pool_cache(9) that pmaps are allocated from 235 */ 236 extern struct pool_cache pmap_cache; 237 238 /* 239 * the pmap structure 240 * 241 * note that the pm_obj contains the lock pointer, the reference count, 242 * page list, and number of PTPs within the pmap. 243 * 244 * pm_lock is the same as the lock for vm object 0. Changes to 245 * the other objects may only be made if that lock has been taken 246 * (the other object locks are only used when uvm_pagealloc is called) 247 */ 248 249 struct pv_page; 250 251 struct pmap { 252 struct uvm_object pm_obj[PTP_LEVELS-1];/* objects for lvl >= 1) */ 253 LIST_ENTRY(pmap) pm_list; /* list of all pmaps */ 254 pd_entry_t *pm_pdir; /* VA of PD */ 255 paddr_t pm_pdirpa[PDP_SIZE]; /* PA of PDs (read-only after create) */ 256 struct vm_page *pm_ptphint[PTP_LEVELS-1]; 257 /* pointer to a PTP in our pmap */ 258 struct pmap_statistics pm_stats; /* pmap stats */ 259 struct pv_entry *pm_pve; /* spare pv_entry */ 260 LIST_HEAD(, pv_page) pm_pvp_part; 261 LIST_HEAD(, pv_page) pm_pvp_empty; 262 LIST_HEAD(, pv_page) pm_pvp_full; 263 264 #if !defined(__x86_64__) 265 vaddr_t pm_hiexec; /* highest executable mapping */ 266 #endif /* !defined(__x86_64__) */ 267 268 union descriptor *pm_ldt; /* user-set LDT */ 269 size_t pm_ldt_len; /* XXX unused, remove */ 270 int pm_ldt_sel; /* LDT selector */ 271 272 kcpuset_t *pm_cpus; /* mask of CPUs using pmap */ 273 kcpuset_t *pm_kernel_cpus; /* mask of CPUs using kernel part 274 of pmap */ 275 kcpuset_t *pm_xen_ptp_cpus; /* mask of CPUs which have this pmap's 276 ptp mapped */ 277 uint64_t pm_ncsw; /* for assertions */ 278 LIST_HEAD(,vm_page) pm_gc_ptp; /* PTPs queued for free */ 279 280 /* Used by NVMM and Xen */ 281 int (*pm_enter)(struct pmap *, vaddr_t, paddr_t, vm_prot_t, u_int); 282 bool (*pm_extract)(struct pmap *, vaddr_t, paddr_t *); 283 void (*pm_remove)(struct pmap *, vaddr_t, vaddr_t); 284 int (*pm_sync_pv)(struct vm_page *, vaddr_t, paddr_t, int, uint8_t *, 285 pt_entry_t *); 286 void (*pm_pp_remove_ent)(struct pmap *, struct vm_page *, pt_entry_t, 287 vaddr_t); 288 void (*pm_write_protect)(struct pmap *, vaddr_t, vaddr_t, vm_prot_t); 289 void (*pm_unwire)(struct pmap *, vaddr_t); 290 291 void (*pm_tlb_flush)(struct pmap *); 292 void *pm_data; 293 294 kmutex_t pm_lock /* locks for pm_objs */ 295 __aligned(64); /* give lock own cache line */ 296 krwlock_t pm_dummy_lock; /* ugly hack for abusing uvm_object */ 297 }; 298 299 /* macro to access pm_pdirpa slots */ 300 #ifdef PAE 301 #define pmap_pdirpa(pmap, index) \ 302 ((pmap)->pm_pdirpa[l2tol3(index)] + l2tol2(index) * sizeof(pd_entry_t)) 303 #else 304 #define pmap_pdirpa(pmap, index) \ 305 ((pmap)->pm_pdirpa[0] + (index) * sizeof(pd_entry_t)) 306 #endif 307 308 /* 309 * MD flags that we use for pmap_enter and pmap_kenter_pa: 310 */ 311 312 /* 313 * global kernel variables 314 */ 315 316 /* 317 * PDPpaddr is the physical address of the kernel's PDP. 318 * - i386 non-PAE and amd64: PDPpaddr corresponds directly to the %cr3 319 * value associated to the kernel process, proc0. 320 * - i386 PAE: it still represents the PA of the kernel's PDP (L2). Due to 321 * the L3 PD, it cannot be considered as the equivalent of a %cr3 any more. 322 * - Xen: it corresponds to the PFN of the kernel's PDP. 323 */ 324 extern u_long PDPpaddr; 325 326 extern pd_entry_t pmap_pg_g; /* do we support PTE_G? */ 327 extern pd_entry_t pmap_pg_nx; /* do we support PTE_NX? */ 328 extern int pmap_largepages; 329 extern long nkptp[PTP_LEVELS]; 330 331 /* 332 * macros 333 */ 334 335 #define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count) 336 #define pmap_wired_count(pmap) ((pmap)->pm_stats.wired_count) 337 338 #define pmap_clear_modify(pg) pmap_clear_attrs(pg, PP_ATTRS_D) 339 #define pmap_clear_reference(pg) pmap_clear_attrs(pg, PP_ATTRS_A) 340 #define pmap_copy(DP,SP,D,L,S) __USE(L) 341 #define pmap_is_modified(pg) pmap_test_attrs(pg, PP_ATTRS_D) 342 #define pmap_is_referenced(pg) pmap_test_attrs(pg, PP_ATTRS_A) 343 #define pmap_move(DP,SP,D,L,S) 344 #define pmap_phys_address(ppn) (x86_ptob(ppn) & ~X86_MMAP_FLAG_MASK) 345 #define pmap_mmap_flags(ppn) x86_mmap_flags(ppn) 346 #define pmap_valid_entry(E) ((E) & PTE_P) /* is PDE or PTE valid? */ 347 348 #if defined(__x86_64__) || defined(PAE) 349 #define X86_MMAP_FLAG_SHIFT (64 - PGSHIFT) 350 #else 351 #define X86_MMAP_FLAG_SHIFT (32 - PGSHIFT) 352 #endif 353 354 #define X86_MMAP_FLAG_MASK 0xf 355 #define X86_MMAP_FLAG_PREFETCH 0x1 356 357 /* 358 * prototypes 359 */ 360 361 void pmap_activate(struct lwp *); 362 void pmap_bootstrap(vaddr_t); 363 bool pmap_clear_attrs(struct vm_page *, unsigned); 364 bool pmap_pv_clear_attrs(paddr_t, unsigned); 365 void pmap_deactivate(struct lwp *); 366 void pmap_page_remove(struct vm_page *); 367 void pmap_pv_remove(paddr_t); 368 void pmap_remove(struct pmap *, vaddr_t, vaddr_t); 369 bool pmap_test_attrs(struct vm_page *, unsigned); 370 void pmap_write_protect(struct pmap *, vaddr_t, vaddr_t, vm_prot_t); 371 void pmap_load(void); 372 paddr_t pmap_init_tmp_pgtbl(paddr_t); 373 bool pmap_remove_all(struct pmap *); 374 void pmap_ldt_cleanup(struct lwp *); 375 void pmap_ldt_sync(struct pmap *); 376 void pmap_kremove_local(vaddr_t, vsize_t); 377 378 #define __HAVE_PMAP_PV_TRACK 1 379 void pmap_pv_init(void); 380 void pmap_pv_track(paddr_t, psize_t); 381 void pmap_pv_untrack(paddr_t, psize_t); 382 383 void pmap_map_ptes(struct pmap *, struct pmap **, pd_entry_t **, 384 pd_entry_t * const **); 385 void pmap_unmap_ptes(struct pmap *, struct pmap *); 386 387 bool pmap_pdes_valid(vaddr_t, pd_entry_t * const *, pd_entry_t *, 388 int *lastlvl); 389 390 u_int x86_mmap_flags(paddr_t); 391 392 bool pmap_is_curpmap(struct pmap *); 393 394 void pmap_ept_transform(struct pmap *); 395 396 #ifndef __HAVE_DIRECT_MAP 397 void pmap_vpage_cpu_init(struct cpu_info *); 398 #endif 399 vaddr_t slotspace_rand(int, size_t, size_t, size_t, vaddr_t); 400 401 vaddr_t reserve_dumppages(vaddr_t); /* XXX: not a pmap fn */ 402 403 typedef enum tlbwhy { 404 TLBSHOOT_REMOVE_ALL, 405 TLBSHOOT_KENTER, 406 TLBSHOOT_KREMOVE, 407 TLBSHOOT_FREE_PTP, 408 TLBSHOOT_REMOVE_PTE, 409 TLBSHOOT_SYNC_PV, 410 TLBSHOOT_WRITE_PROTECT, 411 TLBSHOOT_ENTER, 412 TLBSHOOT_NVMM, 413 TLBSHOOT_BUS_DMA, 414 TLBSHOOT_BUS_SPACE, 415 TLBSHOOT__MAX, 416 } tlbwhy_t; 417 418 void pmap_tlb_init(void); 419 void pmap_tlb_cpu_init(struct cpu_info *); 420 void pmap_tlb_shootdown(pmap_t, vaddr_t, pt_entry_t, tlbwhy_t); 421 void pmap_tlb_shootnow(void); 422 void pmap_tlb_intr(void); 423 424 #define PMAP_GROWKERNEL /* turn on pmap_growkernel interface */ 425 #define PMAP_FORK /* turn on pmap_fork interface */ 426 427 /* 428 * inline functions 429 */ 430 431 /* 432 * pmap_update_pg: flush one page from the TLB (or flush the whole thing 433 * if hardware doesn't support one-page flushing) 434 */ 435 436 __inline static void __unused 437 pmap_update_pg(vaddr_t va) 438 { 439 invlpg(va); 440 } 441 442 /* 443 * pmap_page_protect: change the protection of all recorded mappings 444 * of a managed page 445 * 446 * => this function is a frontend for pmap_page_remove/pmap_clear_attrs 447 * => we only have to worry about making the page more protected. 448 * unprotecting a page is done on-demand at fault time. 449 */ 450 451 __inline static void __unused 452 pmap_page_protect(struct vm_page *pg, vm_prot_t prot) 453 { 454 if ((prot & VM_PROT_WRITE) == 0) { 455 if (prot & (VM_PROT_READ|VM_PROT_EXECUTE)) { 456 (void)pmap_clear_attrs(pg, PP_ATTRS_W); 457 } else { 458 pmap_page_remove(pg); 459 } 460 } 461 } 462 463 /* 464 * pmap_pv_protect: change the protection of all recorded mappings 465 * of an unmanaged page 466 */ 467 468 __inline static void __unused 469 pmap_pv_protect(paddr_t pa, vm_prot_t prot) 470 { 471 if ((prot & VM_PROT_WRITE) == 0) { 472 if (prot & (VM_PROT_READ|VM_PROT_EXECUTE)) { 473 (void)pmap_pv_clear_attrs(pa, PP_ATTRS_W); 474 } else { 475 pmap_pv_remove(pa); 476 } 477 } 478 } 479 480 /* 481 * pmap_protect: change the protection of pages in a pmap 482 * 483 * => this function is a frontend for pmap_remove/pmap_write_protect 484 * => we only have to worry about making the page more protected. 485 * unprotecting a page is done on-demand at fault time. 486 */ 487 488 __inline static void __unused 489 pmap_protect(struct pmap *pmap, vaddr_t sva, vaddr_t eva, vm_prot_t prot) 490 { 491 if ((prot & VM_PROT_WRITE) == 0) { 492 if (prot & (VM_PROT_READ|VM_PROT_EXECUTE)) { 493 pmap_write_protect(pmap, sva, eva, prot); 494 } else { 495 pmap_remove(pmap, sva, eva); 496 } 497 } 498 } 499 500 /* 501 * various address inlines 502 * 503 * vtopte: return a pointer to the PTE mapping a VA, works only for 504 * user and PT addresses 505 * 506 * kvtopte: return a pointer to the PTE mapping a kernel VA 507 */ 508 509 #include <lib/libkern/libkern.h> 510 511 static __inline pt_entry_t * __unused 512 vtopte(vaddr_t va) 513 { 514 515 KASSERT(va < VM_MIN_KERNEL_ADDRESS); 516 517 return (PTE_BASE + pl1_i(va)); 518 } 519 520 static __inline pt_entry_t * __unused 521 kvtopte(vaddr_t va) 522 { 523 pd_entry_t *pde; 524 525 KASSERT(va >= VM_MIN_KERNEL_ADDRESS); 526 527 pde = L2_BASE + pl2_i(va); 528 if (*pde & PTE_PS) 529 return ((pt_entry_t *)pde); 530 531 return (PTE_BASE + pl1_i(va)); 532 } 533 534 paddr_t vtophys(vaddr_t); 535 vaddr_t pmap_map(vaddr_t, paddr_t, paddr_t, vm_prot_t); 536 void pmap_cpu_init_late(struct cpu_info *); 537 538 #ifdef XENPV 539 #include <sys/bitops.h> 540 541 #define XPTE_MASK L1_FRAME 542 /* Selects the index of a PTE in (A)PTE_BASE */ 543 #define XPTE_SHIFT (L1_SHIFT - ilog2(sizeof(pt_entry_t))) 544 545 /* PTE access inline fuctions */ 546 547 /* 548 * Get the machine address of the pointed pte 549 * We use hardware MMU to get value so works only for levels 1-3 550 */ 551 552 static __inline paddr_t 553 xpmap_ptetomach(pt_entry_t *pte) 554 { 555 pt_entry_t *up_pte; 556 vaddr_t va = (vaddr_t) pte; 557 558 va = ((va & XPTE_MASK) >> XPTE_SHIFT) | (vaddr_t) PTE_BASE; 559 up_pte = (pt_entry_t *) va; 560 561 return (paddr_t) (((*up_pte) & PTE_FRAME) + (((vaddr_t) pte) & (~PTE_FRAME & ~VA_SIGN_MASK))); 562 } 563 564 /* Xen helpers to change bits of a pte */ 565 #define XPMAP_UPDATE_DIRECT 1 /* Update direct map entry flags too */ 566 567 paddr_t vtomach(vaddr_t); 568 #define vtomfn(va) (vtomach(va) >> PAGE_SHIFT) 569 #endif /* XENPV */ 570 571 /* pmap functions with machine addresses */ 572 void pmap_kenter_ma(vaddr_t, paddr_t, vm_prot_t, u_int); 573 int pmap_enter_ma(struct pmap *, vaddr_t, paddr_t, paddr_t, 574 vm_prot_t, u_int, int); 575 bool pmap_extract_ma(pmap_t, vaddr_t, paddr_t *); 576 577 paddr_t pmap_get_physpage(void); 578 579 /* 580 * Hooks for the pool allocator. 581 */ 582 #define POOL_VTOPHYS(va) vtophys((vaddr_t) (va)) 583 584 #ifdef __HAVE_PCPU_AREA 585 extern struct pcpu_area *pcpuarea; 586 #define PDIR_SLOT_PCPU 510 587 #define PMAP_PCPU_BASE (VA_SIGN_NEG((PDIR_SLOT_PCPU * NBPD_L4))) 588 #endif 589 590 #ifdef __HAVE_DIRECT_MAP 591 592 extern vaddr_t pmap_direct_base; 593 extern vaddr_t pmap_direct_end; 594 595 #define PMAP_DIRECT_BASE pmap_direct_base 596 #define PMAP_DIRECT_END pmap_direct_end 597 598 #define PMAP_DIRECT_MAP(pa) ((vaddr_t)PMAP_DIRECT_BASE + (pa)) 599 #define PMAP_DIRECT_UNMAP(va) ((paddr_t)(va) - PMAP_DIRECT_BASE) 600 601 /* 602 * Alternate mapping hooks for pool pages. 603 */ 604 #define PMAP_MAP_POOLPAGE(pa) PMAP_DIRECT_MAP((pa)) 605 #define PMAP_UNMAP_POOLPAGE(va) PMAP_DIRECT_UNMAP((va)) 606 607 #endif /* __HAVE_DIRECT_MAP */ 608 609 void svs_quad_copy(void *, void *, long); 610 611 #endif /* _KERNEL */ 612 613 #endif /* _X86_PMAP_H_ */ 614