1 /* $NetBSD: pmap.h,v 1.40 2011/06/13 04:30:40 tls Exp $ */ 2 3 /* 4 * Copyright (c) 1997 Charles D. Cranor and Washington University. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 /* 29 * Copyright (c) 2001 Wasabi Systems, Inc. 30 * All rights reserved. 31 * 32 * Written by Frank van der Linden for Wasabi Systems, Inc. 33 * 34 * Redistribution and use in source and binary forms, with or without 35 * modification, are permitted provided that the following conditions 36 * are met: 37 * 1. Redistributions of source code must retain the above copyright 38 * notice, this list of conditions and the following disclaimer. 39 * 2. Redistributions in binary form must reproduce the above copyright 40 * notice, this list of conditions and the following disclaimer in the 41 * documentation and/or other materials provided with the distribution. 42 * 3. All advertising materials mentioning features or use of this software 43 * must display the following acknowledgement: 44 * This product includes software developed for the NetBSD Project by 45 * Wasabi Systems, Inc. 46 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 47 * or promote products derived from this software without specific prior 48 * written permission. 49 * 50 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 51 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 52 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 53 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 54 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 60 * POSSIBILITY OF SUCH DAMAGE. 61 */ 62 63 /* 64 * pmap.h: see pmap.c for the history of this pmap module. 65 */ 66 67 #ifndef _X86_PMAP_H_ 68 #define _X86_PMAP_H_ 69 70 /* 71 * pl*_pi: index in the ptp page for a pde mapping a VA. 72 * (pl*_i below is the index in the virtual array of all pdes per level) 73 */ 74 #define pl1_pi(VA) (((VA_SIGN_POS(VA)) & L1_MASK) >> L1_SHIFT) 75 #define pl2_pi(VA) (((VA_SIGN_POS(VA)) & L2_MASK) >> L2_SHIFT) 76 #define pl3_pi(VA) (((VA_SIGN_POS(VA)) & L3_MASK) >> L3_SHIFT) 77 #define pl4_pi(VA) (((VA_SIGN_POS(VA)) & L4_MASK) >> L4_SHIFT) 78 79 /* 80 * pl*_i: generate index into pde/pte arrays in virtual space 81 * 82 * pl_i(va, X) == plX_i(va) <= pl_i_roundup(va, X) 83 */ 84 #define pl1_i(VA) (((VA_SIGN_POS(VA)) & L1_FRAME) >> L1_SHIFT) 85 #define pl2_i(VA) (((VA_SIGN_POS(VA)) & L2_FRAME) >> L2_SHIFT) 86 #define pl3_i(VA) (((VA_SIGN_POS(VA)) & L3_FRAME) >> L3_SHIFT) 87 #define pl4_i(VA) (((VA_SIGN_POS(VA)) & L4_FRAME) >> L4_SHIFT) 88 #define pl_i(va, lvl) \ 89 (((VA_SIGN_POS(va)) & ptp_masks[(lvl)-1]) >> ptp_shifts[(lvl)-1]) 90 91 #define pl_i_roundup(va, lvl) pl_i((va)+ ~ptp_masks[(lvl)-1], (lvl)) 92 93 /* 94 * PTP macros: 95 * a PTP's index is the PD index of the PDE that points to it 96 * a PTP's offset is the byte-offset in the PTE space that this PTP is at 97 * a PTP's VA is the first VA mapped by that PTP 98 */ 99 100 #define ptp_va2o(va, lvl) (pl_i(va, (lvl)+1) * PAGE_SIZE) 101 102 /* size of a PDP: usually one page, except for PAE */ 103 #ifdef PAE 104 #define PDP_SIZE 4 105 #else 106 #define PDP_SIZE 1 107 #endif 108 109 110 #if defined(_KERNEL) 111 /* 112 * pmap data structures: see pmap.c for details of locking. 113 */ 114 115 /* 116 * we maintain a list of all non-kernel pmaps 117 */ 118 119 LIST_HEAD(pmap_head, pmap); /* struct pmap_head: head of a pmap list */ 120 121 /* 122 * the pmap structure 123 * 124 * note that the pm_obj contains the lock pointer, the reference count, 125 * page list, and number of PTPs within the pmap. 126 * 127 * pm_lock is the same as the lock for vm object 0. Changes to 128 * the other objects may only be made if that lock has been taken 129 * (the other object locks are only used when uvm_pagealloc is called) 130 * 131 * XXX If we ever support processor numbers higher than 31, we'll have 132 * XXX to rethink the CPU mask. 133 */ 134 135 struct pmap { 136 struct uvm_object pm_obj[PTP_LEVELS-1]; /* objects for lvl >= 1) */ 137 #define pm_lock pm_obj[0].vmobjlock 138 kmutex_t pm_obj_lock[PTP_LEVELS-1]; /* locks for pm_objs */ 139 LIST_ENTRY(pmap) pm_list; /* list (lck by pm_list lock) */ 140 pd_entry_t *pm_pdir; /* VA of PD (lck by object lock) */ 141 paddr_t pm_pdirpa[PDP_SIZE]; /* PA of PDs (read-only after create) */ 142 struct vm_page *pm_ptphint[PTP_LEVELS-1]; 143 /* pointer to a PTP in our pmap */ 144 struct pmap_statistics pm_stats; /* pmap stats (lck by object lock) */ 145 146 #if !defined(__x86_64__) 147 vaddr_t pm_hiexec; /* highest executable mapping */ 148 #endif /* !defined(__x86_64__) */ 149 int pm_flags; /* see below */ 150 151 union descriptor *pm_ldt; /* user-set LDT */ 152 size_t pm_ldt_len; /* size of LDT in bytes */ 153 int pm_ldt_sel; /* LDT selector */ 154 uint32_t pm_cpus; /* mask of CPUs using pmap */ 155 uint32_t pm_kernel_cpus; /* mask of CPUs using kernel part 156 of pmap */ 157 uint64_t pm_ncsw; /* for assertions */ 158 struct vm_page *pm_gc_ptp; /* pages from pmap g/c */ 159 }; 160 161 /* macro to access pm_pdirpa slots */ 162 #ifdef PAE 163 #define pmap_pdirpa(pmap, index) \ 164 ((pmap)->pm_pdirpa[l2tol3(index)] + l2tol2(index) * sizeof(pd_entry_t)) 165 #else 166 #define pmap_pdirpa(pmap, index) \ 167 ((pmap)->pm_pdirpa[0] + (index) * sizeof(pd_entry_t)) 168 #endif 169 170 /* 171 * MD flags that we use for pmap_enter and pmap_kenter_pa: 172 */ 173 174 /* 175 * global kernel variables 176 */ 177 178 /* 179 * PDPpaddr is the physical address of the kernel's PDP. 180 * - i386 non-PAE and amd64: PDPpaddr corresponds directly to the %cr3 181 * value associated to the kernel process, proc0. 182 * - i386 PAE: it still represents the PA of the kernel's PDP (L2). Due to 183 * the L3 PD, it cannot be considered as the equivalent of a %cr3 any more. 184 * - Xen: it corresponds to the PFN of the kernel's PDP. 185 */ 186 extern u_long PDPpaddr; 187 188 extern int pmap_pg_g; /* do we support PG_G? */ 189 extern long nkptp[PTP_LEVELS]; 190 191 /* 192 * macros 193 */ 194 195 #define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count) 196 #define pmap_wired_count(pmap) ((pmap)->pm_stats.wired_count) 197 198 #define pmap_clear_modify(pg) pmap_clear_attrs(pg, PG_M) 199 #define pmap_clear_reference(pg) pmap_clear_attrs(pg, PG_U) 200 #define pmap_copy(DP,SP,D,L,S) 201 #define pmap_is_modified(pg) pmap_test_attrs(pg, PG_M) 202 #define pmap_is_referenced(pg) pmap_test_attrs(pg, PG_U) 203 #define pmap_move(DP,SP,D,L,S) 204 #define pmap_phys_address(ppn) (x86_ptob(ppn) & ~X86_MMAP_FLAG_MASK) 205 #define pmap_mmap_flags(ppn) x86_mmap_flags(ppn) 206 #define pmap_valid_entry(E) ((E) & PG_V) /* is PDE or PTE valid? */ 207 208 #if defined(__x86_64__) || defined(PAE) 209 #define X86_MMAP_FLAG_SHIFT (64 - PGSHIFT) 210 #else 211 #define X86_MMAP_FLAG_SHIFT (32 - PGSHIFT) 212 #endif 213 214 #define X86_MMAP_FLAG_MASK 0xf 215 #define X86_MMAP_FLAG_PREFETCH 0x1 216 217 /* 218 * prototypes 219 */ 220 221 void pmap_activate(struct lwp *); 222 void pmap_bootstrap(vaddr_t); 223 bool pmap_clear_attrs(struct vm_page *, unsigned); 224 void pmap_deactivate(struct lwp *); 225 void pmap_page_remove (struct vm_page *); 226 void pmap_remove(struct pmap *, vaddr_t, vaddr_t); 227 bool pmap_test_attrs(struct vm_page *, unsigned); 228 void pmap_write_protect(struct pmap *, vaddr_t, vaddr_t, vm_prot_t); 229 void pmap_load(void); 230 paddr_t pmap_init_tmp_pgtbl(paddr_t); 231 void pmap_remove_all(struct pmap *); 232 void pmap_ldt_sync(struct pmap *); 233 234 void pmap_emap_enter(vaddr_t, paddr_t, vm_prot_t); 235 void pmap_emap_remove(vaddr_t, vsize_t); 236 void pmap_emap_sync(bool); 237 238 void pmap_map_ptes(struct pmap *, struct pmap **, pd_entry_t **, 239 pd_entry_t * const **); 240 void pmap_unmap_ptes(struct pmap *, struct pmap *); 241 242 int pmap_pdes_invalid(vaddr_t, pd_entry_t * const *, pd_entry_t *); 243 244 u_int x86_mmap_flags(paddr_t); 245 246 bool pmap_is_curpmap(struct pmap *); 247 248 vaddr_t reserve_dumppages(vaddr_t); /* XXX: not a pmap fn */ 249 250 typedef enum tlbwhy { 251 TLBSHOOT_APTE, 252 TLBSHOOT_KENTER, 253 TLBSHOOT_KREMOVE, 254 TLBSHOOT_FREE_PTP1, 255 TLBSHOOT_FREE_PTP2, 256 TLBSHOOT_REMOVE_PTE, 257 TLBSHOOT_REMOVE_PTES, 258 TLBSHOOT_SYNC_PV1, 259 TLBSHOOT_SYNC_PV2, 260 TLBSHOOT_WRITE_PROTECT, 261 TLBSHOOT_ENTER, 262 TLBSHOOT_UPDATE, 263 TLBSHOOT_BUS_DMA, 264 TLBSHOOT_BUS_SPACE, 265 TLBSHOOT__MAX, 266 } tlbwhy_t; 267 268 void pmap_tlb_init(void); 269 void pmap_tlb_shootdown(pmap_t, vaddr_t, pt_entry_t, tlbwhy_t); 270 void pmap_tlb_shootnow(void); 271 void pmap_tlb_intr(void); 272 273 #define __HAVE_PMAP_EMAP 274 275 #define PMAP_GROWKERNEL /* turn on pmap_growkernel interface */ 276 #define PMAP_FORK /* turn on pmap_fork interface */ 277 278 /* 279 * Do idle page zero'ing uncached to avoid polluting the cache. 280 */ 281 bool pmap_pageidlezero(paddr_t); 282 #define PMAP_PAGEIDLEZERO(pa) pmap_pageidlezero((pa)) 283 284 /* 285 * inline functions 286 */ 287 288 __inline static bool __unused 289 pmap_pdes_valid(vaddr_t va, pd_entry_t * const *pdes, pd_entry_t *lastpde) 290 { 291 return pmap_pdes_invalid(va, pdes, lastpde) == 0; 292 } 293 294 /* 295 * pmap_update_pg: flush one page from the TLB (or flush the whole thing 296 * if hardware doesn't support one-page flushing) 297 */ 298 299 __inline static void __unused 300 pmap_update_pg(vaddr_t va) 301 { 302 invlpg(va); 303 } 304 305 /* 306 * pmap_update_2pg: flush two pages from the TLB 307 */ 308 309 __inline static void __unused 310 pmap_update_2pg(vaddr_t va, vaddr_t vb) 311 { 312 invlpg(va); 313 invlpg(vb); 314 } 315 316 /* 317 * pmap_page_protect: change the protection of all recorded mappings 318 * of a managed page 319 * 320 * => this function is a frontend for pmap_page_remove/pmap_clear_attrs 321 * => we only have to worry about making the page more protected. 322 * unprotecting a page is done on-demand at fault time. 323 */ 324 325 __inline static void __unused 326 pmap_page_protect(struct vm_page *pg, vm_prot_t prot) 327 { 328 if ((prot & VM_PROT_WRITE) == 0) { 329 if (prot & (VM_PROT_READ|VM_PROT_EXECUTE)) { 330 (void) pmap_clear_attrs(pg, PG_RW); 331 } else { 332 pmap_page_remove(pg); 333 } 334 } 335 } 336 337 /* 338 * pmap_protect: change the protection of pages in a pmap 339 * 340 * => this function is a frontend for pmap_remove/pmap_write_protect 341 * => we only have to worry about making the page more protected. 342 * unprotecting a page is done on-demand at fault time. 343 */ 344 345 __inline static void __unused 346 pmap_protect(struct pmap *pmap, vaddr_t sva, vaddr_t eva, vm_prot_t prot) 347 { 348 if ((prot & VM_PROT_WRITE) == 0) { 349 if (prot & (VM_PROT_READ|VM_PROT_EXECUTE)) { 350 pmap_write_protect(pmap, sva, eva, prot); 351 } else { 352 pmap_remove(pmap, sva, eva); 353 } 354 } 355 } 356 357 /* 358 * various address inlines 359 * 360 * vtopte: return a pointer to the PTE mapping a VA, works only for 361 * user and PT addresses 362 * 363 * kvtopte: return a pointer to the PTE mapping a kernel VA 364 */ 365 366 #include <lib/libkern/libkern.h> 367 368 static __inline pt_entry_t * __unused 369 vtopte(vaddr_t va) 370 { 371 372 KASSERT(va < VM_MIN_KERNEL_ADDRESS); 373 374 return (PTE_BASE + pl1_i(va)); 375 } 376 377 static __inline pt_entry_t * __unused 378 kvtopte(vaddr_t va) 379 { 380 pd_entry_t *pde; 381 382 KASSERT(va >= VM_MIN_KERNEL_ADDRESS); 383 384 pde = L2_BASE + pl2_i(va); 385 if (*pde & PG_PS) 386 return ((pt_entry_t *)pde); 387 388 return (PTE_BASE + pl1_i(va)); 389 } 390 391 paddr_t vtophys(vaddr_t); 392 vaddr_t pmap_map(vaddr_t, paddr_t, paddr_t, vm_prot_t); 393 void pmap_cpu_init_late(struct cpu_info *); 394 bool sse2_idlezero_page(void *); 395 396 397 #ifdef XEN 398 399 #include <sys/bitops.h> 400 401 #define XPTE_MASK L1_FRAME 402 /* Selects the index of a PTE in (A)PTE_BASE */ 403 #define XPTE_SHIFT (L1_SHIFT - ilog2(sizeof(pt_entry_t))) 404 405 /* PTE access inline fuctions */ 406 407 /* 408 * Get the machine address of the pointed pte 409 * We use hardware MMU to get value so works only for levels 1-3 410 */ 411 412 static __inline paddr_t 413 xpmap_ptetomach(pt_entry_t *pte) 414 { 415 pt_entry_t *up_pte; 416 vaddr_t va = (vaddr_t) pte; 417 418 va = ((va & XPTE_MASK) >> XPTE_SHIFT) | (vaddr_t) PTE_BASE; 419 up_pte = (pt_entry_t *) va; 420 421 return (paddr_t) (((*up_pte) & PG_FRAME) + (((vaddr_t) pte) & (~PG_FRAME & ~VA_SIGN_MASK))); 422 } 423 424 /* 425 * xpmap_update() 426 * Update an active pt entry with Xen 427 * Equivalent to *pte = npte 428 */ 429 430 static __inline void 431 xpmap_update (pt_entry_t *pte, pt_entry_t npte) 432 { 433 int s = splvm(); 434 435 xpq_queue_pte_update(xpmap_ptetomach(pte), npte); 436 xpq_flush_queue(); 437 splx(s); 438 } 439 440 441 /* Xen helpers to change bits of a pte */ 442 #define XPMAP_UPDATE_DIRECT 1 /* Update direct map entry flags too */ 443 444 paddr_t vtomach(vaddr_t); 445 #define vtomfn(va) (vtomach(va) >> PAGE_SHIFT) 446 447 void pmap_apte_flush(struct pmap *); 448 void pmap_unmap_apdp(void); 449 450 #endif /* XEN */ 451 452 /* pmap functions with machine addresses */ 453 void pmap_kenter_ma(vaddr_t, paddr_t, vm_prot_t, u_int); 454 int pmap_enter_ma(struct pmap *, vaddr_t, paddr_t, paddr_t, 455 vm_prot_t, u_int, int); 456 bool pmap_extract_ma(pmap_t, vaddr_t, paddr_t *); 457 458 /* 459 * Hooks for the pool allocator. 460 */ 461 #define POOL_VTOPHYS(va) vtophys((vaddr_t) (va)) 462 463 #endif /* _KERNEL */ 464 465 #endif /* _X86_PMAP_H_ */ 466