xref: /netbsd-src/sys/arch/x86/include/pci_machdep.h (revision aaf4ece63a859a04e37cf3a7229b5fab0157cc06)
1 /*	$NetBSD: pci_machdep.h,v 1.6 2005/06/20 11:04:15 sekiya Exp $	*/
2 
3 /*
4  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
5  * Copyright (c) 1994 Charles M. Hannum.  All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *	This product includes software developed by Charles M. Hannum.
18  * 4. The name of the author may not be used to endorse or promote products
19  *    derived from this software without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 #ifndef _X86_PCI_MACHDEP_H_
34 #define _X86_PCI_MACHDEP_H_
35 
36 /*
37  * Machine-specific definitions for PCI autoconfiguration.
38  */
39 #define	__HAVE_PCIIDE_MACHDEP_COMPAT_INTR_ESTABLISH
40 
41 /*
42  * Many i386 PCI systems only work properly with I/O mapped space, in
43  * particular, buses behind PCI-PCI bridges may not have memory
44  * space mapped at all.  For this reason, tell drivers that have
45  * a choice that we "prefer" I/O space.
46  */
47 #define	PCI_PREFER_IOSPACE
48 
49 /*
50  * i386-specific PCI structure and type definitions.
51  * NOT TO BE USED DIRECTLY BY MACHINE INDEPENDENT CODE.
52  *
53  * Configuration tag; created from a {bus,device,function} triplet by
54  * pci_make_tag(), and passed to pci_conf_read() and pci_conf_write().
55  * We could instead always pass the {bus,device,function} triplet to
56  * the read and write routines, but this would cause extra overhead.
57  *
58  * Mode 2 is historical and deprecated by the Revision 2.0 specification.
59  */
60 union x86_pci_tag_u {
61 	u_int32_t mode1;
62 	struct {
63 		u_int16_t port;
64 		u_int8_t enable;
65 		u_int8_t forward;
66 	} mode2;
67 };
68 
69 extern struct x86_bus_dma_tag pci_bus_dma_tag;
70 #ifdef _LP64
71 extern struct x86_bus_dma_tag pci_bus_dma64_tag;
72 #endif
73 
74 /*
75  * Types provided to machine-independent PCI code
76  */
77 typedef void *pci_chipset_tag_t;
78 typedef union x86_pci_tag_u pcitag_t;
79 typedef int pci_intr_handle_t;
80 
81 /*
82  * i386-specific PCI variables and functions.
83  * NOT TO BE USED DIRECTLY BY MACHINE INDEPENDENT CODE.
84  */
85 extern int pci_mode;
86 int		pci_mode_detect(void);
87 int		pci_bus_flags(void);
88 struct		pci_attach_args;
89 
90 /*
91  * Functions provided to machine-independent PCI code.
92  */
93 void		pci_attach_hook(struct device *, struct device *,
94 		    struct pcibus_attach_args *);
95 int		pci_bus_maxdevs(pci_chipset_tag_t, int);
96 pcitag_t	pci_make_tag(pci_chipset_tag_t, int, int, int);
97 void		pci_decompose_tag(pci_chipset_tag_t, pcitag_t,
98 		    int *, int *, int *);
99 pcireg_t	pci_conf_read(pci_chipset_tag_t, pcitag_t, int);
100 void		pci_conf_write(pci_chipset_tag_t, pcitag_t, int,
101 		    pcireg_t);
102 int		pci_intr_map(struct pci_attach_args *, pci_intr_handle_t *);
103 const char	*pci_intr_string(pci_chipset_tag_t, pci_intr_handle_t);
104 const struct evcnt *pci_intr_evcnt(pci_chipset_tag_t, pci_intr_handle_t);
105 void		*pci_intr_establish(pci_chipset_tag_t, pci_intr_handle_t,
106 		    int, int (*)(void *), void *);
107 void		pci_intr_disestablish(pci_chipset_tag_t, void *);
108 
109 
110 /*
111  * ALL OF THE FOLLOWING ARE MACHINE-DEPENDENT, AND SHOULD NOT BE USED
112  * BY PORTABLE CODE.
113  */
114 
115 /*
116  * Section 6.2.4, `Miscellaneous Functions' of the PCI Specification,
117  * says that 255 means `unknown' or `no connection' to the interrupt
118  * controller on a PC.
119  */
120 #define	X86_PCI_INTERRUPT_LINE_NO_CONNECTION	0xff
121 
122 void pci_device_foreach(pci_chipset_tag_t, int,
123 			void (*)(pci_chipset_tag_t, pcitag_t, void*),
124 			void *);
125 
126 void pci_device_foreach_min(pci_chipset_tag_t, int, int,
127 			    void (*)(pci_chipset_tag_t, pcitag_t, void*),
128 			    void *);
129 
130 void pci_bridge_foreach(pci_chipset_tag_t, int, int,
131 	void (*) (pci_chipset_tag_t, pcitag_t, void *), void *);
132 
133 
134 #endif /* _X86_PCI_MACHDEP_H_ */
135