1 /* $NetBSD: intr.h,v 1.61 2019/12/22 15:09:39 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 2001, 2006, 2007, 2008, 2019 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum, and by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _X86_INTR_H_ 33 #define _X86_INTR_H_ 34 35 #if !defined(XEN) 36 #define __HAVE_FAST_SOFTINTS 37 #if !defined(NO_PREEMPTION) 38 #define __HAVE_PREEMPTION 39 #endif /* !defined(NO_PREEMPTION) */ 40 #endif /* !defined(XEN) */ 41 42 #ifdef _KERNEL 43 #include <sys/types.h> 44 #else 45 #include <stdbool.h> 46 #endif 47 48 #include <sys/evcnt.h> 49 #include <sys/queue.h> 50 #include <machine/intrdefs.h> 51 52 #ifndef _LOCORE 53 #include <machine/pic.h> 54 55 /* 56 * Struct describing an interrupt source for a CPU. struct cpu_info 57 * has an array of MAX_INTR_SOURCES of these. The index in the array 58 * is equal to the stub number of the stubcode as present in vector.s 59 * 60 * The primary CPU's array of interrupt sources has its first 16 61 * entries reserved for legacy ISA irq handlers. This means that 62 * they have a 1:1 mapping for arrayindex:irq_num. This is not 63 * true for interrupts that come in through IO APICs, to find 64 * their source, go through ci->ci_isources[index].is_pic 65 * 66 * It's possible to always maintain a 1:1 mapping, but that means 67 * limiting the total number of interrupt sources to MAX_INTR_SOURCES 68 * (32), instead of 32 per CPU. It also would mean that having multiple 69 * IO APICs which deliver interrupts from an equal pin number would 70 * overlap if they were to be sent to the same CPU. 71 */ 72 73 struct intrstub { 74 void *ist_entry; 75 void *ist_recurse; 76 void *ist_resume; 77 }; 78 79 struct percpu_evcnt { 80 cpuid_t cpuid; 81 uint64_t count; 82 }; 83 84 struct intrsource { 85 int is_maxlevel; /* max. IPL for this source */ 86 int is_pin; /* IRQ for legacy; pin for IO APIC, 87 -1 for MSI */ 88 struct intrhand *is_handlers; /* handler chain */ 89 struct pic *is_pic; /* originating PIC */ 90 void *is_recurse; /* entry for spllower */ 91 void *is_resume; /* entry for doreti */ 92 lwp_t *is_lwp; /* for soft interrupts */ 93 #if defined(XEN) 94 u_long ipl_evt_mask1; /* pending events for this IPL */ 95 u_long ipl_evt_mask2[NR_EVENT_CHANNELS]; 96 #endif 97 struct evcnt is_evcnt; /* interrupt counter per cpu */ 98 /* 99 * is_mask_count requires special handling; it can only be modifed 100 * or examined on the CPU that owns the interrupt source, and such 101 * references need to be protected by disabling interrupts. This 102 * is because intr_mask() can be called from an interrupt handler. 103 * is_distribute_pending does not require such special handling 104 * because intr_unmask() cannot be called from an interrupt handler. 105 */ 106 u_int is_mask_count; /* masked? (nested) [see above] */ 107 int is_distribute_pending; /* ci<->ci move pending [cpu_lock] */ 108 int is_flags; /* see below */ 109 int is_type; /* level, edge */ 110 int is_idtvec; 111 int is_minlevel; 112 char is_evname[32]; /* event counter name */ 113 char is_intrid[INTRIDBUF]; /* intrid created by create_intrid() */ 114 char is_xname[INTRDEVNAMEBUF]; /* device names */ 115 cpuid_t is_active_cpu; /* active cpuid */ 116 struct percpu_evcnt *is_saved_evcnt; /* interrupt count of deactivated cpus */ 117 SIMPLEQ_ENTRY(intrsource) is_list; /* link of intrsources */ 118 }; 119 120 #define IS_LEGACY 0x0001 /* legacy ISA irq source */ 121 #define IS_IPI 0x0002 122 #define IS_LOG 0x0004 123 124 /* 125 * Interrupt handler chains. *_intr_establish() insert a handler into 126 * the list. The handler is called with its (single) argument. 127 */ 128 129 struct intrhand { 130 #if defined(XEN) 131 /* 132 * Note: This is transitional and will go away. 133 * The only current consumer is xen_intr_disestablish() 134 * 135 * We ought to use a union here, but too much effort. 136 * We use this field to tear down the cookie handed to us 137 * via x86/intr.c:intr_disestablish(); 138 * Interestingly, the intr_establish_xname() function returns 139 * a "void *" - so we abuse this for now. 140 */ 141 int pic_type; /* Overloading wrt struct pintrhand */ 142 #endif 143 int (*ih_fun)(void *); 144 void *ih_arg; 145 int ih_level; 146 int (*ih_realfun)(void *); 147 void *ih_realarg; 148 struct intrhand *ih_next; 149 struct intrhand **ih_prevp; 150 int ih_pin; 151 int ih_slot; 152 #if defined(XEN) 153 struct intrhand *ih_evt_next; 154 #endif 155 struct cpu_info *ih_cpu; 156 }; 157 158 #define IMASK(ci,level) (ci)->ci_imask[(level)] 159 #define IUNMASK(ci,level) (ci)->ci_iunmask[(level)] 160 161 #ifdef _KERNEL 162 163 void Xspllower(int); 164 void spllower(int); 165 int splraise(int); 166 void softintr(int); 167 168 /* 169 * Convert spl level to local APIC level 170 */ 171 172 #define APIC_LEVEL(l) ((l) << 4) 173 174 /* 175 * Miscellaneous 176 */ 177 178 #define SPL_ASSERT_BELOW(x) KDASSERT(curcpu()->ci_ilevel < (x)) 179 #define spl0() spllower(IPL_NONE) 180 #define splx(x) spllower(x) 181 182 typedef uint8_t ipl_t; 183 typedef struct { 184 ipl_t _ipl; 185 } ipl_cookie_t; 186 187 static inline ipl_cookie_t 188 makeiplcookie(ipl_t ipl) 189 { 190 191 return (ipl_cookie_t){._ipl = ipl}; 192 } 193 194 static inline int 195 splraiseipl(ipl_cookie_t icookie) 196 { 197 198 return splraise(icookie._ipl); 199 } 200 201 #include <sys/spl.h> 202 203 /* 204 * Stub declarations. 205 */ 206 207 void Xsoftintr(void); 208 void Xrecurse_preempt(void); 209 void Xresume_preempt(void); 210 211 extern struct intrstub legacy_stubs[]; 212 extern struct intrstub ioapic_edge_stubs[]; 213 extern struct intrstub ioapic_level_stubs[]; 214 extern struct intrstub x2apic_edge_stubs[]; 215 extern struct intrstub x2apic_level_stubs[]; 216 217 struct cpu_info; 218 219 struct pcibus_attach_args; 220 221 typedef uint64_t intr_handle_t; 222 223 void intr_default_setup(void); 224 void x86_nmi(void); 225 void *intr_establish_xname(int, struct pic *, int, int, int, int (*)(void *), 226 void *, bool, const char *); 227 void *intr_establish(int, struct pic *, int, int, int, int (*)(void *), void *, bool); 228 void intr_mask(struct intrhand *); 229 void intr_unmask(struct intrhand *); 230 void intr_disestablish(struct intrhand *); 231 void intr_add_pcibus(struct pcibus_attach_args *); 232 const char *intr_string(intr_handle_t, char *, size_t); 233 void cpu_intr_init(struct cpu_info *); 234 int intr_find_mpmapping(int, int, intr_handle_t *); 235 struct pic *intr_findpic(int); 236 void intr_printconfig(void); 237 238 const char *intr_create_intrid(int, struct pic *, int, char *, size_t); 239 struct intrsource *intr_allocate_io_intrsource(const char *); 240 void intr_free_io_intrsource(const char *); 241 242 int x86_send_ipi(struct cpu_info *, int); 243 void x86_broadcast_ipi(int); 244 void x86_ipi_handler(void); 245 246 #ifndef XENPV 247 extern void (* const ipifunc[X86_NIPI])(struct cpu_info *); 248 #endif 249 250 #endif /* _KERNEL */ 251 252 #endif /* !_LOCORE */ 253 254 #endif /* !_X86_INTR_H_ */ 255