xref: /netbsd-src/sys/arch/x86/include/cpufunc.h (revision bdc22b2e01993381dcefeff2bc9b56ca75a4235c)
1 /*	$NetBSD: cpufunc.h,v 1.24 2018/02/22 09:41:06 maxv Exp $	*/
2 
3 /*-
4  * Copyright (c) 1998, 2007 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Charles M. Hannum, and by Andrew Doran.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #ifndef _X86_CPUFUNC_H_
33 #define	_X86_CPUFUNC_H_
34 
35 /*
36  * Functions to provide access to x86-specific instructions.
37  */
38 
39 #include <sys/cdefs.h>
40 #include <sys/types.h>
41 
42 #include <machine/segments.h>
43 #include <machine/specialreg.h>
44 
45 #ifdef _KERNEL
46 
47 void	x86_pause(void);
48 void	x86_lfence(void);
49 void	x86_sfence(void);
50 void	x86_mfence(void);
51 void	x86_flush(void);
52 #ifndef XEN
53 void	x86_hotpatch(uint32_t, const uint8_t *, size_t);
54 void	x86_patch_window_open(u_long *, u_long *);
55 void	x86_patch_window_close(u_long, u_long);
56 void	x86_patch(bool);
57 #endif
58 void	invlpg(vaddr_t);
59 void	lidt(struct region_descriptor *);
60 void	lldt(u_short);
61 void	ltr(u_short);
62 void	lcr0(u_long);
63 u_long	rcr0(void);
64 void	lcr2(vaddr_t);
65 vaddr_t	rcr2(void);
66 void	lcr3(vaddr_t);
67 vaddr_t	rcr3(void);
68 void	lcr4(vaddr_t);
69 vaddr_t	rcr4(void);
70 void	lcr8(vaddr_t);
71 vaddr_t	rcr8(void);
72 void	tlbflush(void);
73 void	tlbflushg(void);
74 register_t	rdr0(void);
75 void		ldr0(register_t);
76 register_t	rdr1(void);
77 void		ldr1(register_t);
78 register_t	rdr2(void);
79 void		ldr2(register_t);
80 register_t	rdr3(void);
81 void		ldr3(register_t);
82 register_t	rdr6(void);
83 void		ldr6(register_t);
84 register_t	rdr7(void);
85 void		ldr7(register_t);
86 void	wbinvd(void);
87 void	breakpoint(void);
88 void	x86_hlt(void);
89 void	x86_stihlt(void);
90 u_int	x86_getss(void);
91 
92 /* fpu save, restore etc */
93 union savefpu;
94 void	fldcw(const uint16_t *);
95 void	fnclex(void);
96 void	fninit(void);
97 void	fnsave(union savefpu *);
98 void	fnstcw(uint16_t *);
99 uint16_t fngetsw(void);
100 void	fnstsw(uint16_t *);
101 void	frstor(const union savefpu *);
102 void	fwait(void);
103 void	clts(void);
104 void	stts(void);
105 void	fxsave(union savefpu *);
106 void	fxrstor(const union savefpu *);
107 void	x86_ldmxcsr(const uint32_t *);
108 void	x86_stmxcsr(uint32_t *);
109 
110 void	fldummy(void);
111 void	fp_divide_by_0(void);
112 
113 /* Extended processor state functions (for AVX registers etc) */
114 
115 uint64_t rdxcr(uint32_t);		/* xgetbv */
116 void	wrxcr(uint32_t, uint64_t);	/* xsetgv */
117 
118 void	xrstor(const union savefpu *, uint64_t);
119 void	xsave(union savefpu *, uint64_t);
120 void	xsaveopt(union savefpu *, uint64_t);
121 
122 void	x86_monitor(const void *, uint32_t, uint32_t);
123 void	x86_mwait(uint32_t, uint32_t);
124 /* x86_cpuid2() writes four 32bit values, %eax, %ebx, %ecx and %edx */
125 #define	x86_cpuid(a,b)	x86_cpuid2((a),0,(b))
126 void	x86_cpuid2(uint32_t, uint32_t, uint32_t *);
127 
128 /* Use read_psl, write_psl when saving and restoring interrupt state. */
129 void	x86_disable_intr(void);
130 void	x86_enable_intr(void);
131 u_long	x86_read_psl(void);
132 void	x86_write_psl(u_long);
133 
134 /* Use read_flags, write_flags to adjust other members of %eflags. */
135 u_long	x86_read_flags(void);
136 void	x86_write_flags(u_long);
137 
138 void	x86_reset(void);
139 
140 /*
141  * Some of the undocumented AMD64 MSRs need a 'passcode' to access.
142  *
143  * See LinuxBIOSv2: src/cpu/amd/model_fxx/model_fxx_init.c
144  */
145 
146 #define	OPTERON_MSR_PASSCODE	0x9c5a203aU
147 
148 uint64_t	rdmsr(u_int);
149 uint64_t	rdmsr_locked(u_int);
150 int		rdmsr_safe(u_int, uint64_t *);
151 uint64_t	rdtsc(void);
152 uint64_t	rdpmc(u_int);
153 void		wrmsr(u_int, uint64_t);
154 void		wrmsr_locked(u_int, uint64_t);
155 void		setds(int);
156 void		setes(int);
157 void		setfs(int);
158 void		setusergs(int);
159 
160 #endif /* _KERNEL */
161 
162 #endif /* !_X86_CPUFUNC_H_ */
163