1 /* $NetBSD: cpufunc.h,v 1.3 2007/11/15 19:18:34 ad Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 2007 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum, and by Andrew Doran. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #ifndef _X86_CPUFUNC_H_ 40 #define _X86_CPUFUNC_H_ 41 42 /* 43 * Functions to provide access to x86-specific instructions. 44 */ 45 46 #include <sys/cdefs.h> 47 #include <sys/types.h> 48 49 #include <machine/segments.h> 50 #include <machine/specialreg.h> 51 52 #ifdef _KERNEL 53 54 void x86_pause(void); 55 void x86_lfence(void); 56 void x86_sfence(void); 57 void x86_mfence(void); 58 void x86_flush(void); 59 void x86_patch(void); 60 void invlpg(vaddr_t); 61 void lidt(struct region_descriptor *); 62 void lldt(u_short); 63 void ltr(u_short); 64 void lcr0(u_int); 65 u_int rcr0(void); 66 vaddr_t rcr2(void); 67 void lcr3(vaddr_t); 68 vaddr_t rcr3(void); 69 void lcr4(vaddr_t); 70 vaddr_t rcr4(void); 71 void lcr8(vaddr_t); 72 vaddr_t rcr8(void); 73 void tlbflush(void); 74 void tlbflushg(void); 75 void dr0(void *, uint32_t, uint32_t, uint32_t); 76 vaddr_t rdr6(void); 77 void ldr6(vaddr_t); 78 void wbinvd(void); 79 void breakpoint(void); 80 void x86_hlt(void); 81 void x86_stihlt(void); 82 u_int x86_getss(void); 83 void fldcw(void *); 84 void fnclex(void); 85 void fninit(void); 86 void fnsave(void *); 87 void fnstcw(void *); 88 void fnstsw(void *); 89 void fp_divide_by_0(void); 90 void frstor(void *); 91 void fwait(void); 92 void clts(void); 93 void stts(void); 94 void fldummy(const double *); 95 void fxsave(void *); 96 void fxrstor(void *); 97 void x86_monitor(const void *, uint32_t, uint32_t); 98 void x86_mwait(uint32_t, uint32_t); 99 void x86_ldmxcsr(void *); 100 void x86_cpuid(unsigned, unsigned *); 101 102 /* Use read_psl, write_psl when saving and restoring interrupt state. */ 103 void x86_disable_intr(void); 104 void x86_enable_intr(void); 105 u_long x86_read_psl(void); 106 void x86_write_psl(u_long); 107 108 /* Use read_flags, write_flags to adjust other members of %eflags. */ 109 u_long x86_read_flags(void); 110 void x86_write_flags(u_long); 111 112 /* 113 * Some of the undocumented AMD64 MSRs need a 'passcode' to access. 114 * 115 * See LinuxBIOSv2: src/cpu/amd/model_fxx/model_fxx_init.c 116 */ 117 118 #define OPTERON_MSR_PASSCODE 0x9c5a203aU 119 120 uint64_t rdmsr(u_int); 121 u_int64_t rdmsr_locked(u_int, u_int); 122 uint64_t rdtsc(void); 123 uint64_t rdpmc(u_int); 124 void wrmsr(u_int, uint64_t); 125 void wrmsr_locked(u_int, u_int, u_int64_t); 126 127 #endif /* _KERNEL */ 128 129 #endif /* !_X86_CPUFUNC_H_ */ 130