1 /* $NetBSD: cpu.h,v 1.88 2018/01/07 16:10:16 maxv Exp $ */ 2 3 /* 4 * Copyright (c) 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 35 */ 36 37 #ifndef _X86_CPU_H_ 38 #define _X86_CPU_H_ 39 40 #if defined(_KERNEL) || defined(_STANDALONE) 41 #include <sys/types.h> 42 #else 43 #include <stdint.h> 44 #include <stdbool.h> 45 #endif /* _KERNEL || _STANDALONE */ 46 47 #if defined(_KERNEL) || defined(_KMEMUSER) 48 #if defined(_KERNEL_OPT) 49 #include "opt_xen.h" 50 #include "opt_svs.h" 51 #ifdef i386 52 #include "opt_user_ldt.h" 53 #endif 54 #endif 55 56 /* 57 * Definitions unique to x86 cpu support. 58 */ 59 #include <machine/frame.h> 60 #include <machine/pte.h> 61 #include <machine/segments.h> 62 #include <machine/tss.h> 63 #include <machine/intrdefs.h> 64 65 #include <x86/cacheinfo.h> 66 67 #include <sys/cpu_data.h> 68 #include <sys/evcnt.h> 69 #include <sys/device_if.h> /* for device_t */ 70 71 #ifdef XEN 72 #include <xen/xen-public/xen.h> 73 #include <xen/xen-public/event_channel.h> 74 #include <sys/mutex.h> 75 #endif /* XEN */ 76 77 struct intrsource; 78 struct pmap; 79 80 #ifdef __x86_64__ 81 #define i386tss x86_64_tss 82 #endif 83 84 #define NIOPORTS 1024 /* # of ports we allow to be mapped */ 85 #define IOMAPSIZE (NIOPORTS / 8) /* I/O bitmap size in bytes */ 86 87 struct cpu_tss { 88 #ifdef i386 89 struct i386tss dblflt_tss; 90 struct i386tss ddbipi_tss; 91 #endif 92 struct i386tss tss; 93 uint8_t iomap[IOMAPSIZE]; 94 } __packed; 95 96 /* 97 * a bunch of this belongs in cpuvar.h; move it later.. 98 */ 99 100 struct cpu_info { 101 struct cpu_data ci_data; /* MI per-cpu data */ 102 device_t ci_dev; /* pointer to our device */ 103 struct cpu_info *ci_self; /* self-pointer */ 104 volatile struct vcpu_info *ci_vcpu; /* for XEN */ 105 106 /* 107 * Will be accessed by other CPUs. 108 */ 109 struct cpu_info *ci_next; /* next cpu */ 110 struct lwp *ci_curlwp; /* current owner of the processor */ 111 struct lwp *ci_fpcurlwp; /* current owner of the FPU */ 112 cpuid_t ci_cpuid; /* our CPU ID */ 113 uint32_t ci_acpiid; /* our ACPI/MADT ID */ 114 uint32_t ci_initapicid; /* our initial APIC ID */ 115 116 /* 117 * Private members. 118 */ 119 struct pmap *ci_pmap; /* current pmap */ 120 int ci_want_pmapload; /* pmap_load() is needed */ 121 volatile int ci_tlbstate; /* one of TLBSTATE_ states. see below */ 122 #define TLBSTATE_VALID 0 /* all user tlbs are valid */ 123 #define TLBSTATE_LAZY 1 /* tlbs are valid but won't be kept uptodate */ 124 #define TLBSTATE_STALE 2 /* we might have stale user tlbs */ 125 int ci_curldt; /* current LDT descriptor */ 126 int ci_nintrhand; /* number of H/W interrupt handlers */ 127 uint64_t ci_scratch; 128 uintptr_t ci_pmap_data[128 / sizeof(uintptr_t)]; 129 130 #ifdef XEN 131 u_long ci_evtmask[NR_EVENT_CHANNELS]; /* events allowed on this CPU */ 132 #endif 133 struct intrsource *ci_isources[MAX_INTR_SOURCES]; 134 135 volatile int ci_mtx_count; /* Negative count of spin mutexes */ 136 volatile int ci_mtx_oldspl; /* Old SPL at this ci_idepth */ 137 138 #ifndef __HAVE_DIRECT_MAP 139 #define VPAGE_SRC 0 140 #define VPAGE_DST 1 141 #define VPAGE_ZER 2 142 #define VPAGE_PTP 3 143 #define VPAGE_MAX 4 144 vaddr_t vpage[VPAGE_MAX]; 145 pt_entry_t *vpage_pte[VPAGE_MAX]; 146 #endif 147 148 /* The following must be aligned for cmpxchg8b. */ 149 struct { 150 uint32_t ipending; 151 int ilevel; 152 } ci_istate __aligned(8); 153 #define ci_ipending ci_istate.ipending 154 #define ci_ilevel ci_istate.ilevel 155 156 int ci_idepth; 157 void * ci_intrstack; 158 uint32_t ci_imask[NIPL]; 159 uint32_t ci_iunmask[NIPL]; 160 161 uint32_t ci_flags; /* flags; see below */ 162 uint32_t ci_ipis; /* interprocessor interrupts pending */ 163 164 uint32_t ci_signature; /* X86 cpuid type (cpuid.1.%eax) */ 165 uint32_t ci_vendor[4]; /* vendor string */ 166 uint32_t ci_max_cpuid; /* cpuid.0:%eax */ 167 uint32_t ci_max_ext_cpuid; /* cpuid.80000000:%eax */ 168 volatile uint32_t ci_lapic_counter; 169 170 uint32_t ci_feat_val[7]; /* X86 CPUID feature bits */ 171 /* [0] basic features cpuid.1:%edx 172 * [1] basic features cpuid.1:%ecx (CPUID2_xxx bits) 173 * [2] extended features cpuid:80000001:%edx 174 * [3] extended features cpuid:80000001:%ecx 175 * [4] VIA padlock features 176 * [5] structured extended features cpuid.7:%ebx 177 * [6] structured extended features cpuid.7:%ecx 178 */ 179 180 const struct cpu_functions *ci_func; /* start/stop functions */ 181 struct trapframe *ci_ddb_regs; 182 183 u_int ci_cflush_lsize; /* CLFLUSH insn line size */ 184 struct x86_cache_info ci_cinfo[CAI_COUNT]; 185 186 #ifdef PAE 187 uint32_t ci_pae_l3_pdirpa; /* PA of L3 PD */ 188 pd_entry_t * ci_pae_l3_pdir; /* VA pointer to L3 PD */ 189 #endif 190 191 #ifdef SVS 192 pd_entry_t * ci_svs_updir; 193 paddr_t ci_svs_updirpa; 194 paddr_t ci_svs_kpdirpa; 195 kmutex_t ci_svs_mtx; 196 #endif 197 198 #if defined(XEN) && (defined(PAE) || defined(__x86_64__)) 199 /* Currently active user PGD (can't use rcr3() with Xen) */ 200 pd_entry_t * ci_kpm_pdir; /* per-cpu PMD (va) */ 201 paddr_t ci_kpm_pdirpa; /* per-cpu PMD (pa) */ 202 kmutex_t ci_kpm_mtx; 203 #if defined(__x86_64__) 204 /* per-cpu version of normal_pdes */ 205 pd_entry_t * ci_normal_pdes[3]; /* Ok to hardcode. only for x86_64 && XEN */ 206 paddr_t ci_xen_current_user_pgd; 207 #endif /* __x86_64__ */ 208 #endif /* XEN et.al */ 209 210 #ifdef XEN 211 size_t ci_xpq_idx; 212 #endif 213 214 #ifndef XEN 215 struct evcnt ci_ipi_events[X86_NIPI]; 216 #else /* XEN */ 217 struct evcnt ci_ipi_events[XEN_NIPIS]; 218 evtchn_port_t ci_ipi_evtchn; 219 #endif /* XEN */ 220 221 device_t ci_frequency; /* Frequency scaling technology */ 222 device_t ci_padlock; /* VIA PadLock private storage */ 223 device_t ci_temperature; /* Intel coretemp(4) or equivalent */ 224 device_t ci_vm; /* Virtual machine guest driver */ 225 226 /* 227 * Segmentation-related data. 228 */ 229 union descriptor *ci_gdt; 230 struct cpu_tss *ci_tss; /* Per-cpu TSSes; shared among LWPs */ 231 int ci_tss_sel; /* TSS selector of this cpu */ 232 233 /* 234 * The following two are actually region_descriptors, 235 * but that would pollute the namespace. 236 */ 237 uintptr_t ci_suspend_gdt; 238 uint16_t ci_suspend_gdt_padding; 239 uintptr_t ci_suspend_idt; 240 uint16_t ci_suspend_idt_padding; 241 242 uint16_t ci_suspend_tr; 243 uint16_t ci_suspend_ldt; 244 uintptr_t ci_suspend_fs; 245 uintptr_t ci_suspend_gs; 246 uintptr_t ci_suspend_kgs; 247 uintptr_t ci_suspend_efer; 248 uintptr_t ci_suspend_reg[12]; 249 uintptr_t ci_suspend_cr0; 250 uintptr_t ci_suspend_cr2; 251 uintptr_t ci_suspend_cr3; 252 uintptr_t ci_suspend_cr4; 253 uintptr_t ci_suspend_cr8; 254 255 /* The following must be in a single cache line. */ 256 int ci_want_resched __aligned(64); 257 int ci_padout __aligned(64); 258 }; 259 260 /* 261 * Macros to handle (some) trapframe registers for common x86 code. 262 */ 263 #ifdef __x86_64__ 264 #define X86_TF_RAX(tf) tf->tf_rax 265 #define X86_TF_RDX(tf) tf->tf_rdx 266 #define X86_TF_RSP(tf) tf->tf_rsp 267 #define X86_TF_RIP(tf) tf->tf_rip 268 #define X86_TF_RFLAGS(tf) tf->tf_rflags 269 #else 270 #define X86_TF_RAX(tf) tf->tf_eax 271 #define X86_TF_RDX(tf) tf->tf_edx 272 #define X86_TF_RSP(tf) tf->tf_esp 273 #define X86_TF_RIP(tf) tf->tf_eip 274 #define X86_TF_RFLAGS(tf) tf->tf_eflags 275 #endif 276 277 /* 278 * Processor flag notes: The "primary" CPU has certain MI-defined 279 * roles (mostly relating to hardclock handling); we distinguish 280 * between the processor which booted us, and the processor currently 281 * holding the "primary" role just to give us the flexibility later to 282 * change primaries should we be sufficiently twisted. 283 */ 284 285 #define CPUF_BSP 0x0001 /* CPU is the original BSP */ 286 #define CPUF_AP 0x0002 /* CPU is an AP */ 287 #define CPUF_SP 0x0004 /* CPU is only processor */ 288 #define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 289 290 #define CPUF_SYNCTSC 0x0800 /* Synchronize TSC */ 291 #define CPUF_PRESENT 0x1000 /* CPU is present */ 292 #define CPUF_RUNNING 0x2000 /* CPU is running */ 293 #define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ 294 #define CPUF_GO 0x8000 /* CPU should start running */ 295 296 #endif /* _KERNEL || __KMEMUSER */ 297 298 #ifdef _KERNEL 299 /* 300 * We statically allocate the CPU info for the primary CPU (or, 301 * the only CPU on uniprocessors), and the primary CPU is the 302 * first CPU on the CPU info list. 303 */ 304 extern struct cpu_info cpu_info_primary; 305 extern struct cpu_info *cpu_info_list; 306 307 #define CPU_INFO_ITERATOR int __unused 308 #define CPU_INFO_FOREACH(cii, ci) ci = cpu_info_list; \ 309 ci != NULL; ci = ci->ci_next 310 311 #define CPU_STARTUP(_ci, _target) ((_ci)->ci_func->start(_ci, _target)) 312 #define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 313 #define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 314 315 #if !defined(__GNUC__) || defined(_MODULE) 316 /* For non-GCC and modules */ 317 struct cpu_info *x86_curcpu(void); 318 void cpu_set_curpri(int); 319 # ifdef __GNUC__ 320 lwp_t *x86_curlwp(void) __attribute__ ((const)); 321 # else 322 lwp_t *x86_curlwp(void); 323 # endif 324 #endif 325 326 #define cpu_number() (cpu_index(curcpu())) 327 328 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 329 330 #define X86_AST_GENERIC 0x01 331 #define X86_AST_PREEMPT 0x02 332 333 #define aston(l, why) ((l)->l_md.md_astpending |= (why)) 334 #define cpu_did_resched(l) ((l)->l_md.md_astpending &= ~X86_AST_PREEMPT) 335 336 void cpu_boot_secondary_processors(void); 337 void cpu_init_idle_lwps(void); 338 void cpu_init_msrs(struct cpu_info *, bool); 339 void cpu_load_pmap(struct pmap *, struct pmap *); 340 void cpu_broadcast_halt(void); 341 void cpu_kick(struct cpu_info *); 342 343 void cpu_pcpuarea_init(struct cpu_info *); 344 void cpu_svs_init(struct cpu_info *); 345 346 #define curcpu() x86_curcpu() 347 #define curlwp x86_curlwp() 348 #define curpcb ((struct pcb *)lwp_getpcb(curlwp)) 349 350 /* 351 * Arguments to hardclock, softclock and statclock 352 * encapsulate the previous machine state in an opaque 353 * clockframe; for now, use generic intrframe. 354 */ 355 struct clockframe { 356 struct intrframe cf_if; 357 }; 358 359 /* 360 * Give a profiling tick to the current process when the user profiling 361 * buffer pages are invalid. On the i386, request an ast to send us 362 * through trap(), marking the proc as needing a profiling tick. 363 */ 364 extern void cpu_need_proftick(struct lwp *l); 365 366 /* 367 * Notify the LWP l that it has a signal pending, process as soon as 368 * possible. 369 */ 370 extern void cpu_signotify(struct lwp *); 371 372 /* 373 * We need a machine-independent name for this. 374 */ 375 extern void (*delay_func)(unsigned int); 376 struct timeval; 377 378 #ifndef __HIDE_DELAY 379 #define DELAY(x) (*delay_func)(x) 380 #define delay(x) (*delay_func)(x) 381 #endif 382 383 extern int biosbasemem; 384 extern int biosextmem; 385 extern int cputype; 386 extern int cpuid_level; 387 extern int cpu_class; 388 extern char cpu_brand_string[]; 389 extern int use_pae; 390 391 #ifdef __i386__ 392 #define i386_fpu_present 1 393 int npx586bug1(int, int); 394 extern int i386_fpu_fdivbug; 395 extern int i386_use_fxsave; 396 extern int i386_has_sse; 397 extern int i386_has_sse2; 398 #else 399 #define i386_fpu_present 1 400 #define i386_fpu_fdivbug 0 401 #define i386_use_fxsave 1 402 #define i386_has_sse 1 403 #define i386_has_sse2 1 404 #endif 405 406 extern int x86_fpu_save; 407 #define FPU_SAVE_FSAVE 0 408 #define FPU_SAVE_FXSAVE 1 409 #define FPU_SAVE_XSAVE 2 410 #define FPU_SAVE_XSAVEOPT 3 411 extern unsigned int x86_fpu_save_size; 412 extern uint64_t x86_xsave_features; 413 414 extern void (*x86_cpu_idle)(void); 415 #define cpu_idle() (*x86_cpu_idle)() 416 417 /* machdep.c */ 418 #ifdef i386 419 void cpu_set_tss_gates(struct cpu_info *); 420 #endif 421 void cpu_reset(void); 422 423 /* longrun.c */ 424 u_int tmx86_get_longrun_mode(void); 425 void tmx86_get_longrun_status(u_int *, u_int *, u_int *); 426 void tmx86_init_longrun(void); 427 428 /* identcpu.c */ 429 void cpu_probe(struct cpu_info *); 430 void cpu_identify(struct cpu_info *); 431 void identify_hypervisor(void); 432 433 typedef enum vm_guest { 434 VM_GUEST_NO = 0, 435 VM_GUEST_VM, 436 VM_GUEST_XEN, 437 VM_GUEST_HV, 438 VM_GUEST_VMWARE, 439 VM_GUEST_KVM, 440 VM_LAST 441 } vm_guest_t; 442 extern vm_guest_t vm_guest; 443 444 /* cpu_topology.c */ 445 void x86_cpu_topology(struct cpu_info *); 446 447 /* locore.s */ 448 struct region_descriptor; 449 void lgdt(struct region_descriptor *); 450 #ifdef XEN 451 void lgdt_finish(void); 452 #endif 453 454 struct pcb; 455 void savectx(struct pcb *); 456 void lwp_trampoline(void); 457 #ifdef XEN 458 void startrtclock(void); 459 void xen_delay(unsigned int); 460 void xen_initclocks(void); 461 void xen_suspendclocks(struct cpu_info *); 462 void xen_resumeclocks(struct cpu_info *); 463 #else 464 /* clock.c */ 465 void initrtclock(u_long); 466 void startrtclock(void); 467 void i8254_delay(unsigned int); 468 void i8254_microtime(struct timeval *); 469 void i8254_initclocks(void); 470 #endif 471 472 /* cpu.c */ 473 void cpu_probe_features(struct cpu_info *); 474 475 /* vm_machdep.c */ 476 void cpu_proc_fork(struct proc *, struct proc *); 477 paddr_t kvtop(void *); 478 479 #ifdef USER_LDT 480 /* sys_machdep.h */ 481 int x86_get_ldt(struct lwp *, void *, register_t *); 482 int x86_set_ldt(struct lwp *, void *, register_t *); 483 #endif 484 485 /* isa_machdep.c */ 486 void isa_defaultirq(void); 487 int isa_nmi(void); 488 489 /* consinit.c */ 490 void kgdb_port_init(void); 491 492 /* bus_machdep.c */ 493 void x86_bus_space_init(void); 494 void x86_bus_space_mallocok(void); 495 496 #endif /* _KERNEL */ 497 498 #if defined(_KERNEL) || defined(_KMEMUSER) 499 #include <machine/psl.h> /* Must be after struct cpu_info declaration */ 500 #endif /* _KERNEL || __KMEMUSER */ 501 502 /* 503 * CTL_MACHDEP definitions. 504 */ 505 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 506 #define CPU_BIOSBASEMEM 2 /* int: bios-reported base mem (K) */ 507 #define CPU_BIOSEXTMEM 3 /* int: bios-reported ext. mem (K) */ 508 /* CPU_NKPDE 4 obsolete: int: number of kernel PDEs */ 509 #define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */ 510 #define CPU_DISKINFO 6 /* struct disklist *: 511 * disk geometry information */ 512 #define CPU_FPU_PRESENT 7 /* int: FPU is present */ 513 #define CPU_OSFXSR 8 /* int: OS uses FXSAVE/FXRSTOR */ 514 #define CPU_SSE 9 /* int: OS/CPU supports SSE */ 515 #define CPU_SSE2 10 /* int: OS/CPU supports SSE2 */ 516 #define CPU_TMLR_MODE 11 /* int: longrun mode 517 * 0: minimum frequency 518 * 1: economy 519 * 2: performance 520 * 3: maximum frequency 521 */ 522 #define CPU_TMLR_FREQUENCY 12 /* int: current frequency */ 523 #define CPU_TMLR_VOLTAGE 13 /* int: current voltage */ 524 #define CPU_TMLR_PERCENTAGE 14 /* int: current clock percentage */ 525 #define CPU_FPU_SAVE 15 /* int: FPU Instructions layout 526 * to use this, CPU_OSFXSR must be true 527 * 0: FSAVE 528 * 1: FXSAVE 529 * 2: XSAVE 530 * 3: XSAVEOPT 531 */ 532 #define CPU_FPU_SAVE_SIZE 16 /* int: FPU Instruction layout size */ 533 #define CPU_XSAVE_FEATURES 17 /* quad: XSAVE features */ 534 535 #define CPU_MAXID 18 /* number of valid machdep ids */ 536 537 /* 538 * Structure for CPU_DISKINFO sysctl call. 539 * XXX this should be somewhere else. 540 */ 541 #define MAX_BIOSDISKS 16 542 543 struct disklist { 544 int dl_nbiosdisks; /* number of bios disks */ 545 int dl_unused; 546 struct biosdisk_info { 547 int bi_dev; /* BIOS device # (0x80 ..) */ 548 int bi_cyl; /* cylinders on disk */ 549 int bi_head; /* heads per track */ 550 int bi_sec; /* sectors per track */ 551 uint64_t bi_lbasecs; /* total sec. (iff ext13) */ 552 #define BIFLAG_INVALID 0x01 553 #define BIFLAG_EXTINT13 0x02 554 int bi_flags; 555 int bi_unused; 556 } dl_biosdisks[MAX_BIOSDISKS]; 557 558 int dl_nnativedisks; /* number of native disks */ 559 struct nativedisk_info { 560 char ni_devname[16]; /* native device name */ 561 int ni_nmatches; /* # of matches w/ BIOS */ 562 int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */ 563 } dl_nativedisks[1]; /* actually longer */ 564 }; 565 #endif /* !_X86_CPU_H_ */ 566