xref: /netbsd-src/sys/arch/x68k/dev/sram.c (revision b7b7574d3bf8eeb51a1fa3977b59142ec6434a55)
1 /*	$NetBSD: sram.c,v 1.19 2014/03/16 05:20:26 dholland Exp $	*/
2 
3 /*
4  * Copyright (c) 1994 Kazuhisa Shimizu.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *      This product includes software developed by Kazuhisa Shimizu.
18  * 4. The name of the author may not be used to endorse or promote products
19  *    derived from this software without specific prior written permission
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 #include <sys/cdefs.h>
34 __KERNEL_RCSID(0, "$NetBSD: sram.c,v 1.19 2014/03/16 05:20:26 dholland Exp $");
35 
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/proc.h>
39 #include <sys/ioctl.h>
40 #include <sys/file.h>
41 #include <sys/conf.h>
42 #include <sys/bus.h>
43 #include <sys/device.h>
44 
45 #include <machine/sram.h>
46 #include <x68k/dev/intiovar.h>
47 #include <x68k/dev/sramvar.h>
48 
49 #define SRAM_ADDR	(0xed0000)
50 
51 #ifdef DEBUG
52 #define SRAM_DEBUG_OPEN		0x01
53 #define SRAM_DEBUG_CLOSE	0x02
54 #define SRAM_DEBUG_IOCTL	0x04
55 #define SRAM_DEBUG_DONTDOIT	0x08
56 int sramdebug = SRAM_DEBUG_IOCTL;
57 #define DPRINTF(flag, msg)	do {	\
58 	if ((sramdebug & (flag)))	\
59 		printf msg;		\
60 } while (0)
61 #else
62 #define DPRINTF(flag, msg)	/* nothing */
63 #endif
64 
65 int  srammatch(device_t, cfdata_t, void *);
66 void sramattach(device_t, device_t, void *);
67 
68 extern struct cfdriver sram_cd;
69 
70 dev_type_open(sramopen);
71 dev_type_close(sramclose);
72 dev_type_ioctl(sramioctl);
73 
74 CFATTACH_DECL_NEW(sram, sizeof(struct sram_softc),
75 	srammatch, sramattach, NULL, NULL);
76 
77 const struct cdevsw sram_cdevsw = {
78 	.d_open = sramopen,
79 	.d_close = sramclose,
80 	.d_read = noread,
81 	.d_write = nowrite,
82 	.d_ioctl = sramioctl,
83 	.d_stop = nostop,
84 	.d_tty = notty,
85 	.d_poll = nopoll,
86 	.d_mmap = nommap,
87 	.d_kqfilter = nokqfilter,
88 	.d_flag = 0
89 };
90 
91 static int sram_attached;
92 
93 /*
94  *  functions for probeing.
95  */
96 int
97 srammatch(device_t parent, cfdata_t cf, void *aux)
98 {
99 	struct intio_attach_args *ia = aux;
100 
101 	if (sram_attached)
102 		return 0;
103 
104 	if (ia->ia_addr == INTIOCF_ADDR_DEFAULT)
105 		ia->ia_addr = SRAM_ADDR;
106 
107 	/* Fixed parameter */
108 	if (ia->ia_addr != SRAM_ADDR)
109 		return 0;
110 
111 	return 1;
112 }
113 
114 void
115 sramattach(device_t parent, device_t self, void *aux)
116 {
117 	struct sram_softc *sc = device_private(self);
118 	struct intio_attach_args *ia = aux;
119 	bus_space_tag_t iot;
120 	bus_space_handle_t ioh;
121 
122 	/* Map I/O space */
123 	iot = ia->ia_bst;
124 	if (bus_space_map(iot, ia->ia_addr, SRAM_SIZE, 0, &ioh))
125 		goto out;
126 
127 	/* Initialize sc */
128 	sc->sc_iot = iot;
129 	sc->sc_ioh = ioh;
130 
131 	sc->sc_flags = 0;
132 	aprint_normal(": 16k bytes accessible\n");
133 	sram_attached = 1;
134 	return;
135 
136  out:
137 	aprint_normal(": not accessible\n");
138 }
139 
140 
141 /*ARGSUSED*/
142 int
143 sramopen(dev_t dev, int flags, int mode, struct lwp *l)
144 {
145 	struct sram_softc *sc;
146 
147 	DPRINTF(SRAM_DEBUG_OPEN, ("Sram open\n"));
148 
149 	sc = device_lookup_private(&sram_cd, minor(dev));
150 	if (sc == NULL)
151 		return ENXIO;
152 
153 	if (sc->sc_flags & SRF_OPEN)
154 		return EBUSY;
155 
156 	sc->sc_flags |= SRF_OPEN;
157 	if (flags & FREAD)
158 		sc->sc_flags |= SRF_READ;
159 	if (flags & FWRITE)
160 		sc->sc_flags |= SRF_WRITE;
161 
162 	return 0;
163 }
164 
165 /*ARGSUSED*/
166 int
167 sramclose(dev_t dev, int flags, int mode, struct lwp *l)
168 {
169 	struct sram_softc *sc;
170 
171 	DPRINTF(SRAM_DEBUG_CLOSE, ("Sram close\n"));
172 
173 	sc = device_lookup_private(&sram_cd, minor(dev));
174 	if (sc == NULL)
175 		return ENXIO;
176 
177 	if (sc->sc_flags & SRF_OPEN) {
178 		sc->sc_flags = 0;
179 	}
180 	sc->sc_flags &= ~(SRF_READ|SRF_WRITE);
181 
182 	return 0;
183 }
184 
185 /*ARGSUSED*/
186 int
187 sramioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l)
188 {
189 	int error = 0;
190 	struct sram_io *sram_io;
191 	struct sram_softc *sc;
192 
193 	DPRINTF(SRAM_DEBUG_IOCTL, ("Sram ioctl cmd=%lx\n", cmd));
194 
195 	sc = device_lookup_private(&sram_cd, minor(dev));
196 	if (sc == NULL)
197 		return ENXIO;
198 
199 	sram_io = (struct sram_io *)data;
200 	if (sram_io == NULL)
201 		return EFAULT;
202 
203 	switch (cmd) {
204 	case SIOGSRAM:
205 		if ((sc->sc_flags & SRF_READ) == 0)
206 			return EPERM;
207 		DPRINTF(SRAM_DEBUG_IOCTL,
208 			("Sram ioctl SIOGSRAM address=%p\n", data));
209 		DPRINTF(SRAM_DEBUG_IOCTL,
210 			("Sram ioctl SIOGSRAM offset=%x\n", sram_io->offset));
211 		if (sram_io->offset + SRAM_IO_SIZE > SRAM_SIZE)
212 			return EFAULT;
213 		bus_space_read_region_1(sc->sc_iot, sc->sc_ioh, sram_io->offset,
214 			(uint8_t *)&sram_io->sram, SRAM_IO_SIZE);
215 		break;
216 	case SIOPSRAM:
217 		if ((sc->sc_flags & SRF_WRITE) == 0)
218 			return EPERM;
219 		DPRINTF(SRAM_DEBUG_IOCTL,
220     			("Sram ioctl SIOPSRAM address=%p\n", data));
221 		DPRINTF(SRAM_DEBUG_IOCTL,
222     			("Sram ioctl SIOPSRAM offset=%x\n", sram_io->offset));
223 		if (sram_io->offset + SRAM_IO_SIZE > SRAM_SIZE)
224 			return EFAULT;
225 #ifdef DEBUG
226 		if (sramdebug & SRAM_DEBUG_DONTDOIT) {
227 			printf("Sram ioctl SIOPSRAM: skipping actual write\n");
228 			break;
229 		}
230 #endif
231 		intio_set_sysport_sramwp(0x31);
232 		bus_space_write_region_1(sc->sc_iot, sc->sc_ioh,
233 			sram_io->offset, (uint8_t *)&sram_io->sram,
234 			SRAM_IO_SIZE);
235 		intio_set_sysport_sramwp(0x00);
236 		break;
237 	default:
238 		error = EINVAL;
239 		break;
240 	}
241 	return error;
242 }
243