xref: /netbsd-src/sys/arch/x68k/dev/opm.c (revision d710132b4b8ce7f7cccaaf660cb16aa16b4077a0)
1 /*	$NetBSD: opm.c,v 1.10 2002/10/02 16:02:42 thorpej Exp $	*/
2 
3 /*
4  * Copyright (c) 1995 Masanobu Saitoh, Takuya Harakawa.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *	This product includes software developed by Masanobu Saitoh.
18  * 4. Neither the name of the University nor of the Laboratory may be used
19  *    to endorse or promote products derived from this software without
20  *    specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32  * SUCH DAMAGE.
33  */
34 
35 /*
36  * Temporary implementation: not fully bus.h'fied.
37  */
38 
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/device.h>
42 
43 #include <machine/bus.h>
44 #include <machine/cpu.h>
45 
46 #include <arch/x68k/dev/opmreg.h>
47 #include <arch/x68k/dev/intiovar.h>
48 
49 struct opm_softc {
50 	struct device		sc_dev;
51 
52 	bus_space_tag_t		sc_bst;
53 	bus_space_handle_t	sc_bht;
54 	u_int8_t		sc_regs[0x100];
55 	struct opm_voice	sc_vdata[8];
56 };
57 
58 struct opm_softc	*opm0;	/* XXX */
59 
60 static int opm_match __P((struct device *, struct cfdata *, void *));
61 static void opm_attach __P((struct device *, struct device *, void *));
62 
63 CFATTACH_DECL(opm, sizeof (struct opm_softc),
64     opm_match, opm_attach, NULL, NULL);
65 
66 static int
67 opm_match(parent, cf, aux)
68 	struct device *parent;
69 	struct cfdata *cf;
70 	void *aux;
71 {
72 	struct intio_attach_args *ia = aux;
73 
74 	if (strcmp(ia->ia_name, "opm") != 0)
75 		return 0;
76 
77 	if (ia->ia_addr == INTIOCF_ADDR_DEFAULT)
78 		ia->ia_addr = 0xe90000;
79 	ia->ia_size = 0x2000;
80 	if (intio_map_allocate_region (parent, ia, INTIO_MAP_TESTONLY))
81 		return 0;
82 
83 	return 1;
84 }
85 
86 static void
87 opm_attach(parent, self, aux)
88 	struct device *parent, *self;
89 	void *aux;
90 {
91 	struct opm_softc *sc = (struct opm_softc *)self;
92 	struct intio_attach_args *ia = aux;
93 	int r;
94 
95 	printf ("\n");
96 	ia->ia_size = 0x2000;
97 	r = intio_map_allocate_region (parent, ia, INTIO_MAP_ALLOCATE);
98 #ifdef DIAGNOSTIC
99 	if (r)
100 		panic ("IO map for OPM corruption??");
101 #endif
102 
103 	sc->sc_bst = ia->ia_bst;
104 	r = bus_space_map (sc->sc_bst,
105 			   ia->ia_addr, ia->ia_size,
106 			   BUS_SPACE_MAP_SHIFTED,
107 			   &sc->sc_bht);
108 #ifdef DIAGNOSTIC
109 	if (r)
110 		panic ("Cannot map IO space for OPM.");
111 #endif
112 
113 	if (sc->sc_dev.dv_unit == 0)
114 		opm0 = sc;	/* XXX */
115 
116 	return;
117 }
118 
119 void opm_set_volume __P((int, int));
120 void opm_set_key __P((int, int));
121 void opm_set_voice __P((int, struct opm_voice *));
122 void opm_set_voice_sub __P((int, struct opm_operator *));
123 __inline static void writeopm __P((int, int));
124 __inline static int readopm __P((int));
125 void opm_key_on __P((u_char));
126 void opm_key_off __P((u_char));
127 int opmopen __P((dev_t, int, int));
128 int opmclose __P((dev_t));
129 
130 __inline static void
131 writeopm(reg, dat)
132 	int reg, dat;
133 {
134 	while (bus_space_read_1 (opm0->sc_bst, opm0->sc_bht, OPM_DATA) & 0x80);
135 	bus_space_write_1 (opm0->sc_bst, opm0->sc_bht, OPM_REG, reg);
136 	while (bus_space_read_1 (opm0->sc_bst, opm0->sc_bht, OPM_DATA) & 0x80);
137 	bus_space_write_1 (opm0->sc_bst, opm0->sc_bht, OPM_DATA, dat);
138 	opm0->sc_regs[reg] = dat;
139 }
140 
141 __inline static int
142 readopm(reg)
143 	int reg;
144 {
145 	return opm0->sc_regs[reg];
146 }
147 
148 #include "fd.h"
149 #include "vs.h"
150 #include "bell.h"
151 
152 #if NVS > 0
153 void
154 adpcm_chgclk(clk)
155 	u_char	clk;
156 {
157 	writeopm(0x1b, (readopm(0x1b) & ~OPM1B_CT1MSK) | clk);
158 }
159 #endif
160 
161 #if NFD > 0
162 void
163 fdc_force_ready(rdy)
164 	u_char	rdy;
165 {
166 	writeopm(0x1b, (readopm(0x1b) & ~OPM1B_CT2MSK) | rdy);
167 }
168 #endif
169 
170 #if NBELL > 0
171 void
172 opm_key_on(channel)
173 	u_char channel;
174 {
175     writeopm(0x08, opm0->sc_vdata[channel].sm << 3 | channel);
176 }
177 
178 void
179 opm_key_off(channel)
180 	u_char	channel;
181 {
182     writeopm(0x08, channel);
183 }
184 
185 void
186 opm_set_voice(channel, voice)
187 	int channel;
188 	struct opm_voice *voice;
189 {
190 	memcpy(&opm0->sc_vdata[channel], voice, sizeof(struct opm_voice));
191 
192 	opm_set_voice_sub(0x40 + channel, &voice->m1);
193 	opm_set_voice_sub(0x48 + channel, &voice->m2);
194 	opm_set_voice_sub(0x50 + channel, &voice->c1);
195 	opm_set_voice_sub(0x58 + channel, &voice->c2);
196 	writeopm(0x20 + channel, 0xc0 | (voice->fb & 0x7) << 3 | (voice->con & 0x7));
197 }
198 
199 void
200 opm_set_voice_sub(reg, op)
201 	register int reg;
202 	struct opm_operator *op;
203 {
204     /* DT1/MUL */
205     writeopm(reg, (op->dt1 & 0x7) << 3 | (op->mul & 0x7));
206 
207     /* TL */
208     writeopm(reg + 0x20, op->tl & 0x7f);
209 
210     /* KS/AR */
211     writeopm(reg + 0x40, (op->ks & 0x3) << 6 | (op->ar & 0x1f));
212 
213     /* AMS/D1R */
214     writeopm(reg + 0x60, (op->ame & 0x1) << 7 | (op->d1r & 0x1f));
215 
216     /* DT2/D2R */
217     writeopm(reg + 0x80, (op->dt2 & 0x3) << 6 | (op->d2r & 0x1f));
218 
219     /* D1L/RR */
220     writeopm(reg + 0xa0, (op->d1l & 0xf) << 4 | (op->rr & 0xf));
221 }
222 
223 void
224 opm_set_volume(channel, volume)
225 	int channel;
226 	int volume;
227 {
228     int value;
229 
230     switch (opm0->sc_vdata[channel].con) {
231     case 7:
232 	value = opm0->sc_vdata[channel].m1.tl + volume;
233 	writeopm(0x60 + channel, ((value > 0x7f) ? 0x7f : value));
234     case 6:
235     case 5:
236 	value = opm0->sc_vdata[channel].m2.tl + volume;
237 	writeopm(0x68 + channel, ((value > 0x7f) ? 0x7f : value));
238     case 4:
239 	value = opm0->sc_vdata[channel].c1.tl + volume;
240 	writeopm(0x70 + channel, ((value > 0x7f) ? 0x7f : value));
241     case 3:
242     case 2:
243     case 1:
244     case 0:
245 	value = opm0->sc_vdata[channel].c2.tl + volume;
246 	writeopm(0x78 + channel, ((value > 0x7f) ? 0x7f : value));
247     }
248 }
249 
250 void
251 opm_set_key(channel, tone)
252 	int channel;
253 	int tone;
254 {
255 	writeopm(0x28 + channel, tone >> 8);
256 	writeopm(0x30 + channel, tone & 0xff);
257 }
258 
259 /*ARGSUSED*/
260 int
261 opmopen(dev, flag, mode)
262 	dev_t dev;
263 	int flag, mode;
264 {
265 	return 0;
266 }
267 
268 /*ARGSUSED*/
269 int
270 opmclose(dev)
271 	dev_t dev;
272 {
273 	return 0;
274 }
275 
276 #endif
277