xref: /netbsd-src/sys/arch/vax/include/nexus.h (revision ce0bb6e8d2e560ecacbe865a848624f94498063b)
1 /*	$NetBSD: nexus.h,v 1.4 1995/02/23 17:51:42 ragge Exp $	*/
2 
3 /*-
4  * Copyright (c) 1982, 1986 The Regents of the University of California.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *	This product includes software developed by the University of
18  *	California, Berkeley and its contributors.
19  * 4. Neither the name of the University nor the names of its contributors
20  *    may be used to endorse or promote products derived from this software
21  *    without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33  * SUCH DAMAGE.
34  *
35  *	@(#)nexus.h	7.3 (Berkeley) 5/9/91
36  */
37 
38 /*
39  * Information about nexus's.
40  *
41  * Each machine has an address of backplane slots (nexi).
42  * Each nexus is some type of adapter, whose code is the low
43  * byte of the first word of the adapter address space.
44  * At boot time the system looks through the array of available
45  * slots and finds the interconnects for the machine.
46  */
47 #define IO_CMI750       2
48 #define MAXNMCR         1
49 
50 #define	NNEXSBI		16
51 #if VAX8600
52 #define	NNEX8600	NNEXSBI
53 #define	NEXA8600	((struct nexus *)(0x20000000))
54 #define	NEXB8600	((struct nexus *)(0x22000000))
55 #endif
56 #if VAX780
57 #define	NNEX780	NNEXSBI
58 #define	NEX780	((struct nexus *)0x20000000)
59 #endif
60 #if VAX750
61 #define	NNEX750	NNEXSBI
62 #ifndef ASSEMBLER
63 #define NEX750           ((struct nexus*)0xf20000)
64 #else
65 #define NEX750           (0xF20000)
66 #endif
67 #endif
68 #if VAX730
69 #define	NNEX730	NNEXSBI
70 #define	NEX730	((struct nexus *)0xf20000)
71 #endif
72 #if VAX630
73 #define NNEX630 1
74 #define NEX630  ((struct nexus *)0x20088000)
75 #endif
76 #define	NEXSIZE	0x2000
77 
78 #if VAX8600
79 #define	MAXNNEXUS (2 * NNEXSBI)
80 #else
81 #define	MAXNNEXUS NNEXSBI
82 #endif
83 
84 #ifndef ASSEMBLER
85 
86 #include "sys/types.h"
87 
88 struct	nexus {
89 	union nexcsr {
90 		long	nex_csr;
91 		u_char	nex_type;
92 	} nexcsr;
93 	long	nex_pad[NEXSIZE / sizeof (long) - 1];
94 };
95 
96 struct sbi_attach_args {
97 	u_int	nexnum;
98 	u_int	type;
99 	void	*nexaddr;
100 };
101 
102 struct iobus {
103         int io_type;
104         int io_addr;
105         int io_size;
106         int io_details;
107 };
108 
109 struct nexusconnect {
110         int psb_nnexus;
111         struct nexus *psb_nexbase;
112 	int psb_ubatype;
113 	int psb_nubabdp;
114 	caddr_t *psb_umaddr;
115         int *psb_nextype;
116 };
117 
118 extern caddr_t *nex_vec;
119 #define nex_vec_num(ipl, nexnum) nex_vec[(ipl-14)*16+nexnum]
120 
121 #endif
122 
123 /*
124  * Bits in high word of nexus's.
125  */
126 #define	SBI_PARFLT	(1<<31)		/* sbi parity fault */
127 #define	SBI_WSQFLT	(1<<30)		/* write sequence fault */
128 #define	SBI_URDFLT	(1<<29)		/* unexpected read data fault */
129 #define	SBI_ISQFLT	(1<<28)		/* interlock sequence fault */
130 #define	SBI_MXTFLT	(1<<27)		/* multiple transmitter fault */
131 #define	SBI_XMTFLT	(1<<26)		/* transmit fault */
132 
133 #define	NEX_CFGFLT	(0xfc000000)
134 
135 #ifndef LOCORE
136 #if defined(VAX780) || defined(VAX8600)
137 #define	NEXFLT_BITS \
138 "\20\40PARFLT\37WSQFLT\36URDFLT\35ISQFLT\34MXTFLT\33XMTFLT"
139 #endif
140 #endif
141 
142 #define	NEX_APD		(1<<23)		/* adaptor power down */
143 #define	NEX_APU		(1<<22)		/* adaptor power up */
144 
145 #define	MBA_OT		(1<<21)		/* overtemperature */
146 
147 #define	UBA_UBINIT	(1<<18)		/* unibus init */
148 #define	UBA_UBPDN	(1<<17)		/* unibus power down */
149 #define	UBA_UBIC	(1<<16)		/* unibus initialization complete */
150 
151 /*
152  * Types for nex_type.
153  */
154 #define	NEX_ANY		0		/* pseudo for handling 11/750 */
155 #define	NEX_MEM4	0x08		/* 4K chips, non-interleaved mem */
156 #define	NEX_MEM4I	0x09		/* 4K chips, interleaved mem */
157 #define	NEX_MEM16	0x10		/* 16K chips, non-interleaved mem */
158 #define	NEX_MEM16I	0x11		/* 16K chips, interleaved mem */
159 #define	NEX_MBA		0x20		/* Massbus adaptor */
160 #define	NEX_UBA0	0x28		/* Unibus adaptor */
161 #define	NEX_UBA1	0x29		/* 4 flavours for 4 addr spaces */
162 #define	NEX_UBA2	0x2a
163 #define	NEX_UBA3	0x2b
164 #define	NEX_DR32	0x30		/* DR32 user i'face to SBI */
165 #define	NEX_CI		0x38		/* CI adaptor */
166 #define	NEX_MPM0	0x40		/* Multi-port mem */
167 #define	NEX_MPM1	0x41		/* Who knows why 4 different ones ? */
168 #define	NEX_MPM2	0x42
169 #define	NEX_MPM3	0x43
170 #define	NEX_MEM64L	0x68		/* 64K chips, non-interleaved, lower */
171 #define	NEX_MEM64LI	0x69		/* 64K chips, ext-interleaved, lower */
172 #define	NEX_MEM64U	0x6a		/* 64K chips, non-interleaved, upper */
173 #define	NEX_MEM64UI	0x6b		/* 64K chips, ext-interleaved, upper */
174 #define	NEX_MEM64I	0x6c		/* 64K chips, interleaved */
175 #define	NEX_MEM256L	0x70		/* 256K chips, non-interleaved, lower */
176 #define	NEX_MEM256LI	0x71		/* 256K chips, ext-interleaved, lower */
177 #define	NEX_MEM256U	0x72		/* 256K chips, non-interleaved, upper */
178 #define	NEX_MEM256UI	0x73		/* 256K chips, ext-interleaved, upper */
179 #define	NEX_MEM256I	0x74		/* 256K chips, interleaved */
180