1 /* $NetBSD: mtpr.h,v 1.3 1994/11/25 19:08:53 ragge Exp $ */ 2 3 /* 4 * Copyright (c) 1994 Ludd, University of Lule}, Sweden. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed at Ludd, University of Lule}. 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* All bugs are subject to removal without further notice */ 34 35 #ifndef _VAX_MTPR_H_ 36 #define _VAX_MTPR_H_ 37 38 /****************************************************************************** 39 40 Processor register numbers in the VAX /IC 41 42 ******************************************************************************/ 43 44 45 #define PR_KSP 0 /* Kernel Stack Pointer */ 46 #define PR_ESP 1 /* Executive Stack Pointer */ 47 #define PR_SSP 2 /* Supervisor Stack Pointer */ 48 #define PR_USP 3 /* User Stack Pointer */ 49 #define PR_ISP 4 /* Interrupt Stack Pointer */ 50 51 #define PR_P0BR 8 /* P0 Base Register */ 52 #define PR_P0LR 9 /* P0 Length Register */ 53 #define PR_P1BR 10 /* P1 Base Register */ 54 #define PR_P1LR 11 /* P1 Length Register */ 55 #define PR_SBR 12 /* System Base Register */ 56 #define PR_SLR 13 /* System Limit Register */ 57 #define PR_PCBB 16 /* Process Control Block Base */ 58 #define PR_SCBB 17 /* System Control Block Base */ 59 #define PR_IPL 18 /* Interrupt Priority Level */ 60 #define PR_ASTLVL 19 /* AST Level */ 61 #define PR_SIRR 20 /* Software Interrupt Request */ 62 #define PR_SISR 21 /* Software Interrupt Summary */ 63 #define PR_MCSR 23 /* Machine Check Status Register 11/750 */ 64 #define PR_ICCS 24 /* Interval Clock Control */ 65 #define PR_NICR 25 /* Next Interval Count */ 66 #define PR_ICR 26 /* Interval Count */ 67 #define PR_TODR 27 /* Time Of Year (optional) */ 68 #define PR_RXCS 32 /* Console Receiver C/S */ 69 #define PR_RXDB 33 /* Console Receiver D/B */ 70 #define PR_TXCS 34 /* Console Transmit C/S */ 71 #define PR_TXDB 35 /* Console Transmit D/B */ 72 #define PR_TBDR 36 /* Translation Buffer Group Disable Register 11/750 */ 73 #define PR_IUR 37 /* Initialize Unibus Register 11/750 */ 74 #define PR_MCESR 38 /* Machiune Check Error Summary Register 11/750 */ 75 #define PR_MAPEN 56 /* Memory Management Enable */ 76 #define PR_TBIA 57 /* Trans. Buf. Invalidate All */ 77 #define PR_TBIS 58 /* Trans. Buf. Invalidate Single */ 78 #define PR_PMR 61 /* Performance Monnitor Enable */ 79 #define PR_SID 62 /* System ID Register */ 80 #define PR_TBCHK 63 /* Translation Buffer Check */ 81 82 /* Definitions for AST */ 83 #define AST_NO 4 84 #define AST_OK 3 85 86 #ifndef ASSEMBLER 87 88 #define mtpr(val,reg) \ 89 { \ 90 asm __volatile ("mtpr %0,%1" \ 91 : /* No output */ \ 92 : "g" (val), "g" (reg)); \ 93 } 94 95 #define mfpr(reg) \ 96 ({ \ 97 register int val; \ 98 asm __volatile ("mfpr %1,%0" \ 99 : "=g" (val) \ 100 : "g" (reg)); \ 101 val; \ 102 }) 103 #endif /* ASSEMBLER */ 104 105 #endif /* _VAX_MTPR_H_ */ 106