1 /* $NetBSD: macros.h,v 1.9 1996/06/10 15:33:39 cgd Exp $ */ 2 3 /* 4 * Copyright (c) 1994 Ludd, University of Lule}, Sweden. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed at Ludd, University of Lule}. 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* All bugs are subject to removal without further notice */ 34 35 #if !defined(_VAX_MACROS_H_) && (defined(STANDALONE) || \ 36 (!defined(_LOCORE) && defined(_VAX_INLINE_))) 37 #define _VAX_MACROS_H_ 38 39 /* Here general macros are supposed to be stored */ 40 41 static __inline__ int ffs(int reg){ 42 register int val; 43 44 asm __volatile ("ffs $0,$32,%1,%0 45 bneq 1f 46 mnegl $1,%0 47 1: incl %0" 48 : "&=r" (val) 49 : "r" (reg) ); 50 return val; 51 } 52 53 static __inline__ void _remque(void*p){ 54 asm __volatile ("remque (%0),%0;clrl 4(%0)" 55 : 56 : "r" (p) 57 : "memory" ); 58 } 59 60 static __inline__ void _insque(void*p, void*q) { 61 asm __volatile ("insque (%0), (%1)" 62 : 63 : "r" (p),"r" (q) 64 : "memory" ); 65 } 66 67 #define bitset(bitnr,var) \ 68 ({ asm __volatile ("bbss %0,%1,1f;1:;" \ 69 : \ 70 : "g" (bitnr), "g" (var)); \ 71 }) 72 73 #define bitclear(bitnr,var) \ 74 ({ asm __volatile ("bbsc %0,%1,1f;1:;" \ 75 : \ 76 : "g" (bitnr), "g" (var)); \ 77 }) 78 79 #define bitisset(bitnr,var) \ 80 ({ \ 81 register int val; \ 82 asm __volatile ("clrl %0;bbc %1,%2,1f;incl %0;1:;" \ 83 : "=g" (val) \ 84 : "g" (bitnr), "g" (var)); \ 85 val; \ 86 }) 87 88 #define bitisclear(bitnr,var) \ 89 ({ \ 90 register int val; \ 91 asm __volatile ("clrl %0;bbs %1,%2,1f;incl %0;1:;" \ 92 : "=g" (val) \ 93 : "g" (bitnr), "g" (var)); \ 94 val; \ 95 }) 96 static __inline__ void bcopy(const void*from, void*toe, u_int len) { 97 asm __volatile ("movc3 %0,(%1),(%2)" 98 : 99 : "r" (len),"r" (from),"r"(toe) 100 :"r0","r1","r2","r3","r4","r5"); 101 } 102 103 static __inline__ void bzero(void*block, u_int len){ 104 asm __volatile ("movc5 $0,(%0),$0,%1,(%0)" 105 : 106 : "r" (block), "r" (len) 107 :"r0","r1","r2","r3","r4","r5"); 108 } 109 110 static __inline__ int bcmp(const void *b1, const void *b2, size_t len){ 111 register ret; 112 113 asm __volatile("cmpc3 %3,(%1),(%2);movl r0,%0" 114 : "=r" (ret) 115 : "r" (b1), "r" (b2), "r" (len) 116 : "r0","r1","r2","r3" ); 117 return ret; 118 } 119 120 #if 0 /* unused, but no point in deleting it since it _is_ an instruction */ 121 static __inline__ int locc(int mask, char *cp,u_int size){ 122 register ret; 123 124 asm __volatile("locc %1,%2,(%3);movl r0,%0" 125 : "=r" (ret) 126 : "r" (mask),"r"(size),"r"(cp) 127 : "r0","r1" ); 128 return ret; 129 } 130 #endif 131 132 static __inline__ int scanc(u_int size, u_char *cp,u_char *table, int mask){ 133 register ret; 134 135 asm __volatile("scanc %1,(%2),(%3),%4;movl r0,%0" 136 : "=g"(ret) 137 : "r"(size),"r"(cp),"r"(table),"r"(mask) 138 : "r0","r1","r2","r3" ); 139 return ret; 140 } 141 142 static __inline__ int skpc(int mask, size_t size, u_char *cp){ 143 register ret; 144 145 asm __volatile("skpc %1,%2,(%3);movl r0,%0" 146 : "=g"(ret) 147 : "r"(mask),"r"(size),"r"(cp) 148 : "r0","r1" ); 149 return ret; 150 } 151 #if 0 152 static __inline__ int imin(int a, int b){ 153 asm __volatile("cmpl %0,%2;bleq 1f;movl %2,%0;1:" 154 : "=r"(a) 155 : "r"(a),"r"(b) ); 156 return a; 157 } 158 159 static __inline__ int imax(int a, int b){ 160 asm __volatile("cmpl %0,%2;bgeq 1f;movl %2,%0;1:" 161 : "=r"(a) 162 : "r"(a),"r"(b) ); 163 return a; 164 } 165 166 static __inline__ int min(int a, int b){ 167 asm __volatile("cmpl %0,%2;bleq 1f;movl %2,%0;1:" 168 : "=r"(a) 169 : "r"(a),"r"(b) ); 170 return a; 171 } 172 173 static __inline__ int max(int a, int b){ 174 asm __volatile("cmpl %0,%2;bgeq 1f;movl %2,%0;1:" 175 : "=r"(a) 176 : "r"(a),"r"(b) ); 177 return a; 178 } 179 #endif 180 181 static __inline__ void blkcpy(const void*from, void*to, u_int len) { 182 asm __volatile(" 183 movl %0,r1 184 movl %1,r3 185 movl %2,r6 186 jbr 2f 187 1: subl2 r0,r6 188 movc3 r0,(r1),(r3) 189 2: movzwl $65535,r0 190 cmpl r6,r0 191 jgtr 1b 192 movc3 r6,(r1),(r3)" 193 : 194 : "g" (from), "g" (to), "g" (len) 195 : "r0","r1","r2","r3","r4","r5", "r6" ); 196 } 197 198 static __inline__ void blkclr(void *blk, int len) { 199 asm __volatile(" 200 movl %0, r3 201 movl %1, r6 202 jbr 2f 203 1: subl2 r0, r6 204 movc5 $0,(r3),$0,r0,(r3) 205 2: movzwl $65535,r0 206 cmpl r6, r0 207 jgtr 1b 208 movc5 $0,(r3),$0,r6,(r3)" 209 : 210 : "g" (blk), "g" (len) 211 : "r0","r1","r2","r3","r4","r5", "r6" ); 212 } 213 214 #endif /* _VAX_MACROS_H_ */ 215