1 /* $NetBSD: intr.h,v 1.24 2007/03/12 02:22:43 matt Exp $ */ 2 3 /* 4 * Copyright (c) 1998 Matt Thomas. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the company nor the name of the author may be used to 16 * endorse or promote products derived from this software without specific 17 * prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 20 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 21 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 23 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 25 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 */ 31 32 #ifndef _VAX_INTR_H_ 33 #define _VAX_INTR_H_ 34 35 #include <sys/queue.h> 36 #include <machine/mtpr.h> 37 38 /* Define the various Interrupt Priority Levels */ 39 40 /* Interrupt Priority Levels are not mutually exclusive. */ 41 42 /* Hardware interrupt levels are 16 (0x10) thru 31 (0x1f) 43 */ 44 #define IPL_HIGH 0x1f /* high -- blocks all interrupts */ 45 #define IPL_CLOCK 0x18 /* clock */ 46 #define IPL_STATCLOCK IPL_CLOCK 47 #define IPL_UBA 0x17 /* unibus adapters */ 48 #define IPL_VM 0x17 /* memory allocation */ 49 #define IPL_NET 0x16 /* network */ 50 #define IPL_BIO 0x15 /* block I/O */ 51 #define IPL_TTY 0x15 /* terminal */ 52 #define IPL_AUDIO 0x15 /* audio */ 53 #define IPL_IPI 0x14 /* interprocessor interrupt */ 54 #define IPL_CONSMEDIA 0x14 /* console media */ 55 56 /* Software interrupt level s are 0 (0x00) thru 15 (0x0f) 57 */ 58 #define IPL_SOFTDDB 0x0f /* used by DDB on VAX */ 59 #define IPL_SOFTSERIAL 0x0d /* soft serial */ 60 #define IPL_SOFTNET 0x0c /* soft network */ 61 #define IPL_SOFTCLOCK 0x08 62 #define IPL_NONE 0x00 63 64 /* Misc 65 */ 66 67 #define IPL_SCHED IPL_HIGH 68 #define IPL_LOCK IPL_HIGH 69 70 #define IPL_LEVELS 32 71 72 #define IST_UNUSABLE -1 /* interrupt cannot be used */ 73 #define IST_NONE 0 /* none (dummy) */ 74 #define IST_PULSE 1 /* pulsed */ 75 #define IST_EDGE 2 /* edge-triggered */ 76 #define IST_LEVEL 3 /* level-triggered */ 77 78 79 #ifdef _KERNEL 80 typedef int ipl_t; 81 82 static inline void 83 _splset(ipl_t ipl) 84 { 85 mtpr(ipl, PR_IPL); 86 } 87 88 static inline ipl_t 89 _splget(void) 90 { 91 return mfpr(PR_IPL); 92 } 93 94 static inline ipl_t 95 splx(ipl_t new_ipl) 96 { 97 ipl_t old_ipl = _splget(); 98 _splset(new_ipl); 99 return old_ipl; 100 } 101 102 typedef struct { 103 uint8_t _ipl; 104 } ipl_cookie_t; 105 106 static inline ipl_cookie_t 107 makeiplcookie(ipl_t ipl) 108 { 109 return (ipl_cookie_t){._ipl = (uint8_t)ipl}; 110 } 111 112 static inline int 113 splraiseipl(ipl_cookie_t icookie) 114 { 115 ipl_t newipl = icookie._ipl; 116 ipl_t oldipl; 117 118 oldipl = _splget(); 119 if (newipl > oldipl) { 120 _splset(newipl); 121 } 122 return oldipl; 123 } 124 125 #define _setsirr(reg) mtpr((reg), PR_SIRR) 126 127 #define spl0() _splset(IPL_NONE) /* IPL00 */ 128 #define splddb() splraiseipl(makeiplcookie(IPL_SOFTDDB)) /* IPL0F */ 129 #define splconsmedia() splraiseipl(makeiplcookie(IPL_CONSMEDIA)) /* IPL14 */ 130 131 #include <sys/spl.h> 132 133 /* These are better to use when playing with VAX buses */ 134 #define spluba() splraiseipl(makeiplcookie(IPL_UBA)) /* IPL17 */ 135 #define spl4() splx(0x14) 136 #define spl5() splx(0x15) 137 #define spl6() splx(0x16) 138 #define spl7() splx(0x17) 139 140 /* schedule software interrupts 141 */ 142 #define setsoftddb() _setsirr(IPL_SOFTDDB) 143 #define setsoftserial() _setsirr(IPL_SOFTSERIAL) 144 #define setsoftnet() _setsirr(IPL_SOFTNET) 145 146 #if !defined(_LOCORE) 147 LIST_HEAD(sh_head, softintr_handler); 148 149 struct softintr_head { 150 int shd_ipl; 151 struct sh_head shd_intrs; 152 }; 153 154 struct softintr_handler { 155 struct softintr_head *sh_head; 156 LIST_ENTRY(softintr_handler) sh_link; 157 void (*sh_func)(void *); 158 void *sh_arg; 159 int sh_pending; 160 }; 161 162 extern void *softintr_establish(int, void (*)(void *), void *); 163 extern void softintr_disestablish(void *); 164 165 static __inline void 166 softintr_schedule(void *arg) 167 { 168 struct softintr_handler * const sh = arg; 169 sh->sh_pending = 1; 170 _setsirr(sh->sh_head->shd_ipl); 171 } 172 #endif /* _LOCORE */ 173 #endif /* _KERNEL */ 174 #endif /* _VAX_INTR_H */ 175