1 /* $NetBSD: bus.h,v 1.33 2016/04/22 18:13:01 christos Exp $ */ 2 3 /*- 4 * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Copyright (c) 1996 Charles M. Hannum. All rights reserved. 35 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 3. All advertising materials mentioning features or use of this software 46 * must display the following acknowledgement: 47 * This product includes software developed by Christopher G. Demetriou 48 * for the NetBSD Project. 49 * 4. The name of the author may not be used to endorse or promote products 50 * derived from this software without specific prior written permission 51 * 52 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 53 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 54 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 55 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 56 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 57 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 58 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 59 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 60 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 61 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 62 */ 63 64 #ifndef _VAX_BUS_H_ 65 #define _VAX_BUS_H_ 66 67 #ifdef BUS_SPACE_DEBUG 68 #include <sys/systm.h> /* for printf() prototype */ 69 /* 70 * Macros for sanity-checking the aligned-ness of pointers passed to 71 * bus space ops. These are not strictly necessary on the VAX, but 72 * could lead to performance improvements, and help catch problems 73 * with drivers that would creep up on other architectures. 74 */ 75 #define __BUS_SPACE_ALIGNED_ADDRESS(p, t) \ 76 ((((u_long)(p)) & (sizeof(t)-1)) == 0) 77 78 #define __BUS_SPACE_ADDRESS_SANITY(p, t, d) \ 79 ({ \ 80 if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) { \ 81 printf("%s 0x%lx not aligned to %d bytes %s:%d\n", \ 82 d, (u_long)(p), sizeof(t), __FILE__, __LINE__); \ 83 } \ 84 (void) 0; \ 85 }) 86 87 #define BUS_SPACE_ALIGNED_POINTER(p, t) __BUS_SPACE_ALIGNED_ADDRESS(p, t) 88 #else 89 #define __BUS_SPACE_ADDRESS_SANITY(p,t,d) (void) 0 90 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t) 91 #endif /* BUS_SPACE_DEBUG */ 92 93 /* 94 * Bus address and size types 95 */ 96 typedef paddr_t bus_addr_t; 97 typedef psize_t bus_size_t; 98 99 /* 100 * Access methods for bus resources and address space. 101 */ 102 typedef struct vax_bus_space *bus_space_tag_t; 103 typedef vaddr_t bus_space_handle_t; 104 105 struct vax_bus_space { 106 /* cookie */ 107 void *vbs_cookie; 108 109 /* mapping/unmapping */ 110 int (*vbs_map)(void *, bus_addr_t, bus_size_t, int, 111 bus_space_handle_t *, int); 112 void (*vbs_unmap)(void *, bus_space_handle_t, bus_size_t, 113 int); 114 int (*vbs_subregion)(void *, bus_space_handle_t, bus_size_t, 115 bus_size_t, bus_space_handle_t *); 116 117 /* allocation/deallocation */ 118 int (*vbs_alloc)(void *, bus_addr_t, bus_addr_t, bus_size_t, 119 bus_size_t, bus_size_t, int, bus_addr_t *, 120 bus_space_handle_t *); 121 void (*vbs_free)(void *, bus_space_handle_t, bus_size_t); 122 /* mmap bus space for user */ 123 paddr_t (*vbs_mmap)(void *, bus_addr_t, off_t, int, int); 124 }; 125 126 /* 127 * int bus_space_map(bus_space_tag_t t, bus_addr_t addr, 128 * bus_size_t size, int flags, bus_space_handle_t *bshp); 129 * 130 * Map a region of bus space. 131 */ 132 133 #define BUS_SPACE_MAP_CACHEABLE 0x01 134 #define BUS_SPACE_MAP_LINEAR 0x02 135 #define BUS_SPACE_MAP_PREFETCHABLE 0x04 136 137 #define bus_space_map(t, a, s, f, hp) \ 138 (*(t)->vbs_map)((t)->vbs_cookie, (a), (s), (f), (hp), 1) 139 #define vax_bus_space_map_noacct(t, a, s, f, hp) \ 140 (*(t)->vbs_map)((t)->vbs_cookie, (a), (s), (f), (hp), 0) 141 142 /* 143 * int bus_space_unmap(bus_space_tag_t t, 144 * bus_space_handle_t bsh, bus_size_t size); 145 * 146 * Unmap a region of bus space. 147 */ 148 149 #define bus_space_unmap(t, h, s) \ 150 (*(t)->vbs_unmap)((t)->vbs_cookie, (h), (s), 1) 151 #define vax_bus_space_unmap_noacct(t, h, s) \ 152 (*(t)->vbs_unmap)((t)->vbs_cookie, (h), (s), 0) 153 154 /* 155 * int bus_space_subregion(bus_space_tag_t t, 156 * bus_space_handle_t bsh, bus_size_t offset, bus_size_t size, 157 * bus_space_handle_t *nbshp); 158 * 159 * Get a new handle for a subregion of an already-mapped area of bus space. 160 */ 161 162 #define bus_space_subregion(t, h, o, s, nhp) \ 163 (*(t)->vbs_subregion)((t)->vbs_cookie, (h), (o), (s), (nhp)) 164 165 /* 166 * int bus_space_alloc(bus_space_tag_t t, bus_addr_t rstart, 167 * bus_addr_t rend, bus_size_t size, bus_size_t align, 168 * bus_size_t boundary, int flags, bus_addr_t *addrp, 169 * bus_space_handle_t *bshp); 170 * 171 * Allocate a region of bus space. 172 */ 173 174 #define bus_space_alloc(t, rs, re, s, a, b, f, ap, hp) \ 175 (*(t)->vbs_alloc)((t)->vbs_cookie, (rs), (re), (s), (a), (b), \ 176 (f), (ap), (hp)) 177 178 /* 179 * int bus_space_free(bus_space_tag_t t, 180 * bus_space_handle_t bsh, bus_size_t size); 181 * 182 * Free a region of bus space. 183 */ 184 185 #define bus_space_free(t, h, s) \ 186 (*(t)->vbs_free)((t)->vbs_cookie, (h), (s)) 187 /* 188 * Get kernel virtual address for ranges mapped BUS_SPACE_MAP_LINEAR. 189 */ 190 #define bus_space_vaddr(t, h) \ 191 ((void *) (h)) 192 /* 193 * Mmap bus space for a user application. 194 */ 195 #define bus_space_mmap(t, a, o, p, f) \ 196 (*(t)->vbs_mmap)((t)->vbs_cookie, (a), (o), (p), (f)) 197 198 199 /* 200 * u_intN_t bus_space_read_N(bus_space_tag_t tag, 201 * bus_space_handle_t bsh, bus_size_t offset); 202 * 203 * Read a 1, 2, 4, or 8 byte quantity from bus space 204 * described by tag/handle/offset. 205 */ 206 207 #define bus_space_read_1(t, h, o) \ 208 (__USE(t), (*(volatile uint8_t *)((h) + (o)))) 209 210 #define bus_space_read_2(t, h, o) \ 211 (__BUS_SPACE_ADDRESS_SANITY((h) + (o), uint16_t, "bus addr"), \ 212 __USE(t), (*(volatile uint16_t *)((h) + (o)))) 213 214 #define bus_space_read_4(t, h, o) \ 215 (__BUS_SPACE_ADDRESS_SANITY((h) + (o), uint32_t, "bus addr"), \ 216 __USE(t), (*(volatile uint32_t *)((h) + (o)))) 217 218 #if 0 /* Cause a link error for bus_space_read_8 */ 219 #define bus_space_read_8(t, h, o) !!! bus_space_read_8 unimplemented !!! 220 #endif 221 222 /* 223 * void bus_space_read_multi_N(bus_space_tag_t tag, 224 * bus_space_handle_t bsh, bus_size_t offset, 225 * u_intN_t *addr, size_t count); 226 * 227 * Read `count' 1, 2, 4, or 8 byte quantities from bus space 228 * described by tag/handle/offset and copy into buffer provided. 229 */ 230 static __inline void 231 vax_mem_read_multi_1(bus_space_tag_t, bus_space_handle_t, bus_size_t, 232 uint8_t *, size_t), 233 vax_mem_read_multi_2(bus_space_tag_t, bus_space_handle_t, bus_size_t, 234 uint16_t *, size_t), 235 vax_mem_read_multi_4(bus_space_tag_t, bus_space_handle_t, bus_size_t, 236 uint32_t *, size_t); 237 238 #define bus_space_read_multi_1(t, h, o, a, c) \ 239 vax_mem_read_multi_1((t), (h), (o), (a), (c)) 240 241 #define bus_space_read_multi_2(t, h, o, a, c) \ 242 do { \ 243 __BUS_SPACE_ADDRESS_SANITY((a), uint16_t, "buffer"); \ 244 __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint16_t, "bus addr"); \ 245 vax_mem_read_multi_2((t), (h), (o), (a), (c)); \ 246 } while (0) 247 248 #define bus_space_read_multi_4(t, h, o, a, c) \ 249 do { \ 250 __BUS_SPACE_ADDRESS_SANITY((a), uint32_t, "buffer"); \ 251 __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint32_t, "bus addr"); \ 252 vax_mem_read_multi_4((t), (h), (o), (a), (c)); \ 253 } while (0) 254 255 #if 0 /* Cause a link error for bus_space_read_multi_8 */ 256 #define bus_space_read_multi_8 !!! bus_space_read_multi_8 unimplemented !!! 257 #endif 258 259 static __inline void 260 vax_mem_read_multi_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 261 uint8_t *a, size_t c) 262 { 263 const bus_addr_t addr = h + o; 264 265 for (; c != 0; c--, a++) 266 *a = *(volatile uint8_t *)(addr); 267 } 268 269 static __inline void 270 vax_mem_read_multi_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 271 uint16_t *a, size_t c) 272 { 273 const bus_addr_t addr = h + o; 274 275 for (; c != 0; c--, a++) 276 *a = *(volatile uint16_t *)(addr); 277 } 278 279 static __inline void 280 vax_mem_read_multi_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 281 uint32_t *a, size_t c) 282 { 283 const bus_addr_t addr = h + o; 284 285 for (; c != 0; c--, a++) 286 *a = *(volatile uint32_t *)(addr); 287 } 288 289 /* 290 * void bus_space_read_region_N(bus_space_tag_t tag, 291 * bus_space_handle_t bsh, bus_size_t offset, 292 * u_intN_t *addr, size_t count); 293 * 294 * Read `count' 1, 2, 4, or 8 byte quantities from bus space 295 * described by tag/handle and starting at `offset' and copy into 296 * buffer provided. 297 */ 298 299 static __inline void vax_mem_read_region_1(bus_space_tag_t, 300 bus_space_handle_t, bus_size_t, uint8_t *, size_t); 301 static __inline void vax_mem_read_region_2(bus_space_tag_t, 302 bus_space_handle_t, bus_size_t, uint16_t *, size_t); 303 static __inline void vax_mem_read_region_4(bus_space_tag_t, 304 bus_space_handle_t, bus_size_t, uint32_t *, size_t); 305 306 #define bus_space_read_region_1(t, h, o, a, c) \ 307 do { \ 308 vax_mem_read_region_1((t), (h), (o), (a), (c)); \ 309 } while (0) 310 311 #define bus_space_read_region_2(t, h, o, a, c) \ 312 do { \ 313 __BUS_SPACE_ADDRESS_SANITY((a), uint16_t, "buffer"); \ 314 __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint16_t, "bus addr"); \ 315 vax_mem_read_region_2((t), (h), (o), (a), (c)); \ 316 } while (0) 317 318 #define bus_space_read_region_4(t, h, o, a, c) \ 319 do { \ 320 __BUS_SPACE_ADDRESS_SANITY((a), uint32_t, "buffer"); \ 321 __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint32_t, "bus addr"); \ 322 vax_mem_read_region_4((t), (h), (o), (a), (c)); \ 323 } while (0) 324 325 #if 0 /* Cause a link error for bus_space_read_region_8 */ 326 #define bus_space_read_region_8 \ 327 !!! bus_space_read_region_8 unimplemented !!! 328 #endif 329 330 static __inline void 331 vax_mem_read_region_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 332 uint8_t *a, size_t c) 333 { 334 bus_addr_t addr = h + o; 335 336 for (; c != 0; c--, addr++, a++) 337 *a = *(volatile uint8_t *)(addr); 338 } 339 340 static __inline void 341 vax_mem_read_region_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 342 uint16_t *a, size_t c) 343 { 344 bus_addr_t addr = h + o; 345 346 for (; c != 0; c--, addr += 2, a++) 347 *a = *(volatile uint16_t *)(addr); 348 } 349 350 static __inline void 351 vax_mem_read_region_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 352 uint32_t *a, size_t c) 353 { 354 bus_addr_t addr = h + o; 355 356 for (; c != 0; c--, addr += 4, a++) 357 *a = *(volatile uint32_t *)(addr); 358 } 359 360 /* 361 * void bus_space_write_N(bus_space_tag_t tag, 362 * bus_space_handle_t bsh, bus_size_t offset, 363 * u_intN_t value); 364 * 365 * Write the 1, 2, 4, or 8 byte value `value' to bus space 366 * described by tag/handle/offset. 367 */ 368 369 #define bus_space_write_1(t, h, o, v) \ 370 do { \ 371 __USE(t); \ 372 ((void)(*(volatile uint8_t *)((h) + (o)) = (v))); \ 373 } while (0) 374 375 #define bus_space_write_2(t, h, o, v) \ 376 do { \ 377 __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint16_t, "bus addr"); \ 378 __USE(t); \ 379 ((void)(*(volatile uint16_t *)((h) + (o)) = (v))); \ 380 } while (0) 381 382 #define bus_space_write_4(t, h, o, v) \ 383 do { \ 384 __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint32_t, "bus addr"); \ 385 __USE(t); \ 386 ((void)(*(volatile uint32_t *)((h) + (o)) = (v))); \ 387 } while (0) 388 389 #if 0 /* Cause a link error for bus_space_write_8 */ 390 #define bus_space_write_8 !!! bus_space_write_8 not implemented !!! 391 #endif 392 393 /* 394 * void bus_space_write_multi_N(bus_space_tag_t tag, 395 * bus_space_handle_t bsh, bus_size_t offset, 396 * const u_intN_t *addr, size_t count); 397 * 398 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer 399 * provided to bus space described by tag/handle/offset. 400 */ 401 static __inline void 402 vax_mem_write_multi_1(bus_space_tag_t, bus_space_handle_t, bus_size_t, 403 const uint8_t *, size_t), 404 vax_mem_write_multi_2(bus_space_tag_t, bus_space_handle_t, bus_size_t, 405 const uint16_t *, size_t), 406 vax_mem_write_multi_4(bus_space_tag_t, bus_space_handle_t, bus_size_t, 407 const uint32_t *, size_t); 408 409 #define bus_space_write_multi_1(t, h, o, a, c) \ 410 do { \ 411 vax_mem_write_multi_1((t), (h), (o), (a), (c)); \ 412 } while (0) 413 414 #define bus_space_write_multi_2(t, h, o, a, c) \ 415 do { \ 416 __BUS_SPACE_ADDRESS_SANITY((a), uint16_t, "buffer"); \ 417 __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint16_t, "bus addr"); \ 418 vax_mem_write_multi_2((t), (h), (o), (a), (c)); \ 419 } while (0) 420 421 #define bus_space_write_multi_4(t, h, o, a, c) \ 422 do { \ 423 __BUS_SPACE_ADDRESS_SANITY((a), uint32_t, "buffer"); \ 424 __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint32_t, "bus addr"); \ 425 vax_mem_write_multi_4((t), (h), (o), (a), (c)); \ 426 } while (0) 427 428 #if 0 /* Cause a link error for bus_space_write_multi_8 */ 429 #define bus_space_write_multi_8(t, h, o, a, c) \ 430 !!! bus_space_write_multi_8 unimplemented !!! 431 #endif 432 433 static __inline void 434 vax_mem_write_multi_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 435 const uint8_t *a, size_t c) 436 { 437 const bus_addr_t addr = h + o; 438 439 for (; c != 0; c--, a++) 440 *(volatile uint8_t *)(addr) = *a; 441 } 442 443 static __inline void 444 vax_mem_write_multi_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 445 const uint16_t *a, size_t c) 446 { 447 const bus_addr_t addr = h + o; 448 449 for (; c != 0; c--, a++) 450 *(volatile uint16_t *)(addr) = *a; 451 } 452 453 static __inline void 454 vax_mem_write_multi_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 455 const uint32_t *a, size_t c) 456 { 457 const bus_addr_t addr = h + o; 458 459 for (; c != 0; c--, a++) 460 *(volatile uint32_t *)(addr) = *a; 461 } 462 463 /* 464 * void bus_space_write_region_N(bus_space_tag_t tag, 465 * bus_space_handle_t bsh, bus_size_t offset, 466 * const u_intN_t *addr, size_t count); 467 * 468 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided 469 * to bus space described by tag/handle starting at `offset'. 470 */ 471 static __inline void 472 vax_mem_write_region_1(bus_space_tag_t, bus_space_handle_t, bus_size_t, 473 const uint8_t *, size_t), 474 vax_mem_write_region_2(bus_space_tag_t, bus_space_handle_t, bus_size_t, 475 const uint16_t *, size_t), 476 vax_mem_write_region_4(bus_space_tag_t, bus_space_handle_t, bus_size_t, 477 const uint32_t *, size_t); 478 479 #define bus_space_write_region_1(t, h, o, a, c) \ 480 vax_mem_write_region_1((t), (h), (o), (a), (c)) 481 482 #define bus_space_write_region_2(t, h, o, a, c) \ 483 do { \ 484 __BUS_SPACE_ADDRESS_SANITY((a), uint16_t, "buffer"); \ 485 __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint16_t, "bus addr"); \ 486 vax_mem_write_region_2((t), (h), (o), (a), (c)); \ 487 } while (0) 488 489 #define bus_space_write_region_4(t, h, o, a, c) \ 490 do { \ 491 __BUS_SPACE_ADDRESS_SANITY((a), uint32_t, "buffer"); \ 492 __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint32_t, "bus addr"); \ 493 vax_mem_write_region_4((t), (h), (o), (a), (c)); \ 494 } while (0) 495 496 #if 0 /* Cause a link error for bus_space_write_region_8 */ 497 #define bus_space_write_region_8 \ 498 !!! bus_space_write_region_8 unimplemented !!! 499 #endif 500 501 static __inline void 502 vax_mem_write_region_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 503 const uint8_t *a, size_t c) 504 { 505 bus_addr_t addr = h + o; 506 507 for (; c != 0; c--, addr++, a++) 508 *(volatile uint8_t *)(addr) = *a; 509 } 510 511 static __inline void 512 vax_mem_write_region_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 513 const uint16_t *a, size_t c) 514 { 515 bus_addr_t addr = h + o; 516 517 for (; c != 0; c--, addr++, a++) 518 *(volatile uint16_t *)(addr) = *a; 519 } 520 521 static __inline void 522 vax_mem_write_region_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 523 const uint32_t *a, size_t c) 524 { 525 bus_addr_t addr = h + o; 526 527 for (; c != 0; c--, addr++, a++) 528 *(volatile uint32_t *)(addr) = *a; 529 } 530 531 /* 532 * void bus_space_set_multi_N(bus_space_tag_t tag, 533 * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val, 534 * size_t count); 535 * 536 * Write the 1, 2, 4, or 8 byte value `val' to bus space described 537 * by tag/handle/offset `count' times. 538 */ 539 540 static __inline void 541 vax_mem_set_multi_1(bus_space_tag_t, bus_space_handle_t, bus_size_t, 542 uint8_t, size_t), 543 vax_mem_set_multi_2(bus_space_tag_t, bus_space_handle_t, bus_size_t, 544 uint16_t, size_t), 545 vax_mem_set_multi_4(bus_space_tag_t, bus_space_handle_t, bus_size_t, 546 uint32_t, size_t); 547 548 #define bus_space_set_multi_1(t, h, o, v, c) \ 549 vax_mem_set_multi_1((t), (h), (o), (v), (c)) 550 551 #define bus_space_set_multi_2(t, h, o, v, c) \ 552 do { \ 553 __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint16_t, "bus addr"); \ 554 vax_mem_set_multi_2((t), (h), (o), (v), (c)); \ 555 } while (0) 556 557 #define bus_space_set_multi_4(t, h, o, v, c) \ 558 do { \ 559 __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint32_t, "bus addr"); \ 560 vax_mem_set_multi_4((t), (h), (o), (v), (c)); \ 561 } while (0) 562 563 static __inline void 564 vax_mem_set_multi_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 565 uint8_t v, size_t c) 566 { 567 bus_addr_t addr = h + o; 568 569 while (c--) 570 *(volatile uint8_t *)(addr) = v; 571 } 572 573 static __inline void 574 vax_mem_set_multi_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 575 uint16_t v, size_t c) 576 { 577 bus_addr_t addr = h + o; 578 579 while (c--) 580 *(volatile uint16_t *)(addr) = v; 581 } 582 583 static __inline void 584 vax_mem_set_multi_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 585 uint32_t v, size_t c) 586 { 587 bus_addr_t addr = h + o; 588 589 while (c--) 590 *(volatile uint32_t *)(addr) = v; 591 } 592 593 #if 0 /* Cause a link error for bus_space_set_multi_8 */ 594 #define bus_space_set_multi_8 !!! bus_space_set_multi_8 unimplemented !!! 595 #endif 596 597 /* 598 * void bus_space_set_region_N(bus_space_tag_t tag, 599 * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val, 600 * size_t count); 601 * 602 * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described 603 * by tag/handle starting at `offset'. 604 */ 605 606 static __inline void 607 vax_mem_set_region_1(bus_space_tag_t, bus_space_handle_t, bus_size_t, 608 uint8_t, size_t), 609 vax_mem_set_region_2(bus_space_tag_t, bus_space_handle_t, bus_size_t, 610 uint16_t, size_t), 611 vax_mem_set_region_4(bus_space_tag_t, bus_space_handle_t, bus_size_t, 612 uint32_t, size_t); 613 614 #define bus_space_set_region_1(t, h, o, v, c) \ 615 vax_mem_set_region_1((t), (h), (o), (v), (c)) 616 617 #define bus_space_set_region_2(t, h, o, v, c) \ 618 do { \ 619 __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint16_t, "bus addr"); \ 620 vax_mem_set_region_2((t), (h), (o), (v), (c)); \ 621 } while (0) 622 623 #define bus_space_set_region_4(t, h, o, v, c) \ 624 do { \ 625 __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint32_t, "bus addr"); \ 626 vax_mem_set_region_4((t), (h), (o), (v), (c)); \ 627 } while (0) 628 629 static __inline void 630 vax_mem_set_region_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 631 uint8_t v, size_t c) 632 { 633 bus_addr_t addr = h + o; 634 635 for (; c != 0; c--, addr++) 636 *(volatile uint8_t *)(addr) = v; 637 } 638 639 static __inline void 640 vax_mem_set_region_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 641 uint16_t v, size_t c) 642 { 643 bus_addr_t addr = h + o; 644 645 for (; c != 0; c--, addr += 2) 646 *(volatile uint16_t *)(addr) = v; 647 } 648 649 static __inline void 650 vax_mem_set_region_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 651 uint32_t v, size_t c) 652 { 653 bus_addr_t addr = h + o; 654 655 for (; c != 0; c--, addr += 4) 656 *(volatile uint32_t *)(addr) = v; 657 } 658 659 #if 0 /* Cause a link error for bus_space_set_region_8 */ 660 #define bus_space_set_region_8 !!! bus_space_set_region_8 unimplemented !!! 661 #endif 662 663 /* 664 * void bus_space_copy_region_N(bus_space_tag_t tag, 665 * bus_space_handle_t bsh1, bus_size_t off1, 666 * bus_space_handle_t bsh2, bus_size_t off2, 667 * size_t count); 668 * 669 * Copy `count' 1, 2, 4, or 8 byte values from bus space starting 670 * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2. 671 */ 672 673 static __inline void 674 vax_mem_copy_region_1(bus_space_tag_t, bus_space_handle_t, bus_size_t, 675 bus_space_handle_t, bus_size_t, size_t), 676 vax_mem_copy_region_2(bus_space_tag_t, bus_space_handle_t, bus_size_t, 677 bus_space_handle_t, bus_size_t, size_t), 678 vax_mem_copy_region_4(bus_space_tag_t, bus_space_handle_t, bus_size_t, 679 bus_space_handle_t, bus_size_t, size_t); 680 681 #define bus_space_copy_region_1(t, h1, o1, h2, o2, c) \ 682 vax_mem_copy_region_1((t), (h1), (o1), (h2), (o2), (c)) 683 684 #define bus_space_copy_region_2(t, h1, o1, h2, o2, c) \ 685 do { \ 686 __BUS_SPACE_ADDRESS_SANITY((h1) + (o1), uint16_t, "bus addr 1"); \ 687 __BUS_SPACE_ADDRESS_SANITY((h2) + (o2), uint16_t, "bus addr 2"); \ 688 vax_mem_copy_region_2((t), (h1), (o1), (h2), (o2), (c)); \ 689 } while (0) 690 691 #define bus_space_copy_region_4(t, h1, o1, h2, o2, c) \ 692 do { \ 693 __BUS_SPACE_ADDRESS_SANITY((h1) + (o1), uint32_t, "bus addr 1"); \ 694 __BUS_SPACE_ADDRESS_SANITY((h2) + (o2), uint32_t, "bus addr 2"); \ 695 vax_mem_copy_region_4((t), (h1), (o1), (h2), (o2), (c)); \ 696 } while (0) 697 698 static __inline void 699 vax_mem_copy_region_1(bus_space_tag_t t, bus_space_handle_t h1, bus_size_t o1, 700 bus_space_handle_t h2, bus_size_t o2, size_t c) 701 { 702 bus_addr_t addr1 = h1 + o1; 703 bus_addr_t addr2 = h2 + o2; 704 705 if (addr1 >= addr2) { 706 /* src after dest: copy forward */ 707 for (; c != 0; c--, addr1++, addr2++) 708 *(volatile uint8_t *)(addr2) = 709 *(volatile uint8_t *)(addr1); 710 } else { 711 /* dest after src: copy backwards */ 712 for (addr1 += (c - 1), addr2 += (c - 1); 713 c != 0; c--, addr1--, addr2--) 714 *(volatile uint8_t *)(addr2) = 715 *(volatile uint8_t *)(addr1); 716 } 717 } 718 719 static __inline void 720 vax_mem_copy_region_2(bus_space_tag_t t, bus_space_handle_t h1, bus_size_t o1, 721 bus_space_handle_t h2, bus_size_t o2, size_t c) 722 { 723 bus_addr_t addr1 = h1 + o1; 724 bus_addr_t addr2 = h2 + o2; 725 726 if (addr1 >= addr2) { 727 /* src after dest: copy forward */ 728 for (; c != 0; c--, addr1 += 2, addr2 += 2) 729 *(volatile uint16_t *)(addr2) = 730 *(volatile uint16_t *)(addr1); 731 } else { 732 /* dest after src: copy backwards */ 733 for (addr1 += 2 * (c - 1), addr2 += 2 * (c - 1); 734 c != 0; c--, addr1 -= 2, addr2 -= 2) 735 *(volatile uint16_t *)(addr2) = 736 *(volatile uint16_t *)(addr1); 737 } 738 } 739 740 static __inline void 741 vax_mem_copy_region_4(bus_space_tag_t t, bus_space_handle_t h1, bus_size_t o1, 742 bus_space_handle_t h2, bus_size_t o2, size_t c) 743 { 744 bus_addr_t addr1 = h1 + o1; 745 bus_addr_t addr2 = h2 + o2; 746 747 if (addr1 >= addr2) { 748 /* src after dest: copy forward */ 749 for (; c != 0; c--, addr1 += 4, addr2 += 4) 750 *(volatile uint32_t *)(addr2) = 751 *(volatile uint32_t *)(addr1); 752 } else { 753 /* dest after src: copy backwards */ 754 for (addr1 += 4 * (c - 1), addr2 += 4 * (c - 1); 755 c != 0; c--, addr1 -= 4, addr2 -= 4) 756 *(volatile uint32_t *)(addr2) = 757 *(volatile uint32_t *)(addr1); 758 } 759 } 760 761 #if 0 /* Cause a link error for bus_space_copy_8 */ 762 #define bus_space_copy_region_8 !!! bus_space_copy_region_8 unimplemented !!! 763 #endif 764 765 766 /* 767 * Bus read/write barrier methods. 768 * 769 * void bus_space_barrier(bus_space_tag_t tag, 770 * bus_space_handle_t bsh, bus_size_t offset, 771 * bus_size_t len, int flags); 772 * 773 * Note: the vax does not currently require barriers, but we must 774 * provide the flags to MI code. 775 */ 776 #define bus_space_barrier(t, h, o, l, f) \ 777 ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f))) 778 #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */ 779 #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */ 780 781 782 /* 783 * Flags used in various bus DMA methods. 784 */ 785 #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */ 786 #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */ 787 #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */ 788 #define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */ 789 #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */ 790 #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */ 791 #define BUS_DMA_BUS2 0x020 792 #define BUS_DMA_BUS3 0x040 793 #define BUS_DMA_BUS4 0x080 794 #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */ 795 #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */ 796 #define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */ 797 798 #define VAX_BUS_DMA_SPILLPAGE BUS_DMA_BUS1 /* VS4000 kludge */ 799 /* 800 * Private flags stored in the DMA map. 801 */ 802 #define DMAMAP_HAS_SGMAP 0x80000000 /* sgva/len are valid */ 803 804 /* Forwards needed by prototypes below. */ 805 struct mbuf; 806 struct uio; 807 struct vax_sgmap; 808 809 /* 810 * Operations performed by bus_dmamap_sync(). 811 */ 812 #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */ 813 #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */ 814 #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */ 815 #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */ 816 817 /* 818 * vax_bus_t 819 * 820 * Busses supported by NetBSD/vax, used by internal 821 * utility functions. NOT TO BE USED BY MACHINE-INDEPENDENT 822 * CODE! 823 */ 824 typedef enum { 825 VAX_BUS_MAINBUS, 826 VAX_BUS_SBI, 827 VAX_BUS_MASSBUS, 828 VAX_BUS_UNIBUS, /* Also handles QBUS */ 829 VAX_BUS_BI, 830 VAX_BUS_XMI, 831 VAX_BUS_TURBOCHANNEL 832 } vax_bus_t; 833 834 typedef struct vax_bus_dma_tag *bus_dma_tag_t; 835 typedef struct vax_bus_dmamap *bus_dmamap_t; 836 837 #define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0) 838 839 /* 840 * bus_dma_segment_t 841 * 842 * Describes a single contiguous DMA transaction. Values 843 * are suitable for programming into DMA registers. 844 */ 845 struct vax_bus_dma_segment { 846 bus_addr_t ds_addr; /* DMA address */ 847 bus_size_t ds_len; /* length of transfer */ 848 }; 849 typedef struct vax_bus_dma_segment bus_dma_segment_t; 850 851 struct proc; 852 853 /* 854 * bus_dma_tag_t 855 * 856 * A machine-dependent opaque type describing the implementation of 857 * DMA for a given bus. 858 */ 859 struct vax_bus_dma_tag { 860 void *_cookie; /* cookie used in the guts */ 861 bus_addr_t _wbase; /* DMA window base */ 862 bus_size_t _wsize; /* DMA window size */ 863 864 /* 865 * Some chipsets have a built-in boundary constraint, independent 866 * of what the device requests. This allows that boundary to 867 * be specified. If the device has a more restrictive constraint, 868 * the map will use that, otherwise this boundary will be used. 869 * This value is ignored if 0. 870 */ 871 bus_size_t _boundary; 872 873 /* 874 * A bus may have more than one SGMAP window, so SGMAP 875 * windows also get a pointer to their SGMAP state. 876 */ 877 struct vax_sgmap *_sgmap; 878 879 /* 880 * Internal-use only utility methods. NOT TO BE USED BY 881 * MACHINE-INDEPENDENT CODE! 882 */ 883 bus_dma_tag_t (*_get_tag)(bus_dma_tag_t, vax_bus_t); 884 885 /* 886 * DMA mapping methods. 887 */ 888 int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int, 889 bus_size_t, bus_size_t, int, bus_dmamap_t *); 890 void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t); 891 int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *, 892 bus_size_t, struct proc *, int); 893 int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t, 894 struct mbuf *, int); 895 int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t, 896 struct uio *, int); 897 int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t, 898 bus_dma_segment_t *, int, bus_size_t, int); 899 void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t); 900 void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t, 901 bus_addr_t, bus_size_t, int); 902 903 /* 904 * DMA memory utility functions. 905 */ 906 int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t, 907 bus_size_t, bus_dma_segment_t *, int, int *, int); 908 void (*_dmamem_free)(bus_dma_tag_t, bus_dma_segment_t *, int); 909 int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *, 910 int, size_t, void **, int); 911 void (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t); 912 paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *, 913 int, off_t, int, int); 914 }; 915 916 #define vaxbus_dma_get_tag(t, b) \ 917 (*(t)->_get_tag)(t, b) 918 919 #define bus_dmamap_create(t, s, n, m, b, f, p) \ 920 (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p)) 921 #define bus_dmamap_destroy(t, p) \ 922 (*(t)->_dmamap_destroy)((t), (p)) 923 #define bus_dmamap_load(t, m, b, s, p, f) \ 924 (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f)) 925 #define bus_dmamap_load_mbuf(t, m, b, f) \ 926 (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f)) 927 #define bus_dmamap_load_uio(t, m, u, f) \ 928 (*(t)->_dmamap_load_uio)((t), (m), (u), (f)) 929 #define bus_dmamap_load_raw(t, m, sg, n, s, f) \ 930 (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f)) 931 #define bus_dmamap_unload(t, p) \ 932 (*(t)->_dmamap_unload)((t), (p)) 933 #define bus_dmamap_sync(t, p, o, l, ops) \ 934 (*(t)->_dmamap_sync)((t), (p), (o), (l), (ops)) 935 #define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \ 936 (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f)) 937 #define bus_dmamem_free(t, sg, n) \ 938 (*(t)->_dmamem_free)((t), (sg), (n)) 939 #define bus_dmamem_map(t, sg, n, s, k, f) \ 940 (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f)) 941 #define bus_dmamem_unmap(t, k, s) \ 942 (*(t)->_dmamem_unmap)((t), (k), (s)) 943 #define bus_dmamem_mmap(t, sg, n, o, p, f) \ 944 (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f)) 945 946 #define bus_dmatag_subregion(t, mna, mxa, nt, f) EOPNOTSUPP 947 #define bus_dmatag_destroy(t) 948 949 /* 950 * bus_dmamap_t 951 * 952 * Describes a DMA mapping. 953 */ 954 struct vax_bus_dmamap { 955 /* 956 * PRIVATE MEMBERS: not for use my machine-independent code. 957 */ 958 bus_size_t _dm_size; /* largest DMA transfer mappable */ 959 int _dm_segcnt; /* number of segs this map can map */ 960 bus_size_t _dm_maxmaxsegsz; /* fixed largest possible segment */ 961 bus_size_t _dm_boundary; /* don't cross this */ 962 int _dm_flags; /* misc. flags */ 963 964 /* 965 * This is used only for SGMAP-mapped DMA, but we keep it 966 * here to avoid pointless indirection. 967 */ 968 int _dm_pteidx; /* PTE index */ 969 int _dm_ptecnt; /* PTE count */ 970 u_long _dm_sgva; /* allocated sgva */ 971 bus_size_t _dm_sgvalen; /* svga length */ 972 973 /* 974 * PUBLIC MEMBERS: these are used by machine-independent code. 975 */ 976 bus_size_t dm_maxsegsz; /* largest possible segment */ 977 bus_size_t dm_mapsize; /* size of the mapping */ 978 int dm_nsegs; /* # valid segments in mapping */ 979 bus_dma_segment_t dm_segs[1]; /* segments; variable length */ 980 }; 981 982 /*#ifdef _VAX_BUS_DMA_PRIVATE */ 983 int _bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t, 984 bus_size_t, int, bus_dmamap_t *); 985 void _bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t); 986 987 int _bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, 988 void *, bus_size_t, struct proc *, int); 989 int _bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t, struct mbuf *, int); 990 int _bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t, struct uio *, int); 991 int _bus_dmamap_load_raw(bus_dma_tag_t, 992 bus_dmamap_t, bus_dma_segment_t *, int, bus_size_t, int); 993 994 void _bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t); 995 void _bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 996 bus_size_t, int); 997 998 int _bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size, 999 bus_size_t alignment, bus_size_t boundary, 1000 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags); 1001 void _bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs, int nsegs); 1002 int _bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs, 1003 int nsegs, size_t size, void **kvap, int flags); 1004 void _bus_dmamem_unmap(bus_dma_tag_t tag, void *kva, size_t size); 1005 paddr_t _bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs, 1006 int nsegs, off_t off, int prot, int flags); 1007 /*#endif*/ /* _VAX_BUS_DMA_PRIVATE */ 1008 1009 #endif /* _VAX_BUS_H_ */ 1010