1 /* $NetBSD: bus.h,v 1.32 2015/07/05 02:03:36 matt Exp $ */ 2 3 /*- 4 * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Copyright (c) 1996 Charles M. Hannum. All rights reserved. 35 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 3. All advertising materials mentioning features or use of this software 46 * must display the following acknowledgement: 47 * This product includes software developed by Christopher G. Demetriou 48 * for the NetBSD Project. 49 * 4. The name of the author may not be used to endorse or promote products 50 * derived from this software without specific prior written permission 51 * 52 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 53 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 54 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 55 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 56 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 57 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 58 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 59 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 60 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 61 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 62 */ 63 64 #ifndef _VAX_BUS_H_ 65 #define _VAX_BUS_H_ 66 67 #ifdef BUS_SPACE_DEBUG 68 #include <sys/systm.h> /* for printf() prototype */ 69 /* 70 * Macros for sanity-checking the aligned-ness of pointers passed to 71 * bus space ops. These are not strictly necessary on the VAX, but 72 * could lead to performance improvements, and help catch problems 73 * with drivers that would creep up on other architectures. 74 */ 75 #define __BUS_SPACE_ALIGNED_ADDRESS(p, t) \ 76 ((((u_long)(p)) & (sizeof(t)-1)) == 0) 77 78 #define __BUS_SPACE_ADDRESS_SANITY(p, t, d) \ 79 ({ \ 80 if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) { \ 81 printf("%s 0x%lx not aligned to %d bytes %s:%d\n", \ 82 d, (u_long)(p), sizeof(t), __FILE__, __LINE__); \ 83 } \ 84 (void) 0; \ 85 }) 86 87 #define BUS_SPACE_ALIGNED_POINTER(p, t) __BUS_SPACE_ALIGNED_ADDRESS(p, t) 88 #else 89 #define __BUS_SPACE_ADDRESS_SANITY(p,t,d) (void) 0 90 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t) 91 #endif /* BUS_SPACE_DEBUG */ 92 93 /* 94 * Bus address and size types 95 */ 96 typedef paddr_t bus_addr_t; 97 typedef psize_t bus_size_t; 98 99 /* 100 * Access methods for bus resources and address space. 101 */ 102 typedef struct vax_bus_space *bus_space_tag_t; 103 typedef vaddr_t bus_space_handle_t; 104 105 struct vax_bus_space { 106 /* cookie */ 107 void *vbs_cookie; 108 109 /* mapping/unmapping */ 110 int (*vbs_map)(void *, bus_addr_t, bus_size_t, int, 111 bus_space_handle_t *, int); 112 void (*vbs_unmap)(void *, bus_space_handle_t, bus_size_t, 113 int); 114 int (*vbs_subregion)(void *, bus_space_handle_t, bus_size_t, 115 bus_size_t, bus_space_handle_t *); 116 117 /* allocation/deallocation */ 118 int (*vbs_alloc)(void *, bus_addr_t, bus_addr_t, bus_size_t, 119 bus_size_t, bus_size_t, int, bus_addr_t *, 120 bus_space_handle_t *); 121 void (*vbs_free)(void *, bus_space_handle_t, bus_size_t); 122 /* mmap bus space for user */ 123 paddr_t (*vbs_mmap)(void *, bus_addr_t, off_t, int, int); 124 }; 125 126 /* 127 * int bus_space_map(bus_space_tag_t t, bus_addr_t addr, 128 * bus_size_t size, int flags, bus_space_handle_t *bshp); 129 * 130 * Map a region of bus space. 131 */ 132 133 #define BUS_SPACE_MAP_CACHEABLE 0x01 134 #define BUS_SPACE_MAP_LINEAR 0x02 135 #define BUS_SPACE_MAP_PREFETCHABLE 0x04 136 137 #define bus_space_map(t, a, s, f, hp) \ 138 (*(t)->vbs_map)((t)->vbs_cookie, (a), (s), (f), (hp), 1) 139 #define vax_bus_space_map_noacct(t, a, s, f, hp) \ 140 (*(t)->vbs_map)((t)->vbs_cookie, (a), (s), (f), (hp), 0) 141 142 /* 143 * int bus_space_unmap(bus_space_tag_t t, 144 * bus_space_handle_t bsh, bus_size_t size); 145 * 146 * Unmap a region of bus space. 147 */ 148 149 #define bus_space_unmap(t, h, s) \ 150 (*(t)->vbs_unmap)((t)->vbs_cookie, (h), (s), 1) 151 #define vax_bus_space_unmap_noacct(t, h, s) \ 152 (*(t)->vbs_unmap)((t)->vbs_cookie, (h), (s), 0) 153 154 /* 155 * int bus_space_subregion(bus_space_tag_t t, 156 * bus_space_handle_t bsh, bus_size_t offset, bus_size_t size, 157 * bus_space_handle_t *nbshp); 158 * 159 * Get a new handle for a subregion of an already-mapped area of bus space. 160 */ 161 162 #define bus_space_subregion(t, h, o, s, nhp) \ 163 (*(t)->vbs_subregion)((t)->vbs_cookie, (h), (o), (s), (nhp)) 164 165 /* 166 * int bus_space_alloc(bus_space_tag_t t, bus_addr_t rstart, 167 * bus_addr_t rend, bus_size_t size, bus_size_t align, 168 * bus_size_t boundary, int flags, bus_addr_t *addrp, 169 * bus_space_handle_t *bshp); 170 * 171 * Allocate a region of bus space. 172 */ 173 174 #define bus_space_alloc(t, rs, re, s, a, b, f, ap, hp) \ 175 (*(t)->vbs_alloc)((t)->vbs_cookie, (rs), (re), (s), (a), (b), \ 176 (f), (ap), (hp)) 177 178 /* 179 * int bus_space_free(bus_space_tag_t t, 180 * bus_space_handle_t bsh, bus_size_t size); 181 * 182 * Free a region of bus space. 183 */ 184 185 #define bus_space_free(t, h, s) \ 186 (*(t)->vbs_free)((t)->vbs_cookie, (h), (s)) 187 /* 188 * Get kernel virtual address for ranges mapped BUS_SPACE_MAP_LINEAR. 189 */ 190 #define bus_space_vaddr(t, h) \ 191 ((void *) (h)) 192 /* 193 * Mmap bus space for a user application. 194 */ 195 #define bus_space_mmap(t, a, o, p, f) \ 196 (*(t)->vbs_mmap)((t)->vbs_cookie, (a), (o), (p), (f)) 197 198 199 /* 200 * u_intN_t bus_space_read_N(bus_space_tag_t tag, 201 * bus_space_handle_t bsh, bus_size_t offset); 202 * 203 * Read a 1, 2, 4, or 8 byte quantity from bus space 204 * described by tag/handle/offset. 205 */ 206 207 #define bus_space_read_1(t, h, o) \ 208 (*(volatile uint8_t *)((h) + (o))) 209 210 #define bus_space_read_2(t, h, o) \ 211 (__BUS_SPACE_ADDRESS_SANITY((h) + (o), uint16_t, "bus addr"), \ 212 (*(volatile uint16_t *)((h) + (o)))) 213 214 #define bus_space_read_4(t, h, o) \ 215 (__BUS_SPACE_ADDRESS_SANITY((h) + (o), uint32_t, "bus addr"), \ 216 (*(volatile uint32_t *)((h) + (o)))) 217 218 #if 0 /* Cause a link error for bus_space_read_8 */ 219 #define bus_space_read_8(t, h, o) !!! bus_space_read_8 unimplemented !!! 220 #endif 221 222 /* 223 * void bus_space_read_multi_N(bus_space_tag_t tag, 224 * bus_space_handle_t bsh, bus_size_t offset, 225 * u_intN_t *addr, size_t count); 226 * 227 * Read `count' 1, 2, 4, or 8 byte quantities from bus space 228 * described by tag/handle/offset and copy into buffer provided. 229 */ 230 static __inline void 231 vax_mem_read_multi_1(bus_space_tag_t, bus_space_handle_t, bus_size_t, 232 uint8_t *, size_t), 233 vax_mem_read_multi_2(bus_space_tag_t, bus_space_handle_t, bus_size_t, 234 uint16_t *, size_t), 235 vax_mem_read_multi_4(bus_space_tag_t, bus_space_handle_t, bus_size_t, 236 uint32_t *, size_t); 237 238 #define bus_space_read_multi_1(t, h, o, a, c) \ 239 vax_mem_read_multi_1((t), (h), (o), (a), (c)) 240 241 #define bus_space_read_multi_2(t, h, o, a, c) \ 242 do { \ 243 __BUS_SPACE_ADDRESS_SANITY((a), uint16_t, "buffer"); \ 244 __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint16_t, "bus addr"); \ 245 vax_mem_read_multi_2((t), (h), (o), (a), (c)); \ 246 } while (0) 247 248 #define bus_space_read_multi_4(t, h, o, a, c) \ 249 do { \ 250 __BUS_SPACE_ADDRESS_SANITY((a), uint32_t, "buffer"); \ 251 __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint32_t, "bus addr"); \ 252 vax_mem_read_multi_4((t), (h), (o), (a), (c)); \ 253 } while (0) 254 255 #if 0 /* Cause a link error for bus_space_read_multi_8 */ 256 #define bus_space_read_multi_8 !!! bus_space_read_multi_8 unimplemented !!! 257 #endif 258 259 static __inline void 260 vax_mem_read_multi_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 261 uint8_t *a, size_t c) 262 { 263 const bus_addr_t addr = h + o; 264 265 for (; c != 0; c--, a++) 266 *a = *(volatile uint8_t *)(addr); 267 } 268 269 static __inline void 270 vax_mem_read_multi_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 271 uint16_t *a, size_t c) 272 { 273 const bus_addr_t addr = h + o; 274 275 for (; c != 0; c--, a++) 276 *a = *(volatile uint16_t *)(addr); 277 } 278 279 static __inline void 280 vax_mem_read_multi_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 281 uint32_t *a, size_t c) 282 { 283 const bus_addr_t addr = h + o; 284 285 for (; c != 0; c--, a++) 286 *a = *(volatile uint32_t *)(addr); 287 } 288 289 /* 290 * void bus_space_read_region_N(bus_space_tag_t tag, 291 * bus_space_handle_t bsh, bus_size_t offset, 292 * u_intN_t *addr, size_t count); 293 * 294 * Read `count' 1, 2, 4, or 8 byte quantities from bus space 295 * described by tag/handle and starting at `offset' and copy into 296 * buffer provided. 297 */ 298 299 static __inline void vax_mem_read_region_1(bus_space_tag_t, 300 bus_space_handle_t, bus_size_t, uint8_t *, size_t); 301 static __inline void vax_mem_read_region_2(bus_space_tag_t, 302 bus_space_handle_t, bus_size_t, uint16_t *, size_t); 303 static __inline void vax_mem_read_region_4(bus_space_tag_t, 304 bus_space_handle_t, bus_size_t, uint32_t *, size_t); 305 306 #define bus_space_read_region_1(t, h, o, a, c) \ 307 do { \ 308 vax_mem_read_region_1((t), (h), (o), (a), (c)); \ 309 } while (0) 310 311 #define bus_space_read_region_2(t, h, o, a, c) \ 312 do { \ 313 __BUS_SPACE_ADDRESS_SANITY((a), uint16_t, "buffer"); \ 314 __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint16_t, "bus addr"); \ 315 vax_mem_read_region_2((t), (h), (o), (a), (c)); \ 316 } while (0) 317 318 #define bus_space_read_region_4(t, h, o, a, c) \ 319 do { \ 320 __BUS_SPACE_ADDRESS_SANITY((a), uint32_t, "buffer"); \ 321 __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint32_t, "bus addr"); \ 322 vax_mem_read_region_4((t), (h), (o), (a), (c)); \ 323 } while (0) 324 325 #if 0 /* Cause a link error for bus_space_read_region_8 */ 326 #define bus_space_read_region_8 \ 327 !!! bus_space_read_region_8 unimplemented !!! 328 #endif 329 330 static __inline void 331 vax_mem_read_region_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 332 uint8_t *a, size_t c) 333 { 334 bus_addr_t addr = h + o; 335 336 for (; c != 0; c--, addr++, a++) 337 *a = *(volatile uint8_t *)(addr); 338 } 339 340 static __inline void 341 vax_mem_read_region_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 342 uint16_t *a, size_t c) 343 { 344 bus_addr_t addr = h + o; 345 346 for (; c != 0; c--, addr += 2, a++) 347 *a = *(volatile uint16_t *)(addr); 348 } 349 350 static __inline void 351 vax_mem_read_region_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 352 uint32_t *a, size_t c) 353 { 354 bus_addr_t addr = h + o; 355 356 for (; c != 0; c--, addr += 4, a++) 357 *a = *(volatile uint32_t *)(addr); 358 } 359 360 /* 361 * void bus_space_write_N(bus_space_tag_t tag, 362 * bus_space_handle_t bsh, bus_size_t offset, 363 * u_intN_t value); 364 * 365 * Write the 1, 2, 4, or 8 byte value `value' to bus space 366 * described by tag/handle/offset. 367 */ 368 369 #define bus_space_write_1(t, h, o, v) \ 370 do { \ 371 ((void)(*(volatile uint8_t *)((h) + (o)) = (v))); \ 372 } while (0) 373 374 #define bus_space_write_2(t, h, o, v) \ 375 do { \ 376 __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint16_t, "bus addr"); \ 377 ((void)(*(volatile uint16_t *)((h) + (o)) = (v))); \ 378 } while (0) 379 380 #define bus_space_write_4(t, h, o, v) \ 381 do { \ 382 __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint32_t, "bus addr"); \ 383 ((void)(*(volatile uint32_t *)((h) + (o)) = (v))); \ 384 } while (0) 385 386 #if 0 /* Cause a link error for bus_space_write_8 */ 387 #define bus_space_write_8 !!! bus_space_write_8 not implemented !!! 388 #endif 389 390 /* 391 * void bus_space_write_multi_N(bus_space_tag_t tag, 392 * bus_space_handle_t bsh, bus_size_t offset, 393 * const u_intN_t *addr, size_t count); 394 * 395 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer 396 * provided to bus space described by tag/handle/offset. 397 */ 398 static __inline void 399 vax_mem_write_multi_1(bus_space_tag_t, bus_space_handle_t, bus_size_t, 400 const uint8_t *, size_t), 401 vax_mem_write_multi_2(bus_space_tag_t, bus_space_handle_t, bus_size_t, 402 const uint16_t *, size_t), 403 vax_mem_write_multi_4(bus_space_tag_t, bus_space_handle_t, bus_size_t, 404 const uint32_t *, size_t); 405 406 #define bus_space_write_multi_1(t, h, o, a, c) \ 407 do { \ 408 vax_mem_write_multi_1((t), (h), (o), (a), (c)); \ 409 } while (0) 410 411 #define bus_space_write_multi_2(t, h, o, a, c) \ 412 do { \ 413 __BUS_SPACE_ADDRESS_SANITY((a), uint16_t, "buffer"); \ 414 __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint16_t, "bus addr"); \ 415 vax_mem_write_multi_2((t), (h), (o), (a), (c)); \ 416 } while (0) 417 418 #define bus_space_write_multi_4(t, h, o, a, c) \ 419 do { \ 420 __BUS_SPACE_ADDRESS_SANITY((a), uint32_t, "buffer"); \ 421 __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint32_t, "bus addr"); \ 422 vax_mem_write_multi_4((t), (h), (o), (a), (c)); \ 423 } while (0) 424 425 #if 0 /* Cause a link error for bus_space_write_multi_8 */ 426 #define bus_space_write_multi_8(t, h, o, a, c) \ 427 !!! bus_space_write_multi_8 unimplemented !!! 428 #endif 429 430 static __inline void 431 vax_mem_write_multi_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 432 const uint8_t *a, size_t c) 433 { 434 const bus_addr_t addr = h + o; 435 436 for (; c != 0; c--, a++) 437 *(volatile uint8_t *)(addr) = *a; 438 } 439 440 static __inline void 441 vax_mem_write_multi_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 442 const uint16_t *a, size_t c) 443 { 444 const bus_addr_t addr = h + o; 445 446 for (; c != 0; c--, a++) 447 *(volatile uint16_t *)(addr) = *a; 448 } 449 450 static __inline void 451 vax_mem_write_multi_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 452 const uint32_t *a, size_t c) 453 { 454 const bus_addr_t addr = h + o; 455 456 for (; c != 0; c--, a++) 457 *(volatile uint32_t *)(addr) = *a; 458 } 459 460 /* 461 * void bus_space_write_region_N(bus_space_tag_t tag, 462 * bus_space_handle_t bsh, bus_size_t offset, 463 * const u_intN_t *addr, size_t count); 464 * 465 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided 466 * to bus space described by tag/handle starting at `offset'. 467 */ 468 static __inline void 469 vax_mem_write_region_1(bus_space_tag_t, bus_space_handle_t, bus_size_t, 470 const uint8_t *, size_t), 471 vax_mem_write_region_2(bus_space_tag_t, bus_space_handle_t, bus_size_t, 472 const uint16_t *, size_t), 473 vax_mem_write_region_4(bus_space_tag_t, bus_space_handle_t, bus_size_t, 474 const uint32_t *, size_t); 475 476 #define bus_space_write_region_1(t, h, o, a, c) \ 477 vax_mem_write_region_1((t), (h), (o), (a), (c)) 478 479 #define bus_space_write_region_2(t, h, o, a, c) \ 480 do { \ 481 __BUS_SPACE_ADDRESS_SANITY((a), uint16_t, "buffer"); \ 482 __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint16_t, "bus addr"); \ 483 vax_mem_write_region_2((t), (h), (o), (a), (c)); \ 484 } while (0) 485 486 #define bus_space_write_region_4(t, h, o, a, c) \ 487 do { \ 488 __BUS_SPACE_ADDRESS_SANITY((a), uint32_t, "buffer"); \ 489 __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint32_t, "bus addr"); \ 490 vax_mem_write_region_4((t), (h), (o), (a), (c)); \ 491 } while (0) 492 493 #if 0 /* Cause a link error for bus_space_write_region_8 */ 494 #define bus_space_write_region_8 \ 495 !!! bus_space_write_region_8 unimplemented !!! 496 #endif 497 498 static __inline void 499 vax_mem_write_region_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 500 const uint8_t *a, size_t c) 501 { 502 bus_addr_t addr = h + o; 503 504 for (; c != 0; c--, addr++, a++) 505 *(volatile uint8_t *)(addr) = *a; 506 } 507 508 static __inline void 509 vax_mem_write_region_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 510 const uint16_t *a, size_t c) 511 { 512 bus_addr_t addr = h + o; 513 514 for (; c != 0; c--, addr++, a++) 515 *(volatile uint16_t *)(addr) = *a; 516 } 517 518 static __inline void 519 vax_mem_write_region_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 520 const uint32_t *a, size_t c) 521 { 522 bus_addr_t addr = h + o; 523 524 for (; c != 0; c--, addr++, a++) 525 *(volatile uint32_t *)(addr) = *a; 526 } 527 528 /* 529 * void bus_space_set_multi_N(bus_space_tag_t tag, 530 * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val, 531 * size_t count); 532 * 533 * Write the 1, 2, 4, or 8 byte value `val' to bus space described 534 * by tag/handle/offset `count' times. 535 */ 536 537 static __inline void 538 vax_mem_set_multi_1(bus_space_tag_t, bus_space_handle_t, bus_size_t, 539 uint8_t, size_t), 540 vax_mem_set_multi_2(bus_space_tag_t, bus_space_handle_t, bus_size_t, 541 uint16_t, size_t), 542 vax_mem_set_multi_4(bus_space_tag_t, bus_space_handle_t, bus_size_t, 543 uint32_t, size_t); 544 545 #define bus_space_set_multi_1(t, h, o, v, c) \ 546 vax_mem_set_multi_1((t), (h), (o), (v), (c)) 547 548 #define bus_space_set_multi_2(t, h, o, v, c) \ 549 do { \ 550 __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint16_t, "bus addr"); \ 551 vax_mem_set_multi_2((t), (h), (o), (v), (c)); \ 552 } while (0) 553 554 #define bus_space_set_multi_4(t, h, o, v, c) \ 555 do { \ 556 __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint32_t, "bus addr"); \ 557 vax_mem_set_multi_4((t), (h), (o), (v), (c)); \ 558 } while (0) 559 560 static __inline void 561 vax_mem_set_multi_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 562 uint8_t v, size_t c) 563 { 564 bus_addr_t addr = h + o; 565 566 while (c--) 567 *(volatile uint8_t *)(addr) = v; 568 } 569 570 static __inline void 571 vax_mem_set_multi_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 572 uint16_t v, size_t c) 573 { 574 bus_addr_t addr = h + o; 575 576 while (c--) 577 *(volatile uint16_t *)(addr) = v; 578 } 579 580 static __inline void 581 vax_mem_set_multi_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 582 uint32_t v, size_t c) 583 { 584 bus_addr_t addr = h + o; 585 586 while (c--) 587 *(volatile uint32_t *)(addr) = v; 588 } 589 590 #if 0 /* Cause a link error for bus_space_set_multi_8 */ 591 #define bus_space_set_multi_8 !!! bus_space_set_multi_8 unimplemented !!! 592 #endif 593 594 /* 595 * void bus_space_set_region_N(bus_space_tag_t tag, 596 * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val, 597 * size_t count); 598 * 599 * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described 600 * by tag/handle starting at `offset'. 601 */ 602 603 static __inline void 604 vax_mem_set_region_1(bus_space_tag_t, bus_space_handle_t, bus_size_t, 605 uint8_t, size_t), 606 vax_mem_set_region_2(bus_space_tag_t, bus_space_handle_t, bus_size_t, 607 uint16_t, size_t), 608 vax_mem_set_region_4(bus_space_tag_t, bus_space_handle_t, bus_size_t, 609 uint32_t, size_t); 610 611 #define bus_space_set_region_1(t, h, o, v, c) \ 612 vax_mem_set_region_1((t), (h), (o), (v), (c)) 613 614 #define bus_space_set_region_2(t, h, o, v, c) \ 615 do { \ 616 __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint16_t, "bus addr"); \ 617 vax_mem_set_region_2((t), (h), (o), (v), (c)); \ 618 } while (0) 619 620 #define bus_space_set_region_4(t, h, o, v, c) \ 621 do { \ 622 __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint32_t, "bus addr"); \ 623 vax_mem_set_region_4((t), (h), (o), (v), (c)); \ 624 } while (0) 625 626 static __inline void 627 vax_mem_set_region_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 628 uint8_t v, size_t c) 629 { 630 bus_addr_t addr = h + o; 631 632 for (; c != 0; c--, addr++) 633 *(volatile uint8_t *)(addr) = v; 634 } 635 636 static __inline void 637 vax_mem_set_region_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 638 uint16_t v, size_t c) 639 { 640 bus_addr_t addr = h + o; 641 642 for (; c != 0; c--, addr += 2) 643 *(volatile uint16_t *)(addr) = v; 644 } 645 646 static __inline void 647 vax_mem_set_region_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, 648 uint32_t v, size_t c) 649 { 650 bus_addr_t addr = h + o; 651 652 for (; c != 0; c--, addr += 4) 653 *(volatile uint32_t *)(addr) = v; 654 } 655 656 #if 0 /* Cause a link error for bus_space_set_region_8 */ 657 #define bus_space_set_region_8 !!! bus_space_set_region_8 unimplemented !!! 658 #endif 659 660 /* 661 * void bus_space_copy_region_N(bus_space_tag_t tag, 662 * bus_space_handle_t bsh1, bus_size_t off1, 663 * bus_space_handle_t bsh2, bus_size_t off2, 664 * size_t count); 665 * 666 * Copy `count' 1, 2, 4, or 8 byte values from bus space starting 667 * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2. 668 */ 669 670 static __inline void 671 vax_mem_copy_region_1(bus_space_tag_t, bus_space_handle_t, bus_size_t, 672 bus_space_handle_t, bus_size_t, size_t), 673 vax_mem_copy_region_2(bus_space_tag_t, bus_space_handle_t, bus_size_t, 674 bus_space_handle_t, bus_size_t, size_t), 675 vax_mem_copy_region_4(bus_space_tag_t, bus_space_handle_t, bus_size_t, 676 bus_space_handle_t, bus_size_t, size_t); 677 678 #define bus_space_copy_region_1(t, h1, o1, h2, o2, c) \ 679 vax_mem_copy_region_1((t), (h1), (o1), (h2), (o2), (c)) 680 681 #define bus_space_copy_region_2(t, h1, o1, h2, o2, c) \ 682 do { \ 683 __BUS_SPACE_ADDRESS_SANITY((h1) + (o1), uint16_t, "bus addr 1"); \ 684 __BUS_SPACE_ADDRESS_SANITY((h2) + (o2), uint16_t, "bus addr 2"); \ 685 vax_mem_copy_region_2((t), (h1), (o1), (h2), (o2), (c)); \ 686 } while (0) 687 688 #define bus_space_copy_region_4(t, h1, o1, h2, o2, c) \ 689 do { \ 690 __BUS_SPACE_ADDRESS_SANITY((h1) + (o1), uint32_t, "bus addr 1"); \ 691 __BUS_SPACE_ADDRESS_SANITY((h2) + (o2), uint32_t, "bus addr 2"); \ 692 vax_mem_copy_region_4((t), (h1), (o1), (h2), (o2), (c)); \ 693 } while (0) 694 695 static __inline void 696 vax_mem_copy_region_1(bus_space_tag_t t, bus_space_handle_t h1, bus_size_t o1, 697 bus_space_handle_t h2, bus_size_t o2, size_t c) 698 { 699 bus_addr_t addr1 = h1 + o1; 700 bus_addr_t addr2 = h2 + o2; 701 702 if (addr1 >= addr2) { 703 /* src after dest: copy forward */ 704 for (; c != 0; c--, addr1++, addr2++) 705 *(volatile uint8_t *)(addr2) = 706 *(volatile uint8_t *)(addr1); 707 } else { 708 /* dest after src: copy backwards */ 709 for (addr1 += (c - 1), addr2 += (c - 1); 710 c != 0; c--, addr1--, addr2--) 711 *(volatile uint8_t *)(addr2) = 712 *(volatile uint8_t *)(addr1); 713 } 714 } 715 716 static __inline void 717 vax_mem_copy_region_2(bus_space_tag_t t, bus_space_handle_t h1, bus_size_t o1, 718 bus_space_handle_t h2, bus_size_t o2, size_t c) 719 { 720 bus_addr_t addr1 = h1 + o1; 721 bus_addr_t addr2 = h2 + o2; 722 723 if (addr1 >= addr2) { 724 /* src after dest: copy forward */ 725 for (; c != 0; c--, addr1 += 2, addr2 += 2) 726 *(volatile uint16_t *)(addr2) = 727 *(volatile uint16_t *)(addr1); 728 } else { 729 /* dest after src: copy backwards */ 730 for (addr1 += 2 * (c - 1), addr2 += 2 * (c - 1); 731 c != 0; c--, addr1 -= 2, addr2 -= 2) 732 *(volatile uint16_t *)(addr2) = 733 *(volatile uint16_t *)(addr1); 734 } 735 } 736 737 static __inline void 738 vax_mem_copy_region_4(bus_space_tag_t t, bus_space_handle_t h1, bus_size_t o1, 739 bus_space_handle_t h2, bus_size_t o2, size_t c) 740 { 741 bus_addr_t addr1 = h1 + o1; 742 bus_addr_t addr2 = h2 + o2; 743 744 if (addr1 >= addr2) { 745 /* src after dest: copy forward */ 746 for (; c != 0; c--, addr1 += 4, addr2 += 4) 747 *(volatile uint32_t *)(addr2) = 748 *(volatile uint32_t *)(addr1); 749 } else { 750 /* dest after src: copy backwards */ 751 for (addr1 += 4 * (c - 1), addr2 += 4 * (c - 1); 752 c != 0; c--, addr1 -= 4, addr2 -= 4) 753 *(volatile uint32_t *)(addr2) = 754 *(volatile uint32_t *)(addr1); 755 } 756 } 757 758 #if 0 /* Cause a link error for bus_space_copy_8 */ 759 #define bus_space_copy_region_8 !!! bus_space_copy_region_8 unimplemented !!! 760 #endif 761 762 763 /* 764 * Bus read/write barrier methods. 765 * 766 * void bus_space_barrier(bus_space_tag_t tag, 767 * bus_space_handle_t bsh, bus_size_t offset, 768 * bus_size_t len, int flags); 769 * 770 * Note: the vax does not currently require barriers, but we must 771 * provide the flags to MI code. 772 */ 773 #define bus_space_barrier(t, h, o, l, f) \ 774 ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f))) 775 #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */ 776 #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */ 777 778 779 /* 780 * Flags used in various bus DMA methods. 781 */ 782 #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */ 783 #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */ 784 #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */ 785 #define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */ 786 #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */ 787 #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */ 788 #define BUS_DMA_BUS2 0x020 789 #define BUS_DMA_BUS3 0x040 790 #define BUS_DMA_BUS4 0x080 791 #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */ 792 #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */ 793 #define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */ 794 795 #define VAX_BUS_DMA_SPILLPAGE BUS_DMA_BUS1 /* VS4000 kludge */ 796 /* 797 * Private flags stored in the DMA map. 798 */ 799 #define DMAMAP_HAS_SGMAP 0x80000000 /* sgva/len are valid */ 800 801 /* Forwards needed by prototypes below. */ 802 struct mbuf; 803 struct uio; 804 struct vax_sgmap; 805 806 /* 807 * Operations performed by bus_dmamap_sync(). 808 */ 809 #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */ 810 #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */ 811 #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */ 812 #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */ 813 814 /* 815 * vax_bus_t 816 * 817 * Busses supported by NetBSD/vax, used by internal 818 * utility functions. NOT TO BE USED BY MACHINE-INDEPENDENT 819 * CODE! 820 */ 821 typedef enum { 822 VAX_BUS_MAINBUS, 823 VAX_BUS_SBI, 824 VAX_BUS_MASSBUS, 825 VAX_BUS_UNIBUS, /* Also handles QBUS */ 826 VAX_BUS_BI, 827 VAX_BUS_XMI, 828 VAX_BUS_TURBOCHANNEL 829 } vax_bus_t; 830 831 typedef struct vax_bus_dma_tag *bus_dma_tag_t; 832 typedef struct vax_bus_dmamap *bus_dmamap_t; 833 834 #define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0) 835 836 /* 837 * bus_dma_segment_t 838 * 839 * Describes a single contiguous DMA transaction. Values 840 * are suitable for programming into DMA registers. 841 */ 842 struct vax_bus_dma_segment { 843 bus_addr_t ds_addr; /* DMA address */ 844 bus_size_t ds_len; /* length of transfer */ 845 }; 846 typedef struct vax_bus_dma_segment bus_dma_segment_t; 847 848 struct proc; 849 850 /* 851 * bus_dma_tag_t 852 * 853 * A machine-dependent opaque type describing the implementation of 854 * DMA for a given bus. 855 */ 856 struct vax_bus_dma_tag { 857 void *_cookie; /* cookie used in the guts */ 858 bus_addr_t _wbase; /* DMA window base */ 859 bus_size_t _wsize; /* DMA window size */ 860 861 /* 862 * Some chipsets have a built-in boundary constraint, independent 863 * of what the device requests. This allows that boundary to 864 * be specified. If the device has a more restrictive constraint, 865 * the map will use that, otherwise this boundary will be used. 866 * This value is ignored if 0. 867 */ 868 bus_size_t _boundary; 869 870 /* 871 * A bus may have more than one SGMAP window, so SGMAP 872 * windows also get a pointer to their SGMAP state. 873 */ 874 struct vax_sgmap *_sgmap; 875 876 /* 877 * Internal-use only utility methods. NOT TO BE USED BY 878 * MACHINE-INDEPENDENT CODE! 879 */ 880 bus_dma_tag_t (*_get_tag)(bus_dma_tag_t, vax_bus_t); 881 882 /* 883 * DMA mapping methods. 884 */ 885 int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int, 886 bus_size_t, bus_size_t, int, bus_dmamap_t *); 887 void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t); 888 int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *, 889 bus_size_t, struct proc *, int); 890 int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t, 891 struct mbuf *, int); 892 int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t, 893 struct uio *, int); 894 int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t, 895 bus_dma_segment_t *, int, bus_size_t, int); 896 void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t); 897 void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t, 898 bus_addr_t, bus_size_t, int); 899 900 /* 901 * DMA memory utility functions. 902 */ 903 int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t, 904 bus_size_t, bus_dma_segment_t *, int, int *, int); 905 void (*_dmamem_free)(bus_dma_tag_t, bus_dma_segment_t *, int); 906 int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *, 907 int, size_t, void **, int); 908 void (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t); 909 paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *, 910 int, off_t, int, int); 911 }; 912 913 #define vaxbus_dma_get_tag(t, b) \ 914 (*(t)->_get_tag)(t, b) 915 916 #define bus_dmamap_create(t, s, n, m, b, f, p) \ 917 (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p)) 918 #define bus_dmamap_destroy(t, p) \ 919 (*(t)->_dmamap_destroy)((t), (p)) 920 #define bus_dmamap_load(t, m, b, s, p, f) \ 921 (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f)) 922 #define bus_dmamap_load_mbuf(t, m, b, f) \ 923 (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f)) 924 #define bus_dmamap_load_uio(t, m, u, f) \ 925 (*(t)->_dmamap_load_uio)((t), (m), (u), (f)) 926 #define bus_dmamap_load_raw(t, m, sg, n, s, f) \ 927 (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f)) 928 #define bus_dmamap_unload(t, p) \ 929 (*(t)->_dmamap_unload)((t), (p)) 930 #define bus_dmamap_sync(t, p, o, l, ops) \ 931 (*(t)->_dmamap_sync)((t), (p), (o), (l), (ops)) 932 #define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \ 933 (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f)) 934 #define bus_dmamem_free(t, sg, n) \ 935 (*(t)->_dmamem_free)((t), (sg), (n)) 936 #define bus_dmamem_map(t, sg, n, s, k, f) \ 937 (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f)) 938 #define bus_dmamem_unmap(t, k, s) \ 939 (*(t)->_dmamem_unmap)((t), (k), (s)) 940 #define bus_dmamem_mmap(t, sg, n, o, p, f) \ 941 (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f)) 942 943 #define bus_dmatag_subregion(t, mna, mxa, nt, f) EOPNOTSUPP 944 #define bus_dmatag_destroy(t) 945 946 /* 947 * bus_dmamap_t 948 * 949 * Describes a DMA mapping. 950 */ 951 struct vax_bus_dmamap { 952 /* 953 * PRIVATE MEMBERS: not for use my machine-independent code. 954 */ 955 bus_size_t _dm_size; /* largest DMA transfer mappable */ 956 int _dm_segcnt; /* number of segs this map can map */ 957 bus_size_t _dm_maxmaxsegsz; /* fixed largest possible segment */ 958 bus_size_t _dm_boundary; /* don't cross this */ 959 int _dm_flags; /* misc. flags */ 960 961 /* 962 * This is used only for SGMAP-mapped DMA, but we keep it 963 * here to avoid pointless indirection. 964 */ 965 int _dm_pteidx; /* PTE index */ 966 int _dm_ptecnt; /* PTE count */ 967 u_long _dm_sgva; /* allocated sgva */ 968 bus_size_t _dm_sgvalen; /* svga length */ 969 970 /* 971 * PUBLIC MEMBERS: these are used by machine-independent code. 972 */ 973 bus_size_t dm_maxsegsz; /* largest possible segment */ 974 bus_size_t dm_mapsize; /* size of the mapping */ 975 int dm_nsegs; /* # valid segments in mapping */ 976 bus_dma_segment_t dm_segs[1]; /* segments; variable length */ 977 }; 978 979 /*#ifdef _VAX_BUS_DMA_PRIVATE */ 980 int _bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t, 981 bus_size_t, int, bus_dmamap_t *); 982 void _bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t); 983 984 int _bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, 985 void *, bus_size_t, struct proc *, int); 986 int _bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t, struct mbuf *, int); 987 int _bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t, struct uio *, int); 988 int _bus_dmamap_load_raw(bus_dma_tag_t, 989 bus_dmamap_t, bus_dma_segment_t *, int, bus_size_t, int); 990 991 void _bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t); 992 void _bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 993 bus_size_t, int); 994 995 int _bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size, 996 bus_size_t alignment, bus_size_t boundary, 997 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags); 998 void _bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs, int nsegs); 999 int _bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs, 1000 int nsegs, size_t size, void **kvap, int flags); 1001 void _bus_dmamem_unmap(bus_dma_tag_t tag, void *kva, size_t size); 1002 paddr_t _bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs, 1003 int nsegs, off_t off, int prot, int flags); 1004 /*#endif*/ /* _VAX_BUS_DMA_PRIVATE */ 1005 1006 #endif /* _VAX_BUS_H_ */ 1007